1 #ifndef _ASM_X86_PGTABLE_H
2 #define _ASM_X86_PGTABLE_H
7 #include <asm/pgtable_types.h>
10 * Macro to mark a page protection value as UC-
12 #define pgprot_noncached(prot) \
13 ((boot_cpu_data.x86 > 3) \
14 ? (__pgprot(pgprot_val(prot) | \
15 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \
19 #include <asm/x86_init.h>
21 #ifdef CONFIG_PAGE_TABLE_ISOLATION
22 extern int kaiser_enabled;
24 * Instead of one PGD, we acquire two PGDs. Being order-1, it is
25 * both 8k in size and 8k-aligned. That lets us just flip bit 12
26 * in a pointer to swap between the two 4k halves.
29 #define kaiser_enabled 0
31 #define PGD_ALLOCATION_ORDER kaiser_enabled
33 void ptdump_walk_pgd_level(struct seq_file *m, pgd_t *pgd);
34 void ptdump_walk_pgd_level_checkwx(void);
36 #ifdef CONFIG_DEBUG_WX
37 #define debug_checkwx() ptdump_walk_pgd_level_checkwx()
39 #define debug_checkwx() do { } while (0)
43 * ZERO_PAGE is a global shared page that is always zero: used
44 * for zero-mapped memory areas etc..
46 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
48 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
50 extern spinlock_t pgd_lock;
51 extern struct list_head pgd_list;
53 extern struct mm_struct *pgd_page_get_mm(struct page *page);
55 #ifdef CONFIG_PARAVIRT
56 #include <asm/paravirt.h>
57 #else /* !CONFIG_PARAVIRT */
58 #define set_pte(ptep, pte) native_set_pte(ptep, pte)
59 #define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
60 #define set_pmd_at(mm, addr, pmdp, pmd) native_set_pmd_at(mm, addr, pmdp, pmd)
62 #define set_pte_atomic(ptep, pte) \
63 native_set_pte_atomic(ptep, pte)
65 #define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
67 #ifndef __PAGETABLE_PUD_FOLDED
68 #define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
69 #define pgd_clear(pgd) native_pgd_clear(pgd)
73 # define set_pud(pudp, pud) native_set_pud(pudp, pud)
76 #ifndef __PAGETABLE_PMD_FOLDED
77 #define pud_clear(pud) native_pud_clear(pud)
80 #define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
81 #define pmd_clear(pmd) native_pmd_clear(pmd)
83 #define pte_update(mm, addr, ptep) do { } while (0)
85 #define pgd_val(x) native_pgd_val(x)
86 #define __pgd(x) native_make_pgd(x)
88 #ifndef __PAGETABLE_PUD_FOLDED
89 #define pud_val(x) native_pud_val(x)
90 #define __pud(x) native_make_pud(x)
93 #ifndef __PAGETABLE_PMD_FOLDED
94 #define pmd_val(x) native_pmd_val(x)
95 #define __pmd(x) native_make_pmd(x)
98 #define pte_val(x) native_pte_val(x)
99 #define __pte(x) native_make_pte(x)
101 #define arch_end_context_switch(prev) do {} while(0)
103 #endif /* CONFIG_PARAVIRT */
106 * The following only work if pte_present() is true.
107 * Undefined behaviour if not..
109 static inline int pte_dirty(pte_t pte)
111 return pte_flags(pte) & _PAGE_DIRTY;
115 static inline u32 read_pkru(void)
117 if (boot_cpu_has(X86_FEATURE_OSPKE))
118 return __read_pkru();
122 static inline void write_pkru(u32 pkru)
124 if (boot_cpu_has(X86_FEATURE_OSPKE))
128 static inline int pte_young(pte_t pte)
130 return pte_flags(pte) & _PAGE_ACCESSED;
133 static inline int pmd_dirty(pmd_t pmd)
135 return pmd_flags(pmd) & _PAGE_DIRTY;
138 static inline int pmd_young(pmd_t pmd)
140 return pmd_flags(pmd) & _PAGE_ACCESSED;
143 static inline int pte_write(pte_t pte)
145 return pte_flags(pte) & _PAGE_RW;
148 static inline int pte_huge(pte_t pte)
150 return pte_flags(pte) & _PAGE_PSE;
153 static inline int pte_global(pte_t pte)
155 return pte_flags(pte) & _PAGE_GLOBAL;
158 static inline int pte_exec(pte_t pte)
160 return !(pte_flags(pte) & _PAGE_NX);
163 static inline int pte_special(pte_t pte)
165 return pte_flags(pte) & _PAGE_SPECIAL;
168 /* Entries that were set to PROT_NONE are inverted */
170 static inline u64 protnone_mask(u64 val);
172 static inline unsigned long pte_pfn(pte_t pte)
174 phys_addr_t pfn = pte_val(pte);
175 pfn ^= protnone_mask(pfn);
176 return (pfn & PTE_PFN_MASK) >> PAGE_SHIFT;
179 static inline unsigned long pmd_pfn(pmd_t pmd)
181 phys_addr_t pfn = pmd_val(pmd);
182 pfn ^= protnone_mask(pfn);
183 return (pfn & pmd_pfn_mask(pmd)) >> PAGE_SHIFT;
186 static inline unsigned long pud_pfn(pud_t pud)
188 phys_addr_t pfn = pud_val(pud);
189 pfn ^= protnone_mask(pfn);
190 return (pfn & pud_pfn_mask(pud)) >> PAGE_SHIFT;
193 static inline unsigned long pgd_pfn(pgd_t pgd)
195 return (pgd_val(pgd) & PTE_PFN_MASK) >> PAGE_SHIFT;
198 #define pte_page(pte) pfn_to_page(pte_pfn(pte))
200 static inline int pmd_large(pmd_t pte)
202 return pmd_flags(pte) & _PAGE_PSE;
205 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
206 /* NOTE: when predicate huge page, consider also pmd_devmap, or use pmd_large */
207 static inline int pmd_trans_huge(pmd_t pmd)
209 return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
212 #define has_transparent_hugepage has_transparent_hugepage
213 static inline int has_transparent_hugepage(void)
215 return boot_cpu_has(X86_FEATURE_PSE);
218 #ifdef __HAVE_ARCH_PTE_DEVMAP
219 static inline int pmd_devmap(pmd_t pmd)
221 return !!(pmd_val(pmd) & _PAGE_DEVMAP);
224 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
226 static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
228 pteval_t v = native_pte_val(pte);
230 return native_make_pte(v | set);
233 static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
235 pteval_t v = native_pte_val(pte);
237 return native_make_pte(v & ~clear);
240 static inline pte_t pte_mkclean(pte_t pte)
242 return pte_clear_flags(pte, _PAGE_DIRTY);
245 static inline pte_t pte_mkold(pte_t pte)
247 return pte_clear_flags(pte, _PAGE_ACCESSED);
250 static inline pte_t pte_wrprotect(pte_t pte)
252 return pte_clear_flags(pte, _PAGE_RW);
255 static inline pte_t pte_mkexec(pte_t pte)
257 return pte_clear_flags(pte, _PAGE_NX);
260 static inline pte_t pte_mkdirty(pte_t pte)
262 return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
265 static inline pte_t pte_mkyoung(pte_t pte)
267 return pte_set_flags(pte, _PAGE_ACCESSED);
270 static inline pte_t pte_mkwrite(pte_t pte)
272 return pte_set_flags(pte, _PAGE_RW);
275 static inline pte_t pte_mkhuge(pte_t pte)
277 return pte_set_flags(pte, _PAGE_PSE);
280 static inline pte_t pte_clrhuge(pte_t pte)
282 return pte_clear_flags(pte, _PAGE_PSE);
285 static inline pte_t pte_mkglobal(pte_t pte)
287 return pte_set_flags(pte, _PAGE_GLOBAL);
290 static inline pte_t pte_clrglobal(pte_t pte)
292 return pte_clear_flags(pte, _PAGE_GLOBAL);
295 static inline pte_t pte_mkspecial(pte_t pte)
297 return pte_set_flags(pte, _PAGE_SPECIAL);
300 static inline pte_t pte_mkdevmap(pte_t pte)
302 return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP);
305 static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set)
307 pmdval_t v = native_pmd_val(pmd);
309 return __pmd(v | set);
312 static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear)
314 pmdval_t v = native_pmd_val(pmd);
316 return __pmd(v & ~clear);
319 static inline pmd_t pmd_mkold(pmd_t pmd)
321 return pmd_clear_flags(pmd, _PAGE_ACCESSED);
324 static inline pmd_t pmd_mkclean(pmd_t pmd)
326 return pmd_clear_flags(pmd, _PAGE_DIRTY);
329 static inline pmd_t pmd_wrprotect(pmd_t pmd)
331 return pmd_clear_flags(pmd, _PAGE_RW);
334 static inline pmd_t pmd_mkdirty(pmd_t pmd)
336 return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
339 static inline pmd_t pmd_mkdevmap(pmd_t pmd)
341 return pmd_set_flags(pmd, _PAGE_DEVMAP);
344 static inline pmd_t pmd_mkhuge(pmd_t pmd)
346 return pmd_set_flags(pmd, _PAGE_PSE);
349 static inline pmd_t pmd_mkyoung(pmd_t pmd)
351 return pmd_set_flags(pmd, _PAGE_ACCESSED);
354 static inline pmd_t pmd_mkwrite(pmd_t pmd)
356 return pmd_set_flags(pmd, _PAGE_RW);
359 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
360 static inline int pte_soft_dirty(pte_t pte)
362 return pte_flags(pte) & _PAGE_SOFT_DIRTY;
365 static inline int pmd_soft_dirty(pmd_t pmd)
367 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY;
370 static inline pte_t pte_mksoft_dirty(pte_t pte)
372 return pte_set_flags(pte, _PAGE_SOFT_DIRTY);
375 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
377 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY);
380 static inline pte_t pte_clear_soft_dirty(pte_t pte)
382 return pte_clear_flags(pte, _PAGE_SOFT_DIRTY);
385 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
387 return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY);
390 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
393 * Mask out unsupported bits in a present pgprot. Non-present pgprots
394 * can use those bits for other purposes, so leave them be.
396 static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
398 pgprotval_t protval = pgprot_val(pgprot);
400 if (protval & _PAGE_PRESENT)
401 protval &= __supported_pte_mask;
406 static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
408 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
409 pfn ^= protnone_mask(pgprot_val(pgprot));
411 return __pte(pfn | massage_pgprot(pgprot));
414 static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
416 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
417 pfn ^= protnone_mask(pgprot_val(pgprot));
418 pfn &= PHYSICAL_PMD_PAGE_MASK;
419 return __pmd(pfn | massage_pgprot(pgprot));
422 static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot)
424 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
425 pfn ^= protnone_mask(pgprot_val(pgprot));
426 pfn &= PHYSICAL_PUD_PAGE_MASK;
427 return __pud(pfn | massage_pgprot(pgprot));
430 static inline pmd_t pmd_mknotpresent(pmd_t pmd)
432 return pfn_pmd(pmd_pfn(pmd),
433 __pgprot(pmd_flags(pmd) & ~(_PAGE_PRESENT|_PAGE_PROTNONE)));
436 static inline pud_t pud_set_flags(pud_t pud, pudval_t set)
438 pudval_t v = native_pud_val(pud);
440 return __pud(v | set);
443 static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear)
445 pudval_t v = native_pud_val(pud);
447 return __pud(v & ~clear);
450 static inline pud_t pud_mkhuge(pud_t pud)
452 return pud_set_flags(pud, _PAGE_PSE);
455 static inline u64 flip_protnone_guard(u64 oldval, u64 val, u64 mask);
457 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
459 pteval_t val = pte_val(pte), oldval = val;
462 * Chop off the NX bit (if present), and add the NX portion of
463 * the newprot (if present):
465 val &= _PAGE_CHG_MASK;
466 val |= massage_pgprot(newprot) & ~_PAGE_CHG_MASK;
467 val = flip_protnone_guard(oldval, val, PTE_PFN_MASK);
471 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
473 pmdval_t val = pmd_val(pmd), oldval = val;
475 val &= _HPAGE_CHG_MASK;
476 val |= massage_pgprot(newprot) & ~_HPAGE_CHG_MASK;
477 val = flip_protnone_guard(oldval, val, PHYSICAL_PMD_PAGE_MASK);
481 /* mprotect needs to preserve PAT bits when updating vm_page_prot */
482 #define pgprot_modify pgprot_modify
483 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
485 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
486 pgprotval_t addbits = pgprot_val(newprot);
487 return __pgprot(preservebits | addbits);
490 #define pte_pgprot(x) __pgprot(pte_flags(x))
491 #define pmd_pgprot(x) __pgprot(pmd_flags(x))
492 #define pud_pgprot(x) __pgprot(pud_flags(x))
494 #define canon_pgprot(p) __pgprot(massage_pgprot(p))
496 static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
497 enum page_cache_mode pcm,
498 enum page_cache_mode new_pcm)
501 * PAT type is always WB for untracked ranges, so no need to check.
503 if (x86_platform.is_untracked_pat_range(paddr, paddr + size))
507 * Certain new memtypes are not allowed with certain
509 * - request is uncached, return cannot be write-back
510 * - request is write-combine, return cannot be write-back
511 * - request is write-through, return cannot be write-back
512 * - request is write-through, return cannot be write-combine
514 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS &&
515 new_pcm == _PAGE_CACHE_MODE_WB) ||
516 (pcm == _PAGE_CACHE_MODE_WC &&
517 new_pcm == _PAGE_CACHE_MODE_WB) ||
518 (pcm == _PAGE_CACHE_MODE_WT &&
519 new_pcm == _PAGE_CACHE_MODE_WB) ||
520 (pcm == _PAGE_CACHE_MODE_WT &&
521 new_pcm == _PAGE_CACHE_MODE_WC)) {
528 pmd_t *populate_extra_pmd(unsigned long vaddr);
529 pte_t *populate_extra_pte(unsigned long vaddr);
530 #endif /* __ASSEMBLY__ */
533 # include <asm/pgtable_32.h>
535 # include <asm/pgtable_64.h>
539 #include <linux/mm_types.h>
540 #include <linux/mmdebug.h>
541 #include <linux/log2.h>
543 static inline int pte_none(pte_t pte)
545 return !(pte.pte & ~(_PAGE_KNL_ERRATUM_MASK));
548 #define __HAVE_ARCH_PTE_SAME
549 static inline int pte_same(pte_t a, pte_t b)
551 return a.pte == b.pte;
554 static inline int pte_present(pte_t a)
556 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
559 #ifdef __HAVE_ARCH_PTE_DEVMAP
560 static inline int pte_devmap(pte_t a)
562 return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP;
566 #define pte_accessible pte_accessible
567 static inline bool pte_accessible(struct mm_struct *mm, pte_t a)
569 if (pte_flags(a) & _PAGE_PRESENT)
572 if ((pte_flags(a) & _PAGE_PROTNONE) &&
573 mm_tlb_flush_pending(mm))
579 static inline int pte_hidden(pte_t pte)
581 return pte_flags(pte) & _PAGE_HIDDEN;
584 static inline int pmd_present(pmd_t pmd)
587 * Checking for _PAGE_PSE is needed too because
588 * split_huge_page will temporarily clear the present bit (but
589 * the _PAGE_PSE flag will remain set at all times while the
590 * _PAGE_PRESENT bit is clear).
592 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE);
595 #ifdef CONFIG_NUMA_BALANCING
597 * These work without NUMA balancing but the kernel does not care. See the
598 * comment in include/asm-generic/pgtable.h
600 static inline int pte_protnone(pte_t pte)
602 return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT))
606 static inline int pmd_protnone(pmd_t pmd)
608 return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT))
611 #endif /* CONFIG_NUMA_BALANCING */
613 static inline int pmd_none(pmd_t pmd)
615 /* Only check low word on 32-bit platforms, since it might be
616 out of sync with upper half. */
617 unsigned long val = native_pmd_val(pmd);
618 return (val & ~_PAGE_KNL_ERRATUM_MASK) == 0;
621 static inline unsigned long pmd_page_vaddr(pmd_t pmd)
623 return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd));
627 * Currently stuck as a macro due to indirect forward reference to
628 * linux/mmzone.h's __section_mem_map_addr() definition:
630 #define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd))
633 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
635 * this macro returns the index of the entry in the pmd page which would
636 * control the given virtual address
638 static inline unsigned long pmd_index(unsigned long address)
640 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
644 * Conversion functions: convert a page and protection to a page entry,
645 * and a page entry and page directory to the page they refer to.
647 * (Currently stuck as a macro because of indirect forward reference
648 * to linux/mm.h:page_to_nid())
650 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
653 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
655 * this function returns the index of the entry in the pte page which would
656 * control the given virtual address
658 static inline unsigned long pte_index(unsigned long address)
660 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
663 static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
665 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
668 static inline int pmd_bad(pmd_t pmd)
670 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
673 static inline unsigned long pages_to_mb(unsigned long npg)
675 return npg >> (20 - PAGE_SHIFT);
678 #if CONFIG_PGTABLE_LEVELS > 2
679 static inline int pud_none(pud_t pud)
681 return (native_pud_val(pud) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0;
684 static inline int pud_present(pud_t pud)
686 return pud_flags(pud) & _PAGE_PRESENT;
689 static inline unsigned long pud_page_vaddr(pud_t pud)
691 return (unsigned long)__va(pud_val(pud) & pud_pfn_mask(pud));
695 * Currently stuck as a macro due to indirect forward reference to
696 * linux/mmzone.h's __section_mem_map_addr() definition:
698 #define pud_page(pud) pfn_to_page(pud_pfn(pud))
700 /* Find an entry in the second-level page table.. */
701 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
703 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
706 static inline int pud_large(pud_t pud)
708 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
709 (_PAGE_PSE | _PAGE_PRESENT);
712 static inline int pud_bad(pud_t pud)
714 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
717 static inline int pud_large(pud_t pud)
721 #endif /* CONFIG_PGTABLE_LEVELS > 2 */
723 #if CONFIG_PGTABLE_LEVELS > 3
724 static inline int pgd_present(pgd_t pgd)
726 return pgd_flags(pgd) & _PAGE_PRESENT;
729 static inline unsigned long pgd_page_vaddr(pgd_t pgd)
731 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
735 * Currently stuck as a macro due to indirect forward reference to
736 * linux/mmzone.h's __section_mem_map_addr() definition:
738 #define pgd_page(pgd) pfn_to_page(pgd_pfn(pgd))
740 /* to find an entry in a page-table-directory. */
741 static inline unsigned long pud_index(unsigned long address)
743 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
746 static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
748 return (pud_t *)pgd_page_vaddr(*pgd) + pud_index(address);
751 static inline int pgd_bad(pgd_t pgd)
753 pgdval_t ignore_flags = _PAGE_USER;
755 * We set NX on KAISER pgds that map userspace memory so
756 * that userspace can not meaningfully use the kernel
757 * page table by accident; it will fault on the first
758 * instruction it tries to run. See native_set_pgd().
761 ignore_flags |= _PAGE_NX;
763 return (pgd_flags(pgd) & ~ignore_flags) != _KERNPG_TABLE;
766 static inline int pgd_none(pgd_t pgd)
769 * There is no need to do a workaround for the KNL stray
770 * A/D bit erratum here. PGDs only point to page tables
771 * except on 32-bit non-PAE which is not supported on
774 return !native_pgd_val(pgd);
776 #endif /* CONFIG_PGTABLE_LEVELS > 3 */
778 #endif /* __ASSEMBLY__ */
781 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
783 * this macro returns the index of the entry in the pgd page which would
784 * control the given virtual address
786 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
789 * pgd_offset() returns a (pgd_t *)
790 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
792 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index((address)))
794 * a shortcut which implies the use of the kernel's pgd, instead
797 #define pgd_offset_k(address) pgd_offset(&init_mm, (address))
800 #define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
801 #define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
805 extern int direct_gbpages;
806 void init_mem_mapping(void);
807 void early_alloc_pgt_buf(void);
810 /* Realmode trampoline initialization. */
811 extern pgd_t trampoline_pgd_entry;
812 static inline void __meminit init_trampoline_default(void)
814 /* Default trampoline pgd value */
815 trampoline_pgd_entry = init_level4_pgt[pgd_index(__PAGE_OFFSET)];
817 # ifdef CONFIG_RANDOMIZE_MEMORY
818 void __meminit init_trampoline(void);
820 # define init_trampoline init_trampoline_default
823 static inline void init_trampoline(void) { }
826 /* local pte updates need not use xchg for locking */
827 static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
831 /* Pure native function needs no input for mm, addr */
832 native_pte_clear(NULL, 0, ptep);
836 static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp)
840 native_pmd_clear(pmdp);
844 static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
845 pte_t *ptep , pte_t pte)
847 native_set_pte(ptep, pte);
850 static inline void native_set_pmd_at(struct mm_struct *mm, unsigned long addr,
851 pmd_t *pmdp , pmd_t pmd)
853 native_set_pmd(pmdp, pmd);
856 #ifndef CONFIG_PARAVIRT
858 * Rules for using pte_update - it must be called after any PTE update which
859 * has not been done using the set_pte / clear_pte interfaces. It is used by
860 * shadow mode hypervisors to resynchronize the shadow page tables. Kernel PTE
861 * updates should either be sets, clears, or set_pte_atomic for P->P
862 * transitions, which means this hook should only be called for user PTEs.
863 * This hook implies a P->P protection or access change has taken place, which
864 * requires a subsequent TLB flush.
866 #define pte_update(mm, addr, ptep) do { } while (0)
870 * We only update the dirty/accessed state if we set
871 * the dirty bit by hand in the kernel, since the hardware
872 * will do the accessed bit for us, and we don't want to
873 * race with other CPU's that might be updating the dirty
874 * bit at the same time.
876 struct vm_area_struct;
878 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
879 extern int ptep_set_access_flags(struct vm_area_struct *vma,
880 unsigned long address, pte_t *ptep,
881 pte_t entry, int dirty);
883 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
884 extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
885 unsigned long addr, pte_t *ptep);
887 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
888 extern int ptep_clear_flush_young(struct vm_area_struct *vma,
889 unsigned long address, pte_t *ptep);
891 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
892 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
895 pte_t pte = native_ptep_get_and_clear(ptep);
896 pte_update(mm, addr, ptep);
900 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
901 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
902 unsigned long addr, pte_t *ptep,
908 * Full address destruction in progress; paravirt does not
909 * care about updates and native needs no locking
911 pte = native_local_ptep_get_and_clear(ptep);
913 pte = ptep_get_and_clear(mm, addr, ptep);
918 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
919 static inline void ptep_set_wrprotect(struct mm_struct *mm,
920 unsigned long addr, pte_t *ptep)
922 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
923 pte_update(mm, addr, ptep);
926 #define flush_tlb_fix_spurious_fault(vma, address) do { } while (0)
928 #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
930 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
931 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
932 unsigned long address, pmd_t *pmdp,
933 pmd_t entry, int dirty);
935 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
936 extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
937 unsigned long addr, pmd_t *pmdp);
939 #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
940 extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
941 unsigned long address, pmd_t *pmdp);
944 #define __HAVE_ARCH_PMD_WRITE
945 static inline int pmd_write(pmd_t pmd)
947 return pmd_flags(pmd) & _PAGE_RW;
950 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
951 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr,
954 return native_pmdp_get_and_clear(pmdp);
957 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
958 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
959 unsigned long addr, pmd_t *pmdp)
961 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp);
965 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
967 * dst - pointer to pgd range anwhere on a pgd page
969 * count - the number of pgds to copy.
971 * dst and src can be on the same page, but the range must not overlap,
972 * and must not cross a page boundary.
974 static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
976 memcpy(dst, src, count * sizeof(pgd_t));
977 #ifdef CONFIG_PAGE_TABLE_ISOLATION
978 if (kaiser_enabled) {
979 /* Clone the shadow pgd part as well */
980 memcpy(native_get_shadow_pgd(dst),
981 native_get_shadow_pgd(src),
982 count * sizeof(pgd_t));
987 #define PTE_SHIFT ilog2(PTRS_PER_PTE)
988 static inline int page_level_shift(enum pg_level level)
990 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT;
992 static inline unsigned long page_level_size(enum pg_level level)
994 return 1UL << page_level_shift(level);
996 static inline unsigned long page_level_mask(enum pg_level level)
998 return ~(page_level_size(level) - 1);
1002 * The x86 doesn't have any external MMU info: the kernel page
1003 * tables contain all the necessary information.
1005 static inline void update_mmu_cache(struct vm_area_struct *vma,
1006 unsigned long addr, pte_t *ptep)
1009 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
1010 unsigned long addr, pmd_t *pmd)
1014 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
1015 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
1017 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY);
1020 static inline int pte_swp_soft_dirty(pte_t pte)
1022 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY;
1025 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
1027 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY);
1031 #define PKRU_AD_BIT 0x1u
1032 #define PKRU_WD_BIT 0x2u
1033 #define PKRU_BITS_PER_PKEY 2
1035 static inline bool __pkru_allows_read(u32 pkru, u16 pkey)
1037 int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY;
1038 return !(pkru & (PKRU_AD_BIT << pkru_pkey_bits));
1041 static inline bool __pkru_allows_write(u32 pkru, u16 pkey)
1043 int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY;
1045 * Access-disable disables writes too so we need to check
1048 return !(pkru & ((PKRU_AD_BIT|PKRU_WD_BIT) << pkru_pkey_bits));
1051 static inline u16 pte_flags_pkey(unsigned long pte_flags)
1053 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
1054 /* ifdef to avoid doing 59-bit shift on 32-bit values */
1055 return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0;
1062 #define __HAVE_ARCH_PFN_MODIFY_ALLOWED 1
1063 extern bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot);
1065 static inline bool arch_has_pfn_modify_check(void)
1067 return boot_cpu_has_bug(X86_BUG_L1TF);
1070 #include <asm-generic/pgtable.h>
1071 #endif /* __ASSEMBLY__ */
1073 #endif /* _ASM_X86_PGTABLE_H */