1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef _ASM_X86_PGTABLE_H
3 #define _ASM_X86_PGTABLE_H
5 #include <linux/mem_encrypt.h>
7 #include <asm/pgtable_types.h>
10 * Macro to mark a page protection value as UC-
12 #define pgprot_noncached(prot) \
13 ((boot_cpu_data.x86 > 3) \
14 ? (__pgprot(pgprot_val(prot) | \
15 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \
19 * Macros to add or remove encryption attribute
21 #define pgprot_encrypted(prot) __pgprot(__sme_set(pgprot_val(prot)))
22 #define pgprot_decrypted(prot) __pgprot(__sme_clr(pgprot_val(prot)))
25 #include <asm/x86_init.h>
27 extern pgd_t early_top_pgt[PTRS_PER_PGD];
28 int __init __early_make_pgtable(unsigned long address, pmdval_t pmd);
30 void ptdump_walk_pgd_level(struct seq_file *m, pgd_t *pgd);
31 void ptdump_walk_pgd_level_debugfs(struct seq_file *m, pgd_t *pgd, bool user);
32 void ptdump_walk_pgd_level_checkwx(void);
33 void ptdump_walk_user_pgd_level_checkwx(void);
35 #ifdef CONFIG_DEBUG_WX
36 #define debug_checkwx() ptdump_walk_pgd_level_checkwx()
37 #define debug_checkwx_user() ptdump_walk_user_pgd_level_checkwx()
39 #define debug_checkwx() do { } while (0)
40 #define debug_checkwx_user() do { } while (0)
44 * ZERO_PAGE is a global shared page that is always zero: used
45 * for zero-mapped memory areas etc..
47 extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
49 #define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
51 extern spinlock_t pgd_lock;
52 extern struct list_head pgd_list;
54 extern struct mm_struct *pgd_page_get_mm(struct page *page);
56 extern pmdval_t early_pmd_flags;
58 #ifdef CONFIG_PARAVIRT
59 #include <asm/paravirt.h>
60 #else /* !CONFIG_PARAVIRT */
61 #define set_pte(ptep, pte) native_set_pte(ptep, pte)
62 #define set_pte_at(mm, addr, ptep, pte) native_set_pte_at(mm, addr, ptep, pte)
64 #define set_pte_atomic(ptep, pte) \
65 native_set_pte_atomic(ptep, pte)
67 #define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
69 #ifndef __PAGETABLE_P4D_FOLDED
70 #define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
71 #define pgd_clear(pgd) (pgtable_l5_enabled() ? native_pgd_clear(pgd) : 0)
75 # define set_p4d(p4dp, p4d) native_set_p4d(p4dp, p4d)
78 #ifndef __PAGETABLE_PUD_FOLDED
79 #define p4d_clear(p4d) native_p4d_clear(p4d)
83 # define set_pud(pudp, pud) native_set_pud(pudp, pud)
86 #ifndef __PAGETABLE_PUD_FOLDED
87 #define pud_clear(pud) native_pud_clear(pud)
90 #define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
91 #define pmd_clear(pmd) native_pmd_clear(pmd)
93 #define pgd_val(x) native_pgd_val(x)
94 #define __pgd(x) native_make_pgd(x)
96 #ifndef __PAGETABLE_P4D_FOLDED
97 #define p4d_val(x) native_p4d_val(x)
98 #define __p4d(x) native_make_p4d(x)
101 #ifndef __PAGETABLE_PUD_FOLDED
102 #define pud_val(x) native_pud_val(x)
103 #define __pud(x) native_make_pud(x)
106 #ifndef __PAGETABLE_PMD_FOLDED
107 #define pmd_val(x) native_pmd_val(x)
108 #define __pmd(x) native_make_pmd(x)
111 #define pte_val(x) native_pte_val(x)
112 #define __pte(x) native_make_pte(x)
114 #define arch_end_context_switch(prev) do {} while(0)
116 #endif /* CONFIG_PARAVIRT */
119 * The following only work if pte_present() is true.
120 * Undefined behaviour if not..
122 static inline int pte_dirty(pte_t pte)
124 return pte_flags(pte) & _PAGE_DIRTY;
128 static inline u32 read_pkru(void)
130 if (boot_cpu_has(X86_FEATURE_OSPKE))
131 return __read_pkru();
135 static inline void write_pkru(u32 pkru)
137 if (boot_cpu_has(X86_FEATURE_OSPKE))
141 static inline int pte_young(pte_t pte)
143 return pte_flags(pte) & _PAGE_ACCESSED;
146 static inline int pmd_dirty(pmd_t pmd)
148 return pmd_flags(pmd) & _PAGE_DIRTY;
151 static inline int pmd_young(pmd_t pmd)
153 return pmd_flags(pmd) & _PAGE_ACCESSED;
156 static inline int pud_dirty(pud_t pud)
158 return pud_flags(pud) & _PAGE_DIRTY;
161 static inline int pud_young(pud_t pud)
163 return pud_flags(pud) & _PAGE_ACCESSED;
166 static inline int pte_write(pte_t pte)
168 return pte_flags(pte) & _PAGE_RW;
171 static inline int pte_huge(pte_t pte)
173 return pte_flags(pte) & _PAGE_PSE;
176 static inline int pte_global(pte_t pte)
178 return pte_flags(pte) & _PAGE_GLOBAL;
181 static inline int pte_exec(pte_t pte)
183 return !(pte_flags(pte) & _PAGE_NX);
186 static inline int pte_special(pte_t pte)
188 return pte_flags(pte) & _PAGE_SPECIAL;
191 /* Entries that were set to PROT_NONE are inverted */
193 static inline u64 protnone_mask(u64 val);
195 static inline unsigned long pte_pfn(pte_t pte)
197 phys_addr_t pfn = pte_val(pte);
198 pfn ^= protnone_mask(pfn);
199 return (pfn & PTE_PFN_MASK) >> PAGE_SHIFT;
202 static inline unsigned long pmd_pfn(pmd_t pmd)
204 phys_addr_t pfn = pmd_val(pmd);
205 pfn ^= protnone_mask(pfn);
206 return (pfn & pmd_pfn_mask(pmd)) >> PAGE_SHIFT;
209 static inline unsigned long pud_pfn(pud_t pud)
211 phys_addr_t pfn = pud_val(pud);
212 pfn ^= protnone_mask(pfn);
213 return (pfn & pud_pfn_mask(pud)) >> PAGE_SHIFT;
216 static inline unsigned long p4d_pfn(p4d_t p4d)
218 return (p4d_val(p4d) & p4d_pfn_mask(p4d)) >> PAGE_SHIFT;
221 static inline unsigned long pgd_pfn(pgd_t pgd)
223 return (pgd_val(pgd) & PTE_PFN_MASK) >> PAGE_SHIFT;
226 static inline int p4d_large(p4d_t p4d)
228 /* No 512 GiB pages yet */
232 #define pte_page(pte) pfn_to_page(pte_pfn(pte))
234 static inline int pmd_large(pmd_t pte)
236 return pmd_flags(pte) & _PAGE_PSE;
239 #ifdef CONFIG_TRANSPARENT_HUGEPAGE
240 /* NOTE: when predicate huge page, consider also pmd_devmap, or use pmd_large */
241 static inline int pmd_trans_huge(pmd_t pmd)
243 return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
246 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
247 static inline int pud_trans_huge(pud_t pud)
249 return (pud_val(pud) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
253 #define has_transparent_hugepage has_transparent_hugepage
254 static inline int has_transparent_hugepage(void)
256 return boot_cpu_has(X86_FEATURE_PSE);
259 #ifdef __HAVE_ARCH_PTE_DEVMAP
260 static inline int pmd_devmap(pmd_t pmd)
262 return !!(pmd_val(pmd) & _PAGE_DEVMAP);
265 #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
266 static inline int pud_devmap(pud_t pud)
268 return !!(pud_val(pud) & _PAGE_DEVMAP);
271 static inline int pud_devmap(pud_t pud)
277 static inline int pgd_devmap(pgd_t pgd)
282 #endif /* CONFIG_TRANSPARENT_HUGEPAGE */
284 static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
286 pteval_t v = native_pte_val(pte);
288 return native_make_pte(v | set);
291 static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
293 pteval_t v = native_pte_val(pte);
295 return native_make_pte(v & ~clear);
298 static inline pte_t pte_mkclean(pte_t pte)
300 return pte_clear_flags(pte, _PAGE_DIRTY);
303 static inline pte_t pte_mkold(pte_t pte)
305 return pte_clear_flags(pte, _PAGE_ACCESSED);
308 static inline pte_t pte_wrprotect(pte_t pte)
310 return pte_clear_flags(pte, _PAGE_RW);
313 static inline pte_t pte_mkexec(pte_t pte)
315 return pte_clear_flags(pte, _PAGE_NX);
318 static inline pte_t pte_mkdirty(pte_t pte)
320 return pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
323 static inline pte_t pte_mkyoung(pte_t pte)
325 return pte_set_flags(pte, _PAGE_ACCESSED);
328 static inline pte_t pte_mkwrite(pte_t pte)
330 return pte_set_flags(pte, _PAGE_RW);
333 static inline pte_t pte_mkhuge(pte_t pte)
335 return pte_set_flags(pte, _PAGE_PSE);
338 static inline pte_t pte_clrhuge(pte_t pte)
340 return pte_clear_flags(pte, _PAGE_PSE);
343 static inline pte_t pte_mkglobal(pte_t pte)
345 return pte_set_flags(pte, _PAGE_GLOBAL);
348 static inline pte_t pte_clrglobal(pte_t pte)
350 return pte_clear_flags(pte, _PAGE_GLOBAL);
353 static inline pte_t pte_mkspecial(pte_t pte)
355 return pte_set_flags(pte, _PAGE_SPECIAL);
358 static inline pte_t pte_mkdevmap(pte_t pte)
360 return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP);
363 static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set)
365 pmdval_t v = native_pmd_val(pmd);
367 return native_make_pmd(v | set);
370 static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear)
372 pmdval_t v = native_pmd_val(pmd);
374 return native_make_pmd(v & ~clear);
377 static inline pmd_t pmd_mkold(pmd_t pmd)
379 return pmd_clear_flags(pmd, _PAGE_ACCESSED);
382 static inline pmd_t pmd_mkclean(pmd_t pmd)
384 return pmd_clear_flags(pmd, _PAGE_DIRTY);
387 static inline pmd_t pmd_wrprotect(pmd_t pmd)
389 return pmd_clear_flags(pmd, _PAGE_RW);
392 static inline pmd_t pmd_mkdirty(pmd_t pmd)
394 return pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
397 static inline pmd_t pmd_mkdevmap(pmd_t pmd)
399 return pmd_set_flags(pmd, _PAGE_DEVMAP);
402 static inline pmd_t pmd_mkhuge(pmd_t pmd)
404 return pmd_set_flags(pmd, _PAGE_PSE);
407 static inline pmd_t pmd_mkyoung(pmd_t pmd)
409 return pmd_set_flags(pmd, _PAGE_ACCESSED);
412 static inline pmd_t pmd_mkwrite(pmd_t pmd)
414 return pmd_set_flags(pmd, _PAGE_RW);
417 static inline pud_t pud_set_flags(pud_t pud, pudval_t set)
419 pudval_t v = native_pud_val(pud);
421 return native_make_pud(v | set);
424 static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear)
426 pudval_t v = native_pud_val(pud);
428 return native_make_pud(v & ~clear);
431 static inline pud_t pud_mkold(pud_t pud)
433 return pud_clear_flags(pud, _PAGE_ACCESSED);
436 static inline pud_t pud_mkclean(pud_t pud)
438 return pud_clear_flags(pud, _PAGE_DIRTY);
441 static inline pud_t pud_wrprotect(pud_t pud)
443 return pud_clear_flags(pud, _PAGE_RW);
446 static inline pud_t pud_mkdirty(pud_t pud)
448 return pud_set_flags(pud, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
451 static inline pud_t pud_mkdevmap(pud_t pud)
453 return pud_set_flags(pud, _PAGE_DEVMAP);
456 static inline pud_t pud_mkhuge(pud_t pud)
458 return pud_set_flags(pud, _PAGE_PSE);
461 static inline pud_t pud_mkyoung(pud_t pud)
463 return pud_set_flags(pud, _PAGE_ACCESSED);
466 static inline pud_t pud_mkwrite(pud_t pud)
468 return pud_set_flags(pud, _PAGE_RW);
471 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
472 static inline int pte_soft_dirty(pte_t pte)
474 return pte_flags(pte) & _PAGE_SOFT_DIRTY;
477 static inline int pmd_soft_dirty(pmd_t pmd)
479 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY;
482 static inline int pud_soft_dirty(pud_t pud)
484 return pud_flags(pud) & _PAGE_SOFT_DIRTY;
487 static inline pte_t pte_mksoft_dirty(pte_t pte)
489 return pte_set_flags(pte, _PAGE_SOFT_DIRTY);
492 static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
494 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY);
497 static inline pud_t pud_mksoft_dirty(pud_t pud)
499 return pud_set_flags(pud, _PAGE_SOFT_DIRTY);
502 static inline pte_t pte_clear_soft_dirty(pte_t pte)
504 return pte_clear_flags(pte, _PAGE_SOFT_DIRTY);
507 static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
509 return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY);
512 static inline pud_t pud_clear_soft_dirty(pud_t pud)
514 return pud_clear_flags(pud, _PAGE_SOFT_DIRTY);
517 #endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
520 * Mask out unsupported bits in a present pgprot. Non-present pgprots
521 * can use those bits for other purposes, so leave them be.
523 static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
525 pgprotval_t protval = pgprot_val(pgprot);
527 if (protval & _PAGE_PRESENT)
528 protval &= __supported_pte_mask;
533 static inline pgprotval_t check_pgprot(pgprot_t pgprot)
535 pgprotval_t massaged_val = massage_pgprot(pgprot);
537 /* mmdebug.h can not be included here because of dependencies */
538 #ifdef CONFIG_DEBUG_VM
539 WARN_ONCE(pgprot_val(pgprot) != massaged_val,
540 "attempted to set unsupported pgprot: %016llx "
541 "bits: %016llx supported: %016llx\n",
542 (u64)pgprot_val(pgprot),
543 (u64)pgprot_val(pgprot) ^ massaged_val,
544 (u64)__supported_pte_mask);
550 static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
552 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
553 pfn ^= protnone_mask(pgprot_val(pgprot));
555 return __pte(pfn | check_pgprot(pgprot));
558 static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
560 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
561 pfn ^= protnone_mask(pgprot_val(pgprot));
562 pfn &= PHYSICAL_PMD_PAGE_MASK;
563 return __pmd(pfn | check_pgprot(pgprot));
566 static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot)
568 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
569 pfn ^= protnone_mask(pgprot_val(pgprot));
570 pfn &= PHYSICAL_PUD_PAGE_MASK;
571 return __pud(pfn | check_pgprot(pgprot));
574 static inline pmd_t pmd_mknotpresent(pmd_t pmd)
576 return pfn_pmd(pmd_pfn(pmd),
577 __pgprot(pmd_flags(pmd) & ~(_PAGE_PRESENT|_PAGE_PROTNONE)));
580 static inline pud_t pud_mknotpresent(pud_t pud)
582 return pfn_pud(pud_pfn(pud),
583 __pgprot(pud_flags(pud) & ~(_PAGE_PRESENT|_PAGE_PROTNONE)));
586 static inline u64 flip_protnone_guard(u64 oldval, u64 val, u64 mask);
588 static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
590 pteval_t val = pte_val(pte), oldval = val;
593 * Chop off the NX bit (if present), and add the NX portion of
594 * the newprot (if present):
596 val &= _PAGE_CHG_MASK;
597 val |= check_pgprot(newprot) & ~_PAGE_CHG_MASK;
598 val = flip_protnone_guard(oldval, val, PTE_PFN_MASK);
602 static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
604 pmdval_t val = pmd_val(pmd), oldval = val;
606 val &= _HPAGE_CHG_MASK;
607 val |= check_pgprot(newprot) & ~_HPAGE_CHG_MASK;
608 val = flip_protnone_guard(oldval, val, PHYSICAL_PMD_PAGE_MASK);
613 * mprotect needs to preserve PAT and encryption bits when updating
616 #define pgprot_modify pgprot_modify
617 static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
619 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
620 pgprotval_t addbits = pgprot_val(newprot) & ~_PAGE_CHG_MASK;
621 return __pgprot(preservebits | addbits);
624 #define pte_pgprot(x) __pgprot(pte_flags(x))
625 #define pmd_pgprot(x) __pgprot(pmd_flags(x))
626 #define pud_pgprot(x) __pgprot(pud_flags(x))
627 #define p4d_pgprot(x) __pgprot(p4d_flags(x))
629 #define canon_pgprot(p) __pgprot(massage_pgprot(p))
631 static inline pgprot_t arch_filter_pgprot(pgprot_t prot)
633 return canon_pgprot(prot);
636 static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
637 enum page_cache_mode pcm,
638 enum page_cache_mode new_pcm)
641 * PAT type is always WB for untracked ranges, so no need to check.
643 if (x86_platform.is_untracked_pat_range(paddr, paddr + size))
647 * Certain new memtypes are not allowed with certain
649 * - request is uncached, return cannot be write-back
650 * - request is write-combine, return cannot be write-back
651 * - request is write-through, return cannot be write-back
652 * - request is write-through, return cannot be write-combine
654 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS &&
655 new_pcm == _PAGE_CACHE_MODE_WB) ||
656 (pcm == _PAGE_CACHE_MODE_WC &&
657 new_pcm == _PAGE_CACHE_MODE_WB) ||
658 (pcm == _PAGE_CACHE_MODE_WT &&
659 new_pcm == _PAGE_CACHE_MODE_WB) ||
660 (pcm == _PAGE_CACHE_MODE_WT &&
661 new_pcm == _PAGE_CACHE_MODE_WC)) {
668 pmd_t *populate_extra_pmd(unsigned long vaddr);
669 pte_t *populate_extra_pte(unsigned long vaddr);
671 #ifdef CONFIG_PAGE_TABLE_ISOLATION
672 pgd_t __pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd);
675 * Take a PGD location (pgdp) and a pgd value that needs to be set there.
676 * Populates the user and returns the resulting PGD that must be set in
677 * the kernel copy of the page tables.
679 static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd)
681 if (!static_cpu_has(X86_FEATURE_PTI))
683 return __pti_set_user_pgtbl(pgdp, pgd);
685 #else /* CONFIG_PAGE_TABLE_ISOLATION */
686 static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd)
690 #endif /* CONFIG_PAGE_TABLE_ISOLATION */
692 #endif /* __ASSEMBLY__ */
696 # include <asm/pgtable_32.h>
698 # include <asm/pgtable_64.h>
702 #include <linux/mm_types.h>
703 #include <linux/mmdebug.h>
704 #include <linux/log2.h>
705 #include <asm/fixmap.h>
707 static inline int pte_none(pte_t pte)
709 return !(pte.pte & ~(_PAGE_KNL_ERRATUM_MASK));
712 #define __HAVE_ARCH_PTE_SAME
713 static inline int pte_same(pte_t a, pte_t b)
715 return a.pte == b.pte;
718 static inline int pte_present(pte_t a)
720 return pte_flags(a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
723 #ifdef __HAVE_ARCH_PTE_DEVMAP
724 static inline int pte_devmap(pte_t a)
726 return (pte_flags(a) & _PAGE_DEVMAP) == _PAGE_DEVMAP;
730 #define pte_accessible pte_accessible
731 static inline bool pte_accessible(struct mm_struct *mm, pte_t a)
733 if (pte_flags(a) & _PAGE_PRESENT)
736 if ((pte_flags(a) & _PAGE_PROTNONE) &&
737 mm_tlb_flush_pending(mm))
743 static inline int pmd_present(pmd_t pmd)
746 * Checking for _PAGE_PSE is needed too because
747 * split_huge_page will temporarily clear the present bit (but
748 * the _PAGE_PSE flag will remain set at all times while the
749 * _PAGE_PRESENT bit is clear).
751 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE);
754 #ifdef CONFIG_NUMA_BALANCING
756 * These work without NUMA balancing but the kernel does not care. See the
757 * comment in include/asm-generic/pgtable.h
759 static inline int pte_protnone(pte_t pte)
761 return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT))
765 static inline int pmd_protnone(pmd_t pmd)
767 return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT))
770 #endif /* CONFIG_NUMA_BALANCING */
772 static inline int pmd_none(pmd_t pmd)
774 /* Only check low word on 32-bit platforms, since it might be
775 out of sync with upper half. */
776 unsigned long val = native_pmd_val(pmd);
777 return (val & ~_PAGE_KNL_ERRATUM_MASK) == 0;
780 static inline unsigned long pmd_page_vaddr(pmd_t pmd)
782 return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd));
786 * Currently stuck as a macro due to indirect forward reference to
787 * linux/mmzone.h's __section_mem_map_addr() definition:
789 #define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd))
792 * the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
794 * this macro returns the index of the entry in the pmd page which would
795 * control the given virtual address
797 static inline unsigned long pmd_index(unsigned long address)
799 return (address >> PMD_SHIFT) & (PTRS_PER_PMD - 1);
803 * Conversion functions: convert a page and protection to a page entry,
804 * and a page entry and page directory to the page they refer to.
806 * (Currently stuck as a macro because of indirect forward reference
807 * to linux/mm.h:page_to_nid())
809 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
812 * the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
814 * this function returns the index of the entry in the pte page which would
815 * control the given virtual address
817 static inline unsigned long pte_index(unsigned long address)
819 return (address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1);
822 static inline pte_t *pte_offset_kernel(pmd_t *pmd, unsigned long address)
824 return (pte_t *)pmd_page_vaddr(*pmd) + pte_index(address);
827 static inline int pmd_bad(pmd_t pmd)
829 return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
832 static inline unsigned long pages_to_mb(unsigned long npg)
834 return npg >> (20 - PAGE_SHIFT);
837 #if CONFIG_PGTABLE_LEVELS > 2
838 static inline int pud_none(pud_t pud)
840 return (native_pud_val(pud) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0;
843 static inline int pud_present(pud_t pud)
845 return pud_flags(pud) & _PAGE_PRESENT;
848 static inline unsigned long pud_page_vaddr(pud_t pud)
850 return (unsigned long)__va(pud_val(pud) & pud_pfn_mask(pud));
854 * Currently stuck as a macro due to indirect forward reference to
855 * linux/mmzone.h's __section_mem_map_addr() definition:
857 #define pud_page(pud) pfn_to_page(pud_pfn(pud))
859 /* Find an entry in the second-level page table.. */
860 static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
862 return (pmd_t *)pud_page_vaddr(*pud) + pmd_index(address);
865 static inline int pud_large(pud_t pud)
867 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
868 (_PAGE_PSE | _PAGE_PRESENT);
871 static inline int pud_bad(pud_t pud)
873 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
876 static inline int pud_large(pud_t pud)
880 #endif /* CONFIG_PGTABLE_LEVELS > 2 */
882 static inline unsigned long pud_index(unsigned long address)
884 return (address >> PUD_SHIFT) & (PTRS_PER_PUD - 1);
887 #if CONFIG_PGTABLE_LEVELS > 3
888 static inline int p4d_none(p4d_t p4d)
890 return (native_p4d_val(p4d) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0;
893 static inline int p4d_present(p4d_t p4d)
895 return p4d_flags(p4d) & _PAGE_PRESENT;
898 static inline unsigned long p4d_page_vaddr(p4d_t p4d)
900 return (unsigned long)__va(p4d_val(p4d) & p4d_pfn_mask(p4d));
904 * Currently stuck as a macro due to indirect forward reference to
905 * linux/mmzone.h's __section_mem_map_addr() definition:
907 #define p4d_page(p4d) pfn_to_page(p4d_pfn(p4d))
909 /* Find an entry in the third-level page table.. */
910 static inline pud_t *pud_offset(p4d_t *p4d, unsigned long address)
912 return (pud_t *)p4d_page_vaddr(*p4d) + pud_index(address);
915 static inline int p4d_bad(p4d_t p4d)
917 unsigned long ignore_flags = _KERNPG_TABLE | _PAGE_USER;
919 if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION))
920 ignore_flags |= _PAGE_NX;
922 return (p4d_flags(p4d) & ~ignore_flags) != 0;
924 #endif /* CONFIG_PGTABLE_LEVELS > 3 */
926 static inline unsigned long p4d_index(unsigned long address)
928 return (address >> P4D_SHIFT) & (PTRS_PER_P4D - 1);
931 #if CONFIG_PGTABLE_LEVELS > 4
932 static inline int pgd_present(pgd_t pgd)
934 if (!pgtable_l5_enabled())
936 return pgd_flags(pgd) & _PAGE_PRESENT;
939 static inline unsigned long pgd_page_vaddr(pgd_t pgd)
941 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
945 * Currently stuck as a macro due to indirect forward reference to
946 * linux/mmzone.h's __section_mem_map_addr() definition:
948 #define pgd_page(pgd) pfn_to_page(pgd_pfn(pgd))
950 /* to find an entry in a page-table-directory. */
951 static inline p4d_t *p4d_offset(pgd_t *pgd, unsigned long address)
953 if (!pgtable_l5_enabled())
955 return (p4d_t *)pgd_page_vaddr(*pgd) + p4d_index(address);
958 static inline int pgd_bad(pgd_t pgd)
960 unsigned long ignore_flags = _PAGE_USER;
962 if (!pgtable_l5_enabled())
965 if (IS_ENABLED(CONFIG_PAGE_TABLE_ISOLATION))
966 ignore_flags |= _PAGE_NX;
968 return (pgd_flags(pgd) & ~ignore_flags) != _KERNPG_TABLE;
971 static inline int pgd_none(pgd_t pgd)
973 if (!pgtable_l5_enabled())
976 * There is no need to do a workaround for the KNL stray
977 * A/D bit erratum here. PGDs only point to page tables
978 * except on 32-bit non-PAE which is not supported on
981 return !native_pgd_val(pgd);
983 #endif /* CONFIG_PGTABLE_LEVELS > 4 */
985 #endif /* __ASSEMBLY__ */
988 * the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
990 * this macro returns the index of the entry in the pgd page which would
991 * control the given virtual address
993 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
996 * pgd_offset() returns a (pgd_t *)
997 * pgd_index() is used get the offset into the pgd page's array of pgd_t's;
999 #define pgd_offset_pgd(pgd, address) (pgd + pgd_index((address)))
1001 * a shortcut to get a pgd_t in a given mm
1003 #define pgd_offset(mm, address) pgd_offset_pgd((mm)->pgd, (address))
1005 * a shortcut which implies the use of the kernel's pgd, instead
1008 #define pgd_offset_k(address) pgd_offset(&init_mm, (address))
1011 #define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
1012 #define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
1014 #ifndef __ASSEMBLY__
1016 extern int direct_gbpages;
1017 void init_mem_mapping(void);
1018 void early_alloc_pgt_buf(void);
1019 extern void memblock_find_dma_reserve(void);
1021 #ifdef CONFIG_X86_64
1022 /* Realmode trampoline initialization. */
1023 extern pgd_t trampoline_pgd_entry;
1024 static inline void __meminit init_trampoline_default(void)
1026 /* Default trampoline pgd value */
1027 trampoline_pgd_entry = init_top_pgt[pgd_index(__PAGE_OFFSET)];
1029 # ifdef CONFIG_RANDOMIZE_MEMORY
1030 void __meminit init_trampoline(void);
1032 # define init_trampoline init_trampoline_default
1035 static inline void init_trampoline(void) { }
1038 /* local pte updates need not use xchg for locking */
1039 static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
1043 /* Pure native function needs no input for mm, addr */
1044 native_pte_clear(NULL, 0, ptep);
1048 static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp)
1052 native_pmd_clear(pmdp);
1056 static inline pud_t native_local_pudp_get_and_clear(pud_t *pudp)
1060 native_pud_clear(pudp);
1064 static inline void native_set_pte_at(struct mm_struct *mm, unsigned long addr,
1065 pte_t *ptep , pte_t pte)
1067 native_set_pte(ptep, pte);
1070 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
1071 pmd_t *pmdp, pmd_t pmd)
1073 native_set_pmd(pmdp, pmd);
1076 static inline void set_pud_at(struct mm_struct *mm, unsigned long addr,
1077 pud_t *pudp, pud_t pud)
1079 native_set_pud(pudp, pud);
1083 * We only update the dirty/accessed state if we set
1084 * the dirty bit by hand in the kernel, since the hardware
1085 * will do the accessed bit for us, and we don't want to
1086 * race with other CPU's that might be updating the dirty
1087 * bit at the same time.
1089 struct vm_area_struct;
1091 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
1092 extern int ptep_set_access_flags(struct vm_area_struct *vma,
1093 unsigned long address, pte_t *ptep,
1094 pte_t entry, int dirty);
1096 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
1097 extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
1098 unsigned long addr, pte_t *ptep);
1100 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
1101 extern int ptep_clear_flush_young(struct vm_area_struct *vma,
1102 unsigned long address, pte_t *ptep);
1104 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
1105 static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
1108 pte_t pte = native_ptep_get_and_clear(ptep);
1112 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
1113 static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
1114 unsigned long addr, pte_t *ptep,
1120 * Full address destruction in progress; paravirt does not
1121 * care about updates and native needs no locking
1123 pte = native_local_ptep_get_and_clear(ptep);
1125 pte = ptep_get_and_clear(mm, addr, ptep);
1130 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
1131 static inline void ptep_set_wrprotect(struct mm_struct *mm,
1132 unsigned long addr, pte_t *ptep)
1134 clear_bit(_PAGE_BIT_RW, (unsigned long *)&ptep->pte);
1137 #define flush_tlb_fix_spurious_fault(vma, address) do { } while (0)
1139 #define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
1141 #define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
1142 extern int pmdp_set_access_flags(struct vm_area_struct *vma,
1143 unsigned long address, pmd_t *pmdp,
1144 pmd_t entry, int dirty);
1145 extern int pudp_set_access_flags(struct vm_area_struct *vma,
1146 unsigned long address, pud_t *pudp,
1147 pud_t entry, int dirty);
1149 #define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
1150 extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
1151 unsigned long addr, pmd_t *pmdp);
1152 extern int pudp_test_and_clear_young(struct vm_area_struct *vma,
1153 unsigned long addr, pud_t *pudp);
1155 #define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
1156 extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
1157 unsigned long address, pmd_t *pmdp);
1160 #define pmd_write pmd_write
1161 static inline int pmd_write(pmd_t pmd)
1163 return pmd_flags(pmd) & _PAGE_RW;
1166 #define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
1167 static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr,
1170 return native_pmdp_get_and_clear(pmdp);
1173 #define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
1174 static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
1175 unsigned long addr, pud_t *pudp)
1177 return native_pudp_get_and_clear(pudp);
1180 #define __HAVE_ARCH_PMDP_SET_WRPROTECT
1181 static inline void pmdp_set_wrprotect(struct mm_struct *mm,
1182 unsigned long addr, pmd_t *pmdp)
1184 clear_bit(_PAGE_BIT_RW, (unsigned long *)pmdp);
1187 #define pud_write pud_write
1188 static inline int pud_write(pud_t pud)
1190 return pud_flags(pud) & _PAGE_RW;
1193 #ifndef pmdp_establish
1194 #define pmdp_establish pmdp_establish
1195 static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
1196 unsigned long address, pmd_t *pmdp, pmd_t pmd)
1198 if (IS_ENABLED(CONFIG_SMP)) {
1199 return xchg(pmdp, pmd);
1202 WRITE_ONCE(*pmdp, pmd);
1208 * Page table pages are page-aligned. The lower half of the top
1209 * level is used for userspace and the top half for the kernel.
1211 * Returns true for parts of the PGD that map userspace and
1212 * false for the parts that map the kernel.
1214 static inline bool pgdp_maps_userspace(void *__ptr)
1216 unsigned long ptr = (unsigned long)__ptr;
1218 return (((ptr & ~PAGE_MASK) / sizeof(pgd_t)) < PGD_KERNEL_START);
1221 static inline int pgd_large(pgd_t pgd) { return 0; }
1223 #ifdef CONFIG_PAGE_TABLE_ISOLATION
1225 * All top-level PAGE_TABLE_ISOLATION page tables are order-1 pages
1226 * (8k-aligned and 8k in size). The kernel one is at the beginning 4k and
1227 * the user one is in the last 4k. To switch between them, you
1228 * just need to flip the 12th bit in their addresses.
1230 #define PTI_PGTABLE_SWITCH_BIT PAGE_SHIFT
1233 * This generates better code than the inline assembly in
1236 static inline void *ptr_set_bit(void *ptr, int bit)
1238 unsigned long __ptr = (unsigned long)ptr;
1241 return (void *)__ptr;
1243 static inline void *ptr_clear_bit(void *ptr, int bit)
1245 unsigned long __ptr = (unsigned long)ptr;
1248 return (void *)__ptr;
1251 static inline pgd_t *kernel_to_user_pgdp(pgd_t *pgdp)
1253 return ptr_set_bit(pgdp, PTI_PGTABLE_SWITCH_BIT);
1256 static inline pgd_t *user_to_kernel_pgdp(pgd_t *pgdp)
1258 return ptr_clear_bit(pgdp, PTI_PGTABLE_SWITCH_BIT);
1261 static inline p4d_t *kernel_to_user_p4dp(p4d_t *p4dp)
1263 return ptr_set_bit(p4dp, PTI_PGTABLE_SWITCH_BIT);
1266 static inline p4d_t *user_to_kernel_p4dp(p4d_t *p4dp)
1268 return ptr_clear_bit(p4dp, PTI_PGTABLE_SWITCH_BIT);
1270 #endif /* CONFIG_PAGE_TABLE_ISOLATION */
1273 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
1275 * dst - pointer to pgd range anwhere on a pgd page
1277 * count - the number of pgds to copy.
1279 * dst and src can be on the same page, but the range must not overlap,
1280 * and must not cross a page boundary.
1282 static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
1284 memcpy(dst, src, count * sizeof(pgd_t));
1285 #ifdef CONFIG_PAGE_TABLE_ISOLATION
1286 if (!static_cpu_has(X86_FEATURE_PTI))
1288 /* Clone the user space pgd as well */
1289 memcpy(kernel_to_user_pgdp(dst), kernel_to_user_pgdp(src),
1290 count * sizeof(pgd_t));
1294 #define PTE_SHIFT ilog2(PTRS_PER_PTE)
1295 static inline int page_level_shift(enum pg_level level)
1297 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT;
1299 static inline unsigned long page_level_size(enum pg_level level)
1301 return 1UL << page_level_shift(level);
1303 static inline unsigned long page_level_mask(enum pg_level level)
1305 return ~(page_level_size(level) - 1);
1309 * The x86 doesn't have any external MMU info: the kernel page
1310 * tables contain all the necessary information.
1312 static inline void update_mmu_cache(struct vm_area_struct *vma,
1313 unsigned long addr, pte_t *ptep)
1316 static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
1317 unsigned long addr, pmd_t *pmd)
1320 static inline void update_mmu_cache_pud(struct vm_area_struct *vma,
1321 unsigned long addr, pud_t *pud)
1325 #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
1326 static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
1328 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY);
1331 static inline int pte_swp_soft_dirty(pte_t pte)
1333 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY;
1336 static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
1338 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY);
1341 #ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION
1342 static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
1344 return pmd_set_flags(pmd, _PAGE_SWP_SOFT_DIRTY);
1347 static inline int pmd_swp_soft_dirty(pmd_t pmd)
1349 return pmd_flags(pmd) & _PAGE_SWP_SOFT_DIRTY;
1352 static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
1354 return pmd_clear_flags(pmd, _PAGE_SWP_SOFT_DIRTY);
1359 #define PKRU_AD_BIT 0x1
1360 #define PKRU_WD_BIT 0x2
1361 #define PKRU_BITS_PER_PKEY 2
1363 static inline bool __pkru_allows_read(u32 pkru, u16 pkey)
1365 int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY;
1366 return !(pkru & (PKRU_AD_BIT << pkru_pkey_bits));
1369 static inline bool __pkru_allows_write(u32 pkru, u16 pkey)
1371 int pkru_pkey_bits = pkey * PKRU_BITS_PER_PKEY;
1373 * Access-disable disables writes too so we need to check
1376 return !(pkru & ((PKRU_AD_BIT|PKRU_WD_BIT) << pkru_pkey_bits));
1379 static inline u16 pte_flags_pkey(unsigned long pte_flags)
1381 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
1382 /* ifdef to avoid doing 59-bit shift on 32-bit values */
1383 return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0;
1389 static inline bool __pkru_allows_pkey(u16 pkey, bool write)
1391 u32 pkru = read_pkru();
1393 if (!__pkru_allows_read(pkru, pkey))
1395 if (write && !__pkru_allows_write(pkru, pkey))
1402 * 'pteval' can come from a PTE, PMD or PUD. We only check
1403 * _PAGE_PRESENT, _PAGE_USER, and _PAGE_RW in here which are the
1404 * same value on all 3 types.
1406 static inline bool __pte_access_permitted(unsigned long pteval, bool write)
1408 unsigned long need_pte_bits = _PAGE_PRESENT|_PAGE_USER;
1411 need_pte_bits |= _PAGE_RW;
1413 if ((pteval & need_pte_bits) != need_pte_bits)
1416 return __pkru_allows_pkey(pte_flags_pkey(pteval), write);
1419 #define pte_access_permitted pte_access_permitted
1420 static inline bool pte_access_permitted(pte_t pte, bool write)
1422 return __pte_access_permitted(pte_val(pte), write);
1425 #define pmd_access_permitted pmd_access_permitted
1426 static inline bool pmd_access_permitted(pmd_t pmd, bool write)
1428 return __pte_access_permitted(pmd_val(pmd), write);
1431 #define pud_access_permitted pud_access_permitted
1432 static inline bool pud_access_permitted(pud_t pud, bool write)
1434 return __pte_access_permitted(pud_val(pud), write);
1437 #define __HAVE_ARCH_PFN_MODIFY_ALLOWED 1
1438 extern bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot);
1440 static inline bool arch_has_pfn_modify_check(void)
1442 return boot_cpu_has_bug(X86_BUG_L1TF);
1445 #include <asm-generic/pgtable.h>
1446 #endif /* __ASSEMBLY__ */
1448 #endif /* _ASM_X86_PGTABLE_H */