arch/x86/include/asm/paravirt.h

   1 #ifndef _ASM_X86_PARAVIRT_H
   2 #define _ASM_X86_PARAVIRT_H
   3 /* Various instructions on x86 need to be replaced for
   4  * para-virtualization: those hooks are defined here. */
   5
   6 #ifdef CONFIG_PARAVIRT
   7 #include <asm/pgtable_types.h>
   8 #include <asm/asm.h>
   9 #include <asm/nospec-branch.h>
  10
  11 #include <asm/paravirt_types.h>
  12
  13 #ifndef __ASSEMBLY__
  14 #include <linux/bug.h>
  15 #include <linux/types.h>
  16 #include <linux/cpumask.h>
  17 #include <asm/frame.h>
  18
  19 static inline void load_sp0(struct tss_struct *tss,
  20                              struct thread_struct *thread)
  21 {
  22         PVOP_VCALL2(pv_cpu_ops.load_sp0, tss, thread);
  23 }
  24
  25 /* The paravirtualized CPUID instruction. */
  26 static inline void __cpuid(unsigned int *eax, unsigned int *ebx,
  27                            unsigned int *ecx, unsigned int *edx)
  28 {
  29         PVOP_VCALL4(pv_cpu_ops.cpuid, eax, ebx, ecx, edx);
  30 }
  31
  32 /*
  33  * These special macros can be used to get or set a debugging register
  34  */
  35 static inline unsigned long paravirt_get_debugreg(int reg)
  36 {
  37         return PVOP_CALL1(unsigned long, pv_cpu_ops.get_debugreg, reg);
  38 }
  39 #define get_debugreg(var, reg) var = paravirt_get_debugreg(reg)
  40 static inline void set_debugreg(unsigned long val, int reg)
  41 {
  42         PVOP_VCALL2(pv_cpu_ops.set_debugreg, reg, val);
  43 }
  44
  45 static inline void clts(void)
  46 {
  47         PVOP_VCALL0(pv_cpu_ops.clts);
  48 }
  49
  50 static inline unsigned long read_cr0(void)
  51 {
  52         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr0);
  53 }
  54
  55 static inline void write_cr0(unsigned long x)
  56 {
  57         PVOP_VCALL1(pv_cpu_ops.write_cr0, x);
  58 }
  59
  60 static inline unsigned long read_cr2(void)
  61 {
  62         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr2);
  63 }
  64
  65 static inline void write_cr2(unsigned long x)
  66 {
  67         PVOP_VCALL1(pv_mmu_ops.write_cr2, x);
  68 }
  69
  70 static inline unsigned long read_cr3(void)
  71 {
  72         return PVOP_CALL0(unsigned long, pv_mmu_ops.read_cr3);
  73 }
  74
  75 static inline void write_cr3(unsigned long x)
  76 {
  77         PVOP_VCALL1(pv_mmu_ops.write_cr3, x);
  78 }
  79
  80 static inline unsigned long __read_cr4(void)
  81 {
  82         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr4);
  83 }
  84
  85 static inline void __write_cr4(unsigned long x)
  86 {
  87         PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
  88 }
  89
  90 #ifdef CONFIG_X86_64
  91 static inline unsigned long read_cr8(void)
  92 {
  93         return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
  94 }
  95
  96 static inline void write_cr8(unsigned long x)
  97 {
  98         PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
  99 }
 100 #endif
 101
 102 static inline void arch_safe_halt(void)
 103 {
 104         PVOP_VCALL0(pv_irq_ops.safe_halt);
 105 }
 106
 107 static inline void halt(void)
 108 {
 109         PVOP_VCALL0(pv_irq_ops.halt);
 110 }
 111
 112 static inline void wbinvd(void)
 113 {
 114         PVOP_VCALL0(pv_cpu_ops.wbinvd);
 115 }
 116
 117 #define get_kernel_rpl()  (pv_info.kernel_rpl)
 118
 119 static inline u64 paravirt_read_msr(unsigned msr)
 120 {
 121         return PVOP_CALL1(u64, pv_cpu_ops.read_msr, msr);
 122 }
 123
 124 static inline void paravirt_write_msr(unsigned msr,
 125                                       unsigned low, unsigned high)
 126 {
 127         return PVOP_VCALL3(pv_cpu_ops.write_msr, msr, low, high);
 128 }
 129
 130 static inline u64 paravirt_read_msr_safe(unsigned msr, int *err)
 131 {
 132         return PVOP_CALL2(u64, pv_cpu_ops.read_msr_safe, msr, err);
 133 }
 134
 135 static inline int paravirt_write_msr_safe(unsigned msr,
 136                                           unsigned low, unsigned high)
 137 {
 138         return PVOP_CALL3(int, pv_cpu_ops.write_msr_safe, msr, low, high);
 139 }
 140
 141 #define rdmsr(msr, val1, val2)                  \
 142 do {                                            \
 143         u64 _l = paravirt_read_msr(msr);        \
 144         val1 = (u32)_l;                         \
 145         val2 = _l >> 32;                        \
 146 } while (0)
 147
 148 #define wrmsr(msr, val1, val2)                  \
 149 do {                                            \
 150         paravirt_write_msr(msr, val1, val2);    \
 151 } while (0)
 152
 153 #define rdmsrl(msr, val)                        \
 154 do {                                            \
 155         val = paravirt_read_msr(msr);           \
 156 } while (0)
 157
 158 static inline void wrmsrl(unsigned msr, u64 val)
 159 {
 160         wrmsr(msr, (u32)val, (u32)(val>>32));
 161 }
 162
 163 #define wrmsr_safe(msr, a, b)   paravirt_write_msr_safe(msr, a, b)
 164
 165 /* rdmsr with exception handling */
 166 #define rdmsr_safe(msr, a, b)                           \
 167 ({                                                      \
 168         int _err;                                       \
 169         u64 _l = paravirt_read_msr_safe(msr, &_err);    \
 170         (*a) = (u32)_l;                                 \
 171         (*b) = _l >> 32;                                \
 172         _err;                                           \
 173 })
 174
 175 static inline int rdmsrl_safe(unsigned msr, unsigned long long *p)
 176 {
 177         int err;
 178
 179         *p = paravirt_read_msr_safe(msr, &err);
 180         return err;
 181 }
 182
 183 static inline unsigned long long paravirt_sched_clock(void)
 184 {
 185         return PVOP_CALL0(unsigned long long, pv_time_ops.sched_clock);
 186 }
 187
 188 struct static_key;
 189 extern struct static_key paravirt_steal_enabled;
 190 extern struct static_key paravirt_steal_rq_enabled;
 191
 192 static inline u64 paravirt_steal_clock(int cpu)
 193 {
 194         return PVOP_CALL1(u64, pv_time_ops.steal_clock, cpu);
 195 }
 196
 197 static inline unsigned long long paravirt_read_pmc(int counter)
 198 {
 199         return PVOP_CALL1(u64, pv_cpu_ops.read_pmc, counter);
 200 }
 201
 202 #define rdpmc(counter, low, high)               \
 203 do {                                            \
 204         u64 _l = paravirt_read_pmc(counter);    \
 205         low = (u32)_l;                          \
 206         high = _l >> 32;                        \
 207 } while (0)
 208
 209 #define rdpmcl(counter, val) ((val) = paravirt_read_pmc(counter))
 210
 211 static inline void paravirt_alloc_ldt(struct desc_struct *ldt, unsigned entries)
 212 {
 213         PVOP_VCALL2(pv_cpu_ops.alloc_ldt, ldt, entries);
 214 }
 215
 216 static inline void paravirt_free_ldt(struct desc_struct *ldt, unsigned entries)
 217 {
 218         PVOP_VCALL2(pv_cpu_ops.free_ldt, ldt, entries);
 219 }
 220
 221 static inline void load_TR_desc(void)
 222 {
 223         PVOP_VCALL0(pv_cpu_ops.load_tr_desc);
 224 }
 225 static inline void load_gdt(const struct desc_ptr *dtr)
 226 {
 227         PVOP_VCALL1(pv_cpu_ops.load_gdt, dtr);
 228 }
 229 static inline void load_idt(const struct desc_ptr *dtr)
 230 {
 231         PVOP_VCALL1(pv_cpu_ops.load_idt, dtr);
 232 }
 233 static inline void set_ldt(const void *addr, unsigned entries)
 234 {
 235         PVOP_VCALL2(pv_cpu_ops.set_ldt, addr, entries);
 236 }
 237 static inline void store_idt(struct desc_ptr *dtr)
 238 {
 239         PVOP_VCALL1(pv_cpu_ops.store_idt, dtr);
 240 }
 241 static inline unsigned long paravirt_store_tr(void)
 242 {
 243         return PVOP_CALL0(unsigned long, pv_cpu_ops.store_tr);
 244 }
 245 #define store_tr(tr)    ((tr) = paravirt_store_tr())
 246 static inline void load_TLS(struct thread_struct *t, unsigned cpu)
 247 {
 248         PVOP_VCALL2(pv_cpu_ops.load_tls, t, cpu);
 249 }
 250
 251 #ifdef CONFIG_X86_64
 252 static inline void load_gs_index(unsigned int gs)
 253 {
 254         PVOP_VCALL1(pv_cpu_ops.load_gs_index, gs);
 255 }
 256 #endif
 257
 258 static inline void write_ldt_entry(struct desc_struct *dt, int entry,
 259                                    const void *desc)
 260 {
 261         PVOP_VCALL3(pv_cpu_ops.write_ldt_entry, dt, entry, desc);
 262 }
 263
 264 static inline void write_gdt_entry(struct desc_struct *dt, int entry,
 265                                    void *desc, int type)
 266 {
 267         PVOP_VCALL4(pv_cpu_ops.write_gdt_entry, dt, entry, desc, type);
 268 }
 269
 270 static inline void write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
 271 {
 272         PVOP_VCALL3(pv_cpu_ops.write_idt_entry, dt, entry, g);
 273 }
 274 static inline void set_iopl_mask(unsigned mask)
 275 {
 276         PVOP_VCALL1(pv_cpu_ops.set_iopl_mask, mask);
 277 }
 278
 279 /* The paravirtualized I/O functions */
 280 static inline void slow_down_io(void)
 281 {
 282         pv_cpu_ops.io_delay();
 283 #ifdef REALLY_SLOW_IO
 284         pv_cpu_ops.io_delay();
 285         pv_cpu_ops.io_delay();
 286         pv_cpu_ops.io_delay();
 287 #endif
 288 }
 289
 290 static inline void paravirt_activate_mm(struct mm_struct *prev,
 291                                         struct mm_struct *next)
 292 {
 293         PVOP_VCALL2(pv_mmu_ops.activate_mm, prev, next);
 294 }
 295
 296 static inline void paravirt_arch_dup_mmap(struct mm_struct *oldmm,
 297                                           struct mm_struct *mm)
 298 {
 299         PVOP_VCALL2(pv_mmu_ops.dup_mmap, oldmm, mm);
 300 }
 301
 302 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
 303 {
 304         PVOP_VCALL1(pv_mmu_ops.exit_mmap, mm);
 305 }
 306
 307 static inline void __flush_tlb(void)
 308 {
 309         PVOP_VCALL0(pv_mmu_ops.flush_tlb_user);
 310 }
 311 static inline void __flush_tlb_global(void)
 312 {
 313         PVOP_VCALL0(pv_mmu_ops.flush_tlb_kernel);
 314 }
 315 static inline void __flush_tlb_single(unsigned long addr)
 316 {
 317         PVOP_VCALL1(pv_mmu_ops.flush_tlb_single, addr);
 318 }
 319
 320 static inline void flush_tlb_others(const struct cpumask *cpumask,
 321                                     struct mm_struct *mm,
 322                                     unsigned long start,
 323                                     unsigned long end)
 324 {
 325         PVOP_VCALL4(pv_mmu_ops.flush_tlb_others, cpumask, mm, start, end);
 326 }
 327
 328 static inline int paravirt_pgd_alloc(struct mm_struct *mm)
 329 {
 330         return PVOP_CALL1(int, pv_mmu_ops.pgd_alloc, mm);
 331 }
 332
 333 static inline void paravirt_pgd_free(struct mm_struct *mm, pgd_t *pgd)
 334 {
 335         PVOP_VCALL2(pv_mmu_ops.pgd_free, mm, pgd);
 336 }
 337
 338 static inline void paravirt_alloc_pte(struct mm_struct *mm, unsigned long pfn)
 339 {
 340         PVOP_VCALL2(pv_mmu_ops.alloc_pte, mm, pfn);
 341 }
 342 static inline void paravirt_release_pte(unsigned long pfn)
 343 {
 344         PVOP_VCALL1(pv_mmu_ops.release_pte, pfn);
 345 }
 346
 347 static inline void paravirt_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
 348 {
 349         PVOP_VCALL2(pv_mmu_ops.alloc_pmd, mm, pfn);
 350 }
 351
 352 static inline void paravirt_release_pmd(unsigned long pfn)
 353 {
 354         PVOP_VCALL1(pv_mmu_ops.release_pmd, pfn);
 355 }
 356
 357 static inline void paravirt_alloc_pud(struct mm_struct *mm, unsigned long pfn)
 358 {
 359         PVOP_VCALL2(pv_mmu_ops.alloc_pud, mm, pfn);
 360 }
 361 static inline void paravirt_release_pud(unsigned long pfn)
 362 {
 363         PVOP_VCALL1(pv_mmu_ops.release_pud, pfn);
 364 }
 365
 366 static inline void pte_update(struct mm_struct *mm, unsigned long addr,
 367                               pte_t *ptep)
 368 {
 369         PVOP_VCALL3(pv_mmu_ops.pte_update, mm, addr, ptep);
 370 }
 371
 372 static inline pte_t __pte(pteval_t val)
 373 {
 374         pteval_t ret;
 375
 376         if (sizeof(pteval_t) > sizeof(long))
 377                 ret = PVOP_CALLEE2(pteval_t,
 378                                    pv_mmu_ops.make_pte,
 379                                    val, (u64)val >> 32);
 380         else
 381                 ret = PVOP_CALLEE1(pteval_t,
 382                                    pv_mmu_ops.make_pte,
 383                                    val);
 384
 385         return (pte_t) { .pte = ret };
 386 }
 387
 388 static inline pteval_t pte_val(pte_t pte)
 389 {
 390         pteval_t ret;
 391
 392         if (sizeof(pteval_t) > sizeof(long))
 393                 ret = PVOP_CALLEE2(pteval_t, pv_mmu_ops.pte_val,
 394                                    pte.pte, (u64)pte.pte >> 32);
 395         else
 396                 ret = PVOP_CALLEE1(pteval_t, pv_mmu_ops.pte_val,
 397                                    pte.pte);
 398
 399         return ret;
 400 }
 401
 402 static inline pgd_t __pgd(pgdval_t val)
 403 {
 404         pgdval_t ret;
 405
 406         if (sizeof(pgdval_t) > sizeof(long))
 407                 ret = PVOP_CALLEE2(pgdval_t, pv_mmu_ops.make_pgd,
 408                                    val, (u64)val >> 32);
 409         else
 410                 ret = PVOP_CALLEE1(pgdval_t, pv_mmu_ops.make_pgd,
 411                                    val);
 412
 413         return (pgd_t) { ret };
 414 }
 415
 416 static inline pgdval_t pgd_val(pgd_t pgd)
 417 {
 418         pgdval_t ret;
 419
 420         if (sizeof(pgdval_t) > sizeof(long))
 421                 ret =  PVOP_CALLEE2(pgdval_t, pv_mmu_ops.pgd_val,
 422                                     pgd.pgd, (u64)pgd.pgd >> 32);
 423         else
 424                 ret =  PVOP_CALLEE1(pgdval_t, pv_mmu_ops.pgd_val,
 425                                     pgd.pgd);
 426
 427         return ret;
 428 }
 429
 430 #define  __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
 431 static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, unsigned long addr,
 432                                            pte_t *ptep)
 433 {
 434         pteval_t ret;
 435
 436         ret = PVOP_CALL3(pteval_t, pv_mmu_ops.ptep_modify_prot_start,
 437                          mm, addr, ptep);
 438
 439         return (pte_t) { .pte = ret };
 440 }
 441
 442 static inline void ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
 443                                            pte_t *ptep, pte_t pte)
 444 {
 445         if (sizeof(pteval_t) > sizeof(long))
 446                 /* 5 arg words */
 447                 pv_mmu_ops.ptep_modify_prot_commit(mm, addr, ptep, pte);
 448         else
 449                 PVOP_VCALL4(pv_mmu_ops.ptep_modify_prot_commit,
 450                             mm, addr, ptep, pte.pte);
 451 }
 452
 453 static inline void set_pte(pte_t *ptep, pte_t pte)
 454 {
 455         if (sizeof(pteval_t) > sizeof(long))
 456                 PVOP_VCALL3(pv_mmu_ops.set_pte, ptep,
 457                             pte.pte, (u64)pte.pte >> 32);
 458         else
 459                 PVOP_VCALL2(pv_mmu_ops.set_pte, ptep,
 460                             pte.pte);
 461 }
 462
 463 static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
 464                               pte_t *ptep, pte_t pte)
 465 {
 466         if (sizeof(pteval_t) > sizeof(long))
 467                 /* 5 arg words */
 468                 pv_mmu_ops.set_pte_at(mm, addr, ptep, pte);
 469         else
 470                 PVOP_VCALL4(pv_mmu_ops.set_pte_at, mm, addr, ptep, pte.pte);
 471 }
 472
 473 static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
 474                               pmd_t *pmdp, pmd_t pmd)
 475 {
 476         if (sizeof(pmdval_t) > sizeof(long))
 477                 /* 5 arg words */
 478                 pv_mmu_ops.set_pmd_at(mm, addr, pmdp, pmd);
 479         else
 480                 PVOP_VCALL4(pv_mmu_ops.set_pmd_at, mm, addr, pmdp,
 481                             native_pmd_val(pmd));
 482 }
 483
 484 static inline void set_pmd(pmd_t *pmdp, pmd_t pmd)
 485 {
 486         pmdval_t val = native_pmd_val(pmd);
 487
 488         if (sizeof(pmdval_t) > sizeof(long))
 489                 PVOP_VCALL3(pv_mmu_ops.set_pmd, pmdp, val, (u64)val >> 32);
 490         else
 491                 PVOP_VCALL2(pv_mmu_ops.set_pmd, pmdp, val);
 492 }
 493
 494 #if CONFIG_PGTABLE_LEVELS >= 3
 495 static inline pmd_t __pmd(pmdval_t val)
 496 {
 497         pmdval_t ret;
 498
 499         if (sizeof(pmdval_t) > sizeof(long))
 500                 ret = PVOP_CALLEE2(pmdval_t, pv_mmu_ops.make_pmd,
 501                                    val, (u64)val >> 32);
 502         else
 503                 ret = PVOP_CALLEE1(pmdval_t, pv_mmu_ops.make_pmd,
 504                                    val);
 505
 506         return (pmd_t) { ret };
 507 }
 508
 509 static inline pmdval_t pmd_val(pmd_t pmd)
 510 {
 511         pmdval_t ret;
 512
 513         if (sizeof(pmdval_t) > sizeof(long))
 514                 ret =  PVOP_CALLEE2(pmdval_t, pv_mmu_ops.pmd_val,
 515                                     pmd.pmd, (u64)pmd.pmd >> 32);
 516         else
 517                 ret =  PVOP_CALLEE1(pmdval_t, pv_mmu_ops.pmd_val,
 518                                     pmd.pmd);
 519
 520         return ret;
 521 }
 522
 523 static inline void set_pud(pud_t *pudp, pud_t pud)
 524 {
 525         pudval_t val = native_pud_val(pud);
 526
 527         if (sizeof(pudval_t) > sizeof(long))
 528                 PVOP_VCALL3(pv_mmu_ops.set_pud, pudp,
 529                             val, (u64)val >> 32);
 530         else
 531                 PVOP_VCALL2(pv_mmu_ops.set_pud, pudp,
 532                             val);
 533 }
 534 #if CONFIG_PGTABLE_LEVELS == 4
 535 static inline pud_t __pud(pudval_t val)
 536 {
 537         pudval_t ret;
 538
 539         if (sizeof(pudval_t) > sizeof(long))
 540                 ret = PVOP_CALLEE2(pudval_t, pv_mmu_ops.make_pud,
 541                                    val, (u64)val >> 32);
 542         else
 543                 ret = PVOP_CALLEE1(pudval_t, pv_mmu_ops.make_pud,
 544                                    val);
 545
 546         return (pud_t) { ret };
 547 }
 548
 549 static inline pudval_t pud_val(pud_t pud)
 550 {
 551         pudval_t ret;
 552
 553         if (sizeof(pudval_t) > sizeof(long))
 554                 ret =  PVOP_CALLEE2(pudval_t, pv_mmu_ops.pud_val,
 555                                     pud.pud, (u64)pud.pud >> 32);
 556         else
 557                 ret =  PVOP_CALLEE1(pudval_t, pv_mmu_ops.pud_val,
 558                                     pud.pud);
 559
 560         return ret;
 561 }
 562
 563 static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
 564 {
 565         pgdval_t val = native_pgd_val(pgd);
 566
 567         if (sizeof(pgdval_t) > sizeof(long))
 568                 PVOP_VCALL3(pv_mmu_ops.set_pgd, pgdp,
 569                             val, (u64)val >> 32);
 570         else
 571                 PVOP_VCALL2(pv_mmu_ops.set_pgd, pgdp,
 572                             val);
 573 }
 574
 575 static inline void pgd_clear(pgd_t *pgdp)
 576 {
 577         set_pgd(pgdp, __pgd(0));
 578 }
 579
 580 static inline void pud_clear(pud_t *pudp)
 581 {
 582         set_pud(pudp, __pud(0));
 583 }
 584
 585 #endif  /* CONFIG_PGTABLE_LEVELS == 4 */
 586
 587 #endif  /* CONFIG_PGTABLE_LEVELS >= 3 */
 588
 589 #ifdef CONFIG_X86_PAE
 590 /* Special-case pte-setting operations for PAE, which can't update a
 591    64-bit pte atomically */
 592 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
 593 {
 594         PVOP_VCALL3(pv_mmu_ops.set_pte_atomic, ptep,
 595                     pte.pte, pte.pte >> 32);
 596 }
 597
 598 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
 599                              pte_t *ptep)
 600 {
 601         PVOP_VCALL3(pv_mmu_ops.pte_clear, mm, addr, ptep);
 602 }
 603
 604 static inline void pmd_clear(pmd_t *pmdp)
 605 {
 606         PVOP_VCALL1(pv_mmu_ops.pmd_clear, pmdp);
 607 }
 608 #else  /* !CONFIG_X86_PAE */
 609 static inline void set_pte_atomic(pte_t *ptep, pte_t pte)
 610 {
 611         set_pte(ptep, pte);
 612 }
 613
 614 static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
 615                              pte_t *ptep)
 616 {
 617         set_pte_at(mm, addr, ptep, __pte(0));
 618 }
 619
 620 static inline void pmd_clear(pmd_t *pmdp)
 621 {
 622         set_pmd(pmdp, __pmd(0));
 623 }
 624 #endif  /* CONFIG_X86_PAE */
 625
 626 #define  __HAVE_ARCH_START_CONTEXT_SWITCH
 627 static inline void arch_start_context_switch(struct task_struct *prev)
 628 {
 629         PVOP_VCALL1(pv_cpu_ops.start_context_switch, prev);
 630 }
 631
 632 static inline void arch_end_context_switch(struct task_struct *next)
 633 {
 634         PVOP_VCALL1(pv_cpu_ops.end_context_switch, next);
 635 }
 636
 637 #define  __HAVE_ARCH_ENTER_LAZY_MMU_MODE
 638 static inline void arch_enter_lazy_mmu_mode(void)
 639 {
 640         PVOP_VCALL0(pv_mmu_ops.lazy_mode.enter);
 641 }
 642
 643 static inline void arch_leave_lazy_mmu_mode(void)
 644 {
 645         PVOP_VCALL0(pv_mmu_ops.lazy_mode.leave);
 646 }
 647
 648 static inline void arch_flush_lazy_mmu_mode(void)
 649 {
 650         PVOP_VCALL0(pv_mmu_ops.lazy_mode.flush);
 651 }
 652
 653 static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx,
 654                                 phys_addr_t phys, pgprot_t flags)
 655 {
 656         pv_mmu_ops.set_fixmap(idx, phys, flags);
 657 }
 658
 659 #if defined(CONFIG_SMP) && defined(CONFIG_PARAVIRT_SPINLOCKS)
 660
 661 static __always_inline void pv_queued_spin_lock_slowpath(struct qspinlock *lock,
 662                                                         u32 val)
 663 {
 664         PVOP_VCALL2(pv_lock_ops.queued_spin_lock_slowpath, lock, val);
 665 }
 666
 667 static __always_inline void pv_queued_spin_unlock(struct qspinlock *lock)
 668 {
 669         PVOP_VCALLEE1(pv_lock_ops.queued_spin_unlock, lock);
 670 }
 671
 672 static __always_inline void pv_wait(u8 *ptr, u8 val)
 673 {
 674         PVOP_VCALL2(pv_lock_ops.wait, ptr, val);
 675 }
 676
 677 static __always_inline void pv_kick(int cpu)
 678 {
 679         PVOP_VCALL1(pv_lock_ops.kick, cpu);
 680 }
 681
 682 #endif /* SMP && PARAVIRT_SPINLOCKS */
 683
 684 #ifdef CONFIG_X86_32
 685 #define PV_SAVE_REGS "pushl %ecx; pushl %edx;"
 686 #define PV_RESTORE_REGS "popl %edx; popl %ecx;"
 687
 688 /* save and restore all caller-save registers, except return value */
 689 #define PV_SAVE_ALL_CALLER_REGS         "pushl %ecx;"
 690 #define PV_RESTORE_ALL_CALLER_REGS      "popl  %ecx;"
 691
 692 #define PV_FLAGS_ARG "0"
 693 #define PV_EXTRA_CLOBBERS
 694 #define PV_VEXTRA_CLOBBERS
 695 #else
 696 /* save and restore all caller-save registers, except return value */
 697 #define PV_SAVE_ALL_CALLER_REGS                                         \
 698         "push %rcx;"                                                    \
 699         "push %rdx;"                                                    \
 700         "push %rsi;"                                                    \
 701         "push %rdi;"                                                    \
 702         "push %r8;"                                                     \
 703         "push %r9;"                                                     \
 704         "push %r10;"                                                    \
 705         "push %r11;"
 706 #define PV_RESTORE_ALL_CALLER_REGS                                      \
 707         "pop %r11;"                                                     \
 708         "pop %r10;"                                                     \
 709         "pop %r9;"                                                      \
 710         "pop %r8;"                                                      \
 711         "pop %rdi;"                                                     \
 712         "pop %rsi;"                                                     \
 713         "pop %rdx;"                                                     \
 714         "pop %rcx;"
 715
 716 /* We save some registers, but all of them, that's too much. We clobber all
 717  * caller saved registers but the argument parameter */
 718 #define PV_SAVE_REGS "pushq %%rdi;"
 719 #define PV_RESTORE_REGS "popq %%rdi;"
 720 #define PV_EXTRA_CLOBBERS EXTRA_CLOBBERS, "rcx" , "rdx", "rsi"
 721 #define PV_VEXTRA_CLOBBERS EXTRA_CLOBBERS, "rdi", "rcx" , "rdx", "rsi"
 722 #define PV_FLAGS_ARG "D"
 723 #endif
 724
 725 /*
 726  * Generate a thunk around a function which saves all caller-save
 727  * registers except for the return value.  This allows C functions to
 728  * be called from assembler code where fewer than normal registers are
 729  * available.  It may also help code generation around calls from C
 730  * code if the common case doesn't use many registers.
 731  *
 732  * When a callee is wrapped in a thunk, the caller can assume that all
 733  * arg regs and all scratch registers are preserved across the
 734  * call. The return value in rax/eax will not be saved, even for void
 735  * functions.
 736  */
 737 #define PV_THUNK_NAME(func) "__raw_callee_save_" #func
 738 #define PV_CALLEE_SAVE_REGS_THUNK(func)                                 \
 739         extern typeof(func) __raw_callee_save_##func;                   \
 740                                                                         \
 741         asm(".pushsection .text;"                                       \
 742             ".globl " PV_THUNK_NAME(func) ";"                           \
 743             ".type " PV_THUNK_NAME(func) ", @function;"                 \
 744             PV_THUNK_NAME(func) ":"                                     \
 745             FRAME_BEGIN                                                 \
 746             PV_SAVE_ALL_CALLER_REGS                                     \
 747             "call " #func ";"                                           \
 748             PV_RESTORE_ALL_CALLER_REGS                                  \
 749             FRAME_END                                                   \
 750             "ret;"                                                      \
 751             ".popsection")
 752
 753 /* Get a reference to a callee-save function */
 754 #define PV_CALLEE_SAVE(func)                                            \
 755         ((struct paravirt_callee_save) { __raw_callee_save_##func })
 756
 757 /* Promise that "func" already uses the right calling convention */
 758 #define __PV_IS_CALLEE_SAVE(func)                       \
 759         ((struct paravirt_callee_save) { func })
 760
 761 static inline notrace unsigned long arch_local_save_flags(void)
 762 {
 763         return PVOP_CALLEE0(unsigned long, pv_irq_ops.save_fl);
 764 }
 765
 766 static inline notrace void arch_local_irq_restore(unsigned long f)
 767 {
 768         PVOP_VCALLEE1(pv_irq_ops.restore_fl, f);
 769 }
 770
 771 static inline notrace void arch_local_irq_disable(void)
 772 {
 773         PVOP_VCALLEE0(pv_irq_ops.irq_disable);
 774 }
 775
 776 static inline notrace void arch_local_irq_enable(void)
 777 {
 778         PVOP_VCALLEE0(pv_irq_ops.irq_enable);
 779 }
 780
 781 static inline notrace unsigned long arch_local_irq_save(void)
 782 {
 783         unsigned long f;
 784
 785         f = arch_local_save_flags();
 786         arch_local_irq_disable();
 787         return f;
 788 }
 789
 790
 791 /* Make sure as little as possible of this mess escapes. */
 792 #undef PARAVIRT_CALL
 793 #undef __PVOP_CALL
 794 #undef __PVOP_VCALL
 795 #undef PVOP_VCALL0
 796 #undef PVOP_CALL0
 797 #undef PVOP_VCALL1
 798 #undef PVOP_CALL1
 799 #undef PVOP_VCALL2
 800 #undef PVOP_CALL2
 801 #undef PVOP_VCALL3
 802 #undef PVOP_CALL3
 803 #undef PVOP_VCALL4
 804 #undef PVOP_CALL4
 805
 806 extern void default_banner(void);
 807
 808 #else  /* __ASSEMBLY__ */
 809
 810 #define _PVSITE(ptype, clobbers, ops, word, algn)       \
 811 771:;                                           \
 812         ops;                                    \
 813 772:;                                           \
 814         .pushsection .parainstructions,"a";     \
 815          .align algn;                           \
 816          word 771b;                             \
 817          .byte ptype;                           \
 818          .byte 772b-771b;                       \
 819          .short clobbers;                       \
 820         .popsection
 821
 822
 823 #define COND_PUSH(set, mask, reg)                       \
 824         .if ((~(set)) & mask); push %reg; .endif
 825 #define COND_POP(set, mask, reg)                        \
 826         .if ((~(set)) & mask); pop %reg; .endif
 827
 828 #ifdef CONFIG_X86_64
 829
 830 #define PV_SAVE_REGS(set)                       \
 831         COND_PUSH(set, CLBR_RAX, rax);          \
 832         COND_PUSH(set, CLBR_RCX, rcx);          \
 833         COND_PUSH(set, CLBR_RDX, rdx);          \
 834         COND_PUSH(set, CLBR_RSI, rsi);          \
 835         COND_PUSH(set, CLBR_RDI, rdi);          \
 836         COND_PUSH(set, CLBR_R8, r8);            \
 837         COND_PUSH(set, CLBR_R9, r9);            \
 838         COND_PUSH(set, CLBR_R10, r10);          \
 839         COND_PUSH(set, CLBR_R11, r11)
 840 #define PV_RESTORE_REGS(set)                    \
 841         COND_POP(set, CLBR_R11, r11);           \
 842         COND_POP(set, CLBR_R10, r10);           \
 843         COND_POP(set, CLBR_R9, r9);             \
 844         COND_POP(set, CLBR_R8, r8);             \
 845         COND_POP(set, CLBR_RDI, rdi);           \
 846         COND_POP(set, CLBR_RSI, rsi);           \
 847         COND_POP(set, CLBR_RDX, rdx);           \
 848         COND_POP(set, CLBR_RCX, rcx);           \
 849         COND_POP(set, CLBR_RAX, rax)
 850
 851 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 8)
 852 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .quad, 8)
 853 #define PARA_INDIRECT(addr)     *addr(%rip)
 854 #else
 855 #define PV_SAVE_REGS(set)                       \
 856         COND_PUSH(set, CLBR_EAX, eax);          \
 857         COND_PUSH(set, CLBR_EDI, edi);          \
 858         COND_PUSH(set, CLBR_ECX, ecx);          \
 859         COND_PUSH(set, CLBR_EDX, edx)
 860 #define PV_RESTORE_REGS(set)                    \
 861         COND_POP(set, CLBR_EDX, edx);           \
 862         COND_POP(set, CLBR_ECX, ecx);           \
 863         COND_POP(set, CLBR_EDI, edi);           \
 864         COND_POP(set, CLBR_EAX, eax)
 865
 866 #define PARA_PATCH(struct, off)        ((PARAVIRT_PATCH_##struct + (off)) / 4)
 867 #define PARA_SITE(ptype, clobbers, ops) _PVSITE(ptype, clobbers, ops, .long, 4)
 868 #define PARA_INDIRECT(addr)     *%cs:addr
 869 #endif
 870
 871 #define INTERRUPT_RETURN                                                \
 872         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_iret), CLBR_NONE,       \
 873                   ANNOTATE_RETPOLINE_SAFE;                                      \
 874                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_iret);)
 875
 876 #define DISABLE_INTERRUPTS(clobbers)                                    \
 877         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_disable), clobbers, \
 878                   PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);            \
 879                   ANNOTATE_RETPOLINE_SAFE;                                      \
 880                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_disable);    \
 881                   PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
 882
 883 #define ENABLE_INTERRUPTS(clobbers)                                     \
 884         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_irq_enable), clobbers,  \
 885                   PV_SAVE_REGS(clobbers | CLBR_CALLEE_SAVE);            \
 886                   ANNOTATE_RETPOLINE_SAFE;                                      \
 887                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_irq_enable);     \
 888                   PV_RESTORE_REGS(clobbers | CLBR_CALLEE_SAVE);)
 889
 890 #ifdef CONFIG_X86_32
 891 #define GET_CR0_INTO_EAX                                \
 892         push %ecx; push %edx;                           \
 893         ANNOTATE_RETPOLINE_SAFE;                                \
 894         call PARA_INDIRECT(pv_cpu_ops+PV_CPU_read_cr0); \
 895         pop %edx; pop %ecx
 896 #else   /* !CONFIG_X86_32 */
 897
 898 /*
 899  * If swapgs is used while the userspace stack is still current,
 900  * there's no way to call a pvop.  The PV replacement *must* be
 901  * inlined, or the swapgs instruction must be trapped and emulated.
 902  */
 903 #define SWAPGS_UNSAFE_STACK                                             \
 904         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
 905                   swapgs)
 906
 907 /*
 908  * Note: swapgs is very special, and in practise is either going to be
 909  * implemented with a single "swapgs" instruction or something very
 910  * special.  Either way, we don't need to save any registers for
 911  * it.
 912  */
 913 #define SWAPGS                                                          \
 914         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_swapgs), CLBR_NONE,     \
 915                   ANNOTATE_RETPOLINE_SAFE;                                      \
 916                   call PARA_INDIRECT(pv_cpu_ops+PV_CPU_swapgs);         \
 917                  )
 918
 919 #define GET_CR2_INTO_RAX                                \
 920         ANNOTATE_RETPOLINE_SAFE;                                \
 921         call PARA_INDIRECT(pv_mmu_ops+PV_MMU_read_cr2);
 922
 923 #define PARAVIRT_ADJUST_EXCEPTION_FRAME                                 \
 924         PARA_SITE(PARA_PATCH(pv_irq_ops, PV_IRQ_adjust_exception_frame), \
 925                   CLBR_NONE,                                            \
 926                   call PARA_INDIRECT(pv_irq_ops+PV_IRQ_adjust_exception_frame))
 927
 928 #define USERGS_SYSRET64                                                 \
 929         PARA_SITE(PARA_PATCH(pv_cpu_ops, PV_CPU_usergs_sysret64),       \
 930                   CLBR_NONE,                                            \
 931                   ANNOTATE_RETPOLINE_SAFE;                                      \
 932                   jmp PARA_INDIRECT(pv_cpu_ops+PV_CPU_usergs_sysret64);)
 933 #endif  /* CONFIG_X86_32 */
 934
 935 #endif /* __ASSEMBLY__ */
 936 #else  /* CONFIG_PARAVIRT */
 937 # define default_banner x86_init_noop
 938 #ifndef __ASSEMBLY__
 939 static inline void paravirt_arch_dup_mmap(struct mm_struct *oldmm,
 940                                           struct mm_struct *mm)
 941 {
 942 }
 943
 944 static inline void paravirt_arch_exit_mmap(struct mm_struct *mm)
 945 {
 946 }
 947 #endif /* __ASSEMBLY__ */
 948 #endif /* !CONFIG_PARAVIRT */
 949 #endif /* _ASM_X86_PARAVIRT_H */