1 #ifndef _ASM_X86_DISABLED_FEATURES_H
2 #define _ASM_X86_DISABLED_FEATURES_H
4 /* These features, although they might be available in a CPU
5 * will not be used because the compile options to support
6 * them are not present.
8 * This code allows them to be checked and disabled at
9 * compile time without an explicit #ifdef. Use
10 * cpu_feature_enabled().
13 #ifdef CONFIG_X86_INTEL_MPX
14 # define DISABLE_MPX 0
16 # define DISABLE_MPX (1<<(X86_FEATURE_MPX & 31))
20 # define DISABLE_VME (1<<(X86_FEATURE_VME & 31))
21 # define DISABLE_K6_MTRR (1<<(X86_FEATURE_K6_MTRR & 31))
22 # define DISABLE_CYRIX_ARR (1<<(X86_FEATURE_CYRIX_ARR & 31))
23 # define DISABLE_CENTAUR_MCR (1<<(X86_FEATURE_CENTAUR_MCR & 31))
24 # define DISABLE_PCID 0
26 # define DISABLE_VME 0
27 # define DISABLE_K6_MTRR 0
28 # define DISABLE_CYRIX_ARR 0
29 # define DISABLE_CENTAUR_MCR 0
30 # define DISABLE_PCID (1<<(X86_FEATURE_PCID & 31))
31 #endif /* CONFIG_X86_64 */
33 #ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
34 # define DISABLE_PKU 0
35 # define DISABLE_OSPKE 0
37 # define DISABLE_PKU (1<<(X86_FEATURE_PKU & 31))
38 # define DISABLE_OSPKE (1<<(X86_FEATURE_OSPKE & 31))
39 #endif /* CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS */
42 * Make sure to add features to the correct mask
44 #define DISABLED_MASK0 (DISABLE_VME)
45 #define DISABLED_MASK1 0
46 #define DISABLED_MASK2 0
47 #define DISABLED_MASK3 (DISABLE_CYRIX_ARR|DISABLE_CENTAUR_MCR|DISABLE_K6_MTRR)
48 #define DISABLED_MASK4 (DISABLE_PCID)
49 #define DISABLED_MASK5 0
50 #define DISABLED_MASK6 0
51 #define DISABLED_MASK7 0
52 #define DISABLED_MASK8 0
53 #define DISABLED_MASK9 (DISABLE_MPX)
54 #define DISABLED_MASK10 0
55 #define DISABLED_MASK11 0
56 #define DISABLED_MASK12 0
57 #define DISABLED_MASK13 0
58 #define DISABLED_MASK14 0
59 #define DISABLED_MASK15 0
60 #define DISABLED_MASK16 (DISABLE_PKU|DISABLE_OSPKE)
61 #define DISABLED_MASK17 0
62 #define DISABLED_MASK18 0
63 #define DISABLED_MASK_CHECK BUILD_BUG_ON_ZERO(NCAPINTS != 19)
65 #endif /* _ASM_X86_DISABLED_FEATURES_H */