1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Compatibility mode system call entry point for x86-64.
5 * Copyright 2000-2002 Andi Kleen, SuSE Labs.
7 #include <asm/asm-offsets.h>
8 #include <asm/current.h>
10 #include <asm/ia32_unistd.h>
11 #include <asm/thread_info.h>
12 #include <asm/segment.h>
13 #include <asm/irqflags.h>
16 #include <linux/linkage.h>
17 #include <linux/err.h>
21 .section .entry.text, "ax"
24 * 32-bit SYSENTER entry.
26 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
27 * on 64-bit kernels running on Intel CPUs.
29 * The SYSENTER instruction, in principle, should *only* occur in the
30 * vDSO. In practice, a small number of Android devices were shipped
31 * with a copy of Bionic that inlined a SYSENTER instruction. This
32 * never happened in any of Google's Bionic versions -- it only happened
33 * in a narrow range of Intel-provided versions.
35 * SYSENTER loads SS, RSP, CS, and RIP from previously programmed MSRs.
36 * IF and VM in RFLAGS are cleared (IOW: interrupts are off).
37 * SYSENTER does not save anything on the stack,
38 * and does not save old RIP (!!!), RSP, or RFLAGS.
41 * eax system call number
50 ENTRY(entry_SYSENTER_compat)
51 /* Interrupts are off on entry. */
54 /* We are about to clobber %rsp anyway, clobbering here is OK */
55 SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
57 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
60 * User tracing code (ptrace or signal handlers) might assume that
61 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
62 * syscall. Just in case the high bits are nonzero, zero-extend
63 * the syscall number. (This could almost certainly be deleted
64 * with no ill effects.)
68 /* Construct struct pt_regs on stack */
69 pushq $__USER32_DS /* pt_regs->ss */
70 pushq %rbp /* pt_regs->sp (stashed in bp) */
73 * Push flags. This is nasty. First, interrupts are currently
74 * off, but we need pt_regs->flags to have IF set. Second, even
75 * if TF was set when SYSENTER started, it's clear by now. We fix
76 * that later using TIF_SINGLESTEP.
78 pushfq /* pt_regs->flags (except IF = 0) */
79 orl $X86_EFLAGS_IF, (%rsp) /* Fix saved flags */
80 pushq $__USER32_CS /* pt_regs->cs */
81 pushq $0 /* pt_regs->ip = 0 (placeholder) */
82 pushq %rax /* pt_regs->orig_ax */
83 pushq %rdi /* pt_regs->di */
84 pushq %rsi /* pt_regs->si */
85 pushq %rdx /* pt_regs->dx */
86 pushq %rcx /* pt_regs->cx */
87 pushq $-ENOSYS /* pt_regs->ax */
88 pushq $0 /* pt_regs->r8 = 0 */
89 xorl %r8d, %r8d /* nospec r8 */
90 pushq $0 /* pt_regs->r9 = 0 */
91 xorl %r9d, %r9d /* nospec r9 */
92 pushq $0 /* pt_regs->r10 = 0 */
93 xorl %r10d, %r10d /* nospec r10 */
94 pushq $0 /* pt_regs->r11 = 0 */
95 xorl %r11d, %r11d /* nospec r11 */
96 pushq %rbx /* pt_regs->rbx */
97 xorl %ebx, %ebx /* nospec rbx */
98 pushq %rbp /* pt_regs->rbp (will be overwritten) */
99 xorl %ebp, %ebp /* nospec rbp */
100 pushq $0 /* pt_regs->r12 = 0 */
101 xorl %r12d, %r12d /* nospec r12 */
102 pushq $0 /* pt_regs->r13 = 0 */
103 xorl %r13d, %r13d /* nospec r13 */
104 pushq $0 /* pt_regs->r14 = 0 */
105 xorl %r14d, %r14d /* nospec r14 */
106 pushq $0 /* pt_regs->r15 = 0 */
107 xorl %r15d, %r15d /* nospec r15 */
113 * SYSENTER doesn't filter flags, so we need to clear NT and AC
114 * ourselves. To save a few cycles, we can check whether
115 * either was set instead of doing an unconditional popfq.
116 * This needs to happen before enabling interrupts so that
117 * we don't get preempted with NT set.
119 * If TF is set, we will single-step all the way to here -- do_debug
120 * will ignore all the traps. (Yes, this is slow, but so is
121 * single-stepping in general. This allows us to avoid having
122 * a more complicated code to handle the case where a user program
123 * forces us to single-step through the SYSENTER entry code.)
125 * NB.: .Lsysenter_fix_flags is a label with the code under it moved
126 * out-of-line as an optimization: NT is unlikely to be set in the
127 * majority of the cases and instead of polluting the I$ unnecessarily,
128 * we're keeping that code behind a branch which will predict as
129 * not-taken and therefore its instructions won't be fetched.
131 testl $X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, EFLAGS(%rsp)
132 jnz .Lsysenter_fix_flags
133 .Lsysenter_flags_fixed:
136 * User mode is traced as though IRQs are on, and SYSENTER
142 call do_fast_syscall_32
143 /* XEN PV guests always use IRET path */
144 ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \
145 "jmp .Lsyscall_32_done", X86_FEATURE_XENPV
146 jmp sysret32_from_system_call
148 .Lsysenter_fix_flags:
149 pushq $X86_EFLAGS_FIXED
151 jmp .Lsysenter_flags_fixed
152 GLOBAL(__end_entry_SYSENTER_compat)
153 ENDPROC(entry_SYSENTER_compat)
156 * 32-bit SYSCALL entry.
158 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
159 * on 64-bit kernels running on AMD CPUs.
161 * The SYSCALL instruction, in principle, should *only* occur in the
162 * vDSO. In practice, it appears that this really is the case.
165 * - The calling convention for SYSCALL has changed several times without
168 * - Prior to the in-kernel X86_BUG_SYSRET_SS_ATTRS fixup, anything
169 * user task that did SYSCALL without immediately reloading SS
170 * would randomly crash.
172 * - Most programmers do not directly target AMD CPUs, and the 32-bit
173 * SYSCALL instruction does not exist on Intel CPUs. Even on AMD
174 * CPUs, Linux disables the SYSCALL instruction on 32-bit kernels
175 * because the SYSCALL instruction in legacy/native 32-bit mode (as
176 * opposed to compat mode) is sufficiently poorly designed as to be
177 * essentially unusable.
179 * 32-bit SYSCALL saves RIP to RCX, clears RFLAGS.RF, then saves
180 * RFLAGS to R11, then loads new SS, CS, and RIP from previously
181 * programmed MSRs. RFLAGS gets masked by a value from another MSR
182 * (so CLD and CLAC are not needed). SYSCALL does not save anything on
183 * the stack and does not change RSP.
185 * Note: RFLAGS saving+masking-with-MSR happens only in Long mode
186 * (in legacy 32-bit mode, IF, RF and VM bits are cleared and that's it).
187 * Don't get confused: RFLAGS saving+masking depends on Long Mode Active bit
188 * (EFER.LMA=1), NOT on bitness of userspace where SYSCALL executes
189 * or target CS descriptor's L bit (SYSCALL does not read segment descriptors).
192 * eax system call number
195 * ebp arg2 (note: not saved in the stack frame, should not be touched)
202 ENTRY(entry_SYSCALL_compat)
203 /* Interrupts are off on entry. */
209 /* Use %rsp as scratch reg. User ESP is stashed in r8 */
210 SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
212 /* Switch to the kernel stack */
213 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
215 /* Construct struct pt_regs on stack */
216 pushq $__USER32_DS /* pt_regs->ss */
217 pushq %r8 /* pt_regs->sp */
218 pushq %r11 /* pt_regs->flags */
219 pushq $__USER32_CS /* pt_regs->cs */
220 pushq %rcx /* pt_regs->ip */
221 GLOBAL(entry_SYSCALL_compat_after_hwframe)
222 movl %eax, %eax /* discard orig_ax high bits */
223 pushq %rax /* pt_regs->orig_ax */
224 pushq %rdi /* pt_regs->di */
225 pushq %rsi /* pt_regs->si */
226 xorl %esi, %esi /* nospec si */
227 pushq %rdx /* pt_regs->dx */
228 xorl %edx, %edx /* nospec dx */
229 pushq %rbp /* pt_regs->cx (stashed in bp) */
230 xorl %ecx, %ecx /* nospec cx */
231 pushq $-ENOSYS /* pt_regs->ax */
232 pushq $0 /* pt_regs->r8 = 0 */
233 xorl %r8d, %r8d /* nospec r8 */
234 pushq $0 /* pt_regs->r9 = 0 */
235 xorl %r9d, %r9d /* nospec r9 */
236 pushq $0 /* pt_regs->r10 = 0 */
237 xorl %r10d, %r10d /* nospec r10 */
238 pushq $0 /* pt_regs->r11 = 0 */
239 xorl %r11d, %r11d /* nospec r11 */
240 pushq %rbx /* pt_regs->rbx */
241 xorl %ebx, %ebx /* nospec rbx */
242 pushq %rbp /* pt_regs->rbp (will be overwritten) */
243 xorl %ebp, %ebp /* nospec rbp */
244 pushq $0 /* pt_regs->r12 = 0 */
245 xorl %r12d, %r12d /* nospec r12 */
246 pushq $0 /* pt_regs->r13 = 0 */
247 xorl %r13d, %r13d /* nospec r13 */
248 pushq $0 /* pt_regs->r14 = 0 */
249 xorl %r14d, %r14d /* nospec r14 */
250 pushq $0 /* pt_regs->r15 = 0 */
251 xorl %r15d, %r15d /* nospec r15 */
254 * User mode is traced as though IRQs are on, and SYSENTER
262 call do_fast_syscall_32
263 /* XEN PV guests always use IRET path */
264 ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \
265 "jmp .Lsyscall_32_done", X86_FEATURE_XENPV
267 /* Opportunistic SYSRET */
268 sysret32_from_system_call:
270 * We are not going to return to userspace from the trampoline
271 * stack. So let's erase the thread stack right now.
274 TRACE_IRQS_ON /* User mode traces as IRQs on. */
278 movq RBX(%rsp), %rbx /* pt_regs->rbx */
279 movq RBP(%rsp), %rbp /* pt_regs->rbp */
280 movq EFLAGS(%rsp), %r11 /* pt_regs->flags (in r11) */
281 movq RIP(%rsp), %rcx /* pt_regs->ip (in rcx) */
282 addq $RAX, %rsp /* Skip r8-r15 */
283 popq %rax /* pt_regs->rax */
284 popq %rdx /* Skip pt_regs->cx */
285 popq %rdx /* pt_regs->dx */
286 popq %rsi /* pt_regs->si */
287 popq %rdi /* pt_regs->di */
290 * USERGS_SYSRET32 does:
291 * GSBASE = user's GS base
297 * ECX will not match pt_regs->cx, but we're returning to a vDSO
298 * trampoline that will fix up RCX, so this is okay.
300 * R12-R15 are callee-saved, so they contain whatever was in them
301 * when the system call started, which is already known to user
302 * code. We zero R8-R10 to avoid info leaks.
304 movq RSP-ORIG_RAX(%rsp), %rsp
307 * The original userspace %rsp (RSP-ORIG_RAX(%rsp)) is stored
308 * on the process stack which is not mapped to userspace and
309 * not readable after we SWITCH_TO_USER_CR3. Delay the CR3
310 * switch until after after the last reference to the process
313 * %r8/%r9 are zeroed before the sysret, thus safe to clobber.
315 SWITCH_TO_USER_CR3_NOSTACK scratch_reg=%r8 scratch_reg2=%r9
322 END(entry_SYSCALL_compat)
325 * 32-bit legacy system call entry.
327 * 32-bit x86 Linux system calls traditionally used the INT $0x80
328 * instruction. INT $0x80 lands here.
330 * This entry point can be used by 32-bit and 64-bit programs to perform
331 * 32-bit system calls. Instances of INT $0x80 can be found inline in
332 * various programs and libraries. It is also used by the vDSO's
333 * __kernel_vsyscall fallback for hardware that doesn't support a faster
334 * entry method. Restarted 32-bit system calls also fall back to INT
335 * $0x80 regardless of what instruction was originally used to do the
338 * This is considered a slow path. It is not used by most libc
339 * implementations on modern hardware except during process startup.
342 * eax system call number
350 ENTRY(entry_INT80_compat)
352 * Interrupts are off on entry.
354 ASM_CLAC /* Do this early to minimize exposure */
358 * User tracing code (ptrace or signal handlers) might assume that
359 * the saved RAX contains a 32-bit number when we're invoking a 32-bit
360 * syscall. Just in case the high bits are nonzero, zero-extend
361 * the syscall number. (This could almost certainly be deleted
362 * with no ill effects.)
366 /* switch to thread stack expects orig_ax and rdi to be pushed */
367 pushq %rax /* pt_regs->orig_ax */
368 pushq %rdi /* pt_regs->di */
370 /* Need to switch before accessing the thread stack. */
371 SWITCH_TO_KERNEL_CR3 scratch_reg=%rdi
372 /* In the Xen PV case we already run on the thread stack. */
373 ALTERNATIVE "movq %rsp, %rdi", "jmp .Lint80_keep_stack", X86_FEATURE_XENPV
374 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
376 pushq 6*8(%rdi) /* regs->ss */
377 pushq 5*8(%rdi) /* regs->rsp */
378 pushq 4*8(%rdi) /* regs->eflags */
379 pushq 3*8(%rdi) /* regs->cs */
380 pushq 2*8(%rdi) /* regs->ip */
381 pushq 1*8(%rdi) /* regs->orig_ax */
382 pushq (%rdi) /* pt_regs->di */
385 pushq %rsi /* pt_regs->si */
386 xorl %esi, %esi /* nospec si */
387 pushq %rdx /* pt_regs->dx */
388 xorl %edx, %edx /* nospec dx */
389 pushq %rcx /* pt_regs->cx */
390 xorl %ecx, %ecx /* nospec cx */
391 pushq $-ENOSYS /* pt_regs->ax */
392 pushq %r8 /* pt_regs->r8 */
393 xorl %r8d, %r8d /* nospec r8 */
394 pushq %r9 /* pt_regs->r9 */
395 xorl %r9d, %r9d /* nospec r9 */
396 pushq %r10 /* pt_regs->r10*/
397 xorl %r10d, %r10d /* nospec r10 */
398 pushq %r11 /* pt_regs->r11 */
399 xorl %r11d, %r11d /* nospec r11 */
400 pushq %rbx /* pt_regs->rbx */
401 xorl %ebx, %ebx /* nospec rbx */
402 pushq %rbp /* pt_regs->rbp */
403 xorl %ebp, %ebp /* nospec rbp */
404 pushq %r12 /* pt_regs->r12 */
405 xorl %r12d, %r12d /* nospec r12 */
406 pushq %r13 /* pt_regs->r13 */
407 xorl %r13d, %r13d /* nospec r13 */
408 pushq %r14 /* pt_regs->r14 */
409 xorl %r14d, %r14d /* nospec r14 */
410 pushq %r15 /* pt_regs->r15 */
411 xorl %r15d, %r15d /* nospec r15 */
415 * User mode is traced as though IRQs are on, and the interrupt
416 * gate turned them off.
422 call do_int80_syscall_32
425 /* Go back to user mode. */
427 jmp swapgs_restore_regs_and_return_to_usermode
428 END(entry_INT80_compat)