2 * Copyright (C) 1991,1992 Linus Torvalds
4 * entry_32.S contains the system-call and low-level fault and trap handling routines.
6 * Stack layout while running C code:
7 * ptrace needs to have all registers on the stack.
8 * If the order here is changed, it needs to be
9 * updated in fork.c:copy_process(), signal.c:do_signal(),
10 * ptrace.c and ptrace.h
22 * 28(%esp) - %gs saved iff !CONFIG_X86_32_LAZY_GS
31 #include <linux/linkage.h>
32 #include <linux/err.h>
33 #include <asm/thread_info.h>
34 #include <asm/irqflags.h>
35 #include <asm/errno.h>
36 #include <asm/segment.h>
38 #include <asm/page_types.h>
39 #include <asm/percpu.h>
40 #include <asm/processor-flags.h>
41 #include <asm/ftrace.h>
42 #include <asm/irq_vectors.h>
43 #include <asm/cpufeatures.h>
44 #include <asm/alternative-asm.h>
47 #include <asm/export.h>
48 #include <asm/nospec-branch.h>
50 .section .entry.text, "ax"
53 * We use macros for low-level operations which need to be overridden
54 * for paravirtualization. The following will never clobber any registers:
55 * INTERRUPT_RETURN (aka. "iret")
56 * GET_CR0_INTO_EAX (aka. "movl %cr0, %eax")
57 * ENABLE_INTERRUPTS_SYSEXIT (aka "sti; sysexit").
59 * For DISABLE_INTERRUPTS/ENABLE_INTERRUPTS (aka "cli"/"sti"), you must
60 * specify what registers can be overwritten (CLBR_NONE, CLBR_EAX/EDX/ECX/ANY).
61 * Allowing a register to be clobbered can shrink the paravirt replacement
62 * enough to patch inline, increasing performance.
66 # define preempt_stop(clobbers) DISABLE_INTERRUPTS(clobbers); TRACE_IRQS_OFF
68 # define preempt_stop(clobbers)
69 # define resume_kernel restore_all
72 .macro TRACE_IRQS_IRET
73 #ifdef CONFIG_TRACE_IRQFLAGS
74 testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off?
82 * User gs save/restore
84 * %gs is used for userland TLS and kernel only uses it for stack
85 * canary which is required to be at %gs:20 by gcc. Read the comment
86 * at the top of stackprotector.h for more info.
88 * Local labels 98 and 99 are used.
90 #ifdef CONFIG_X86_32_LAZY_GS
92 /* unfortunately push/pop can't be no-op */
97 addl $(4 + \pop), %esp
102 /* all the rest are no-op */
109 .macro REG_TO_PTGS reg
111 .macro SET_KERNEL_GS reg
114 #else /* CONFIG_X86_32_LAZY_GS */
127 .pushsection .fixup, "ax"
131 _ASM_EXTABLE(98b, 99b)
135 98: mov PT_GS(%esp), %gs
138 .pushsection .fixup, "ax"
139 99: movl $0, PT_GS(%esp)
142 _ASM_EXTABLE(98b, 99b)
148 .macro REG_TO_PTGS reg
149 movl \reg, PT_GS(%esp)
151 .macro SET_KERNEL_GS reg
152 movl $(__KERNEL_STACK_CANARY), \reg
156 #endif /* CONFIG_X86_32_LAZY_GS */
158 .macro SAVE_ALL pt_regs_ax=%eax
171 movl $(__USER_DS), %edx
174 movl $(__KERNEL_PERCPU), %edx
179 .macro RESTORE_INT_REGS
189 .macro RESTORE_REGS pop=0
195 .pushsection .fixup, "ax"
213 ENTRY(__switch_to_asm)
215 * Save callee-saved registers
216 * This must match the order in struct inactive_task_frame
225 movl %esp, TASK_threadsp(%eax)
226 movl TASK_threadsp(%edx), %esp
228 #ifdef CONFIG_CC_STACKPROTECTOR
229 movl TASK_stack_canary(%edx), %ebx
230 movl %ebx, PER_CPU_VAR(stack_canary)+stack_canary_offset
233 #ifdef CONFIG_RETPOLINE
235 * When switching from a shallower to a deeper call stack
236 * the RSB may either underflow or use entries populated
237 * with userspace addresses. On CPUs where those concerns
238 * exist, overwrite the RSB with entries which capture
239 * speculative execution to prevent attack.
241 FILL_RETURN_BUFFER %ebx, RSB_CLEAR_LOOPS, X86_FEATURE_RSB_CTXSW
244 /* restore callee-saved registers */
255 * A newly forked process directly context switches into this address.
257 * eax: prev task we switched from
258 * ebx: kernel thread func (NULL for user thread)
259 * edi: kernel thread arg
267 jnz 1f /* kernel threads are uncommon */
270 /* When we fork, we trace the syscall return in the child, too. */
272 call syscall_return_slowpath
279 * A kernel thread is allowed to return here after successfully
280 * calling do_execve(). Exit to userspace to complete the execve()
283 movl $0, PT_EAX(%esp)
288 * Return to user mode is not as complex as all this looks,
289 * but we want the default path for a system call return to
290 * go as quickly as possible which is why some of this is
291 * less clear than it otherwise should be.
294 # userspace resumption stub bypassing syscall exit tracing
297 preempt_stop(CLBR_ANY)
300 movl PT_EFLAGS(%esp), %eax # mix EFLAGS and CS
301 movb PT_CS(%esp), %al
302 andl $(X86_EFLAGS_VM | SEGMENT_RPL_MASK), %eax
305 * We can be coming here from child spawned by kernel_thread().
307 movl PT_CS(%esp), %eax
308 andl $SEGMENT_RPL_MASK, %eax
311 jb resume_kernel # not returning to v8086 or userspace
313 ENTRY(resume_userspace)
314 DISABLE_INTERRUPTS(CLBR_ANY)
317 call prepare_exit_to_usermode
319 END(ret_from_exception)
321 #ifdef CONFIG_PREEMPT
323 DISABLE_INTERRUPTS(CLBR_ANY)
325 cmpl $0, PER_CPU_VAR(__preempt_count)
327 testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off (exception path) ?
329 call preempt_schedule_irq
334 GLOBAL(__begin_SYSENTER_singlestep_region)
336 * All code from here through __end_SYSENTER_singlestep_region is subject
337 * to being single-stepped if a user program sets TF and executes SYSENTER.
338 * There is absolutely nothing that we can do to prevent this from happening
339 * (thanks Intel!). To keep our handling of this situation as simple as
340 * possible, we handle TF just like AC and NT, except that our #DB handler
341 * will ignore all of the single-step traps generated in this range.
346 * Xen doesn't set %esp to be precisely what the normal SYSENTER
347 * entry point expects, so fix it up before using the normal path.
349 ENTRY(xen_sysenter_target)
350 addl $5*4, %esp /* remove xen-provided frame */
351 jmp sysenter_past_esp
355 * 32-bit SYSENTER entry.
357 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
358 * if X86_FEATURE_SEP is available. This is the preferred system call
359 * entry on 32-bit systems.
361 * The SYSENTER instruction, in principle, should *only* occur in the
362 * vDSO. In practice, a small number of Android devices were shipped
363 * with a copy of Bionic that inlined a SYSENTER instruction. This
364 * never happened in any of Google's Bionic versions -- it only happened
365 * in a narrow range of Intel-provided versions.
367 * SYSENTER loads SS, ESP, CS, and EIP from previously programmed MSRs.
368 * IF and VM in RFLAGS are cleared (IOW: interrupts are off).
369 * SYSENTER does not save anything on the stack,
370 * and does not save old EIP (!!!), ESP, or EFLAGS.
372 * To avoid losing track of EFLAGS.VM (and thus potentially corrupting
373 * user and/or vm86 state), we explicitly disable the SYSENTER
374 * instruction in vm86 mode by reprogramming the MSRs.
377 * eax system call number
386 ENTRY(entry_SYSENTER_32)
387 movl TSS_sysenter_sp0(%esp), %esp
389 pushl $__USER_DS /* pt_regs->ss */
390 pushl %ebp /* pt_regs->sp (stashed in bp) */
391 pushfl /* pt_regs->flags (except IF = 0) */
392 orl $X86_EFLAGS_IF, (%esp) /* Fix IF */
393 pushl $__USER_CS /* pt_regs->cs */
394 pushl $0 /* pt_regs->ip = 0 (placeholder) */
395 pushl %eax /* pt_regs->orig_ax */
396 SAVE_ALL pt_regs_ax=$-ENOSYS /* save rest */
399 * SYSENTER doesn't filter flags, so we need to clear NT, AC
400 * and TF ourselves. To save a few cycles, we can check whether
401 * either was set instead of doing an unconditional popfq.
402 * This needs to happen before enabling interrupts so that
403 * we don't get preempted with NT set.
405 * If TF is set, we will single-step all the way to here -- do_debug
406 * will ignore all the traps. (Yes, this is slow, but so is
407 * single-stepping in general. This allows us to avoid having
408 * a more complicated code to handle the case where a user program
409 * forces us to single-step through the SYSENTER entry code.)
411 * NB.: .Lsysenter_fix_flags is a label with the code under it moved
412 * out-of-line as an optimization: NT is unlikely to be set in the
413 * majority of the cases and instead of polluting the I$ unnecessarily,
414 * we're keeping that code behind a branch which will predict as
415 * not-taken and therefore its instructions won't be fetched.
417 testl $X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, PT_EFLAGS(%esp)
418 jnz .Lsysenter_fix_flags
419 .Lsysenter_flags_fixed:
422 * User mode is traced as though IRQs are on, and SYSENTER
428 call do_fast_syscall_32
429 /* XEN PV guests always use IRET path */
430 ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \
431 "jmp .Lsyscall_32_done", X86_FEATURE_XENPV
433 /* Opportunistic SYSEXIT */
434 TRACE_IRQS_ON /* User mode traces as IRQs on. */
435 movl PT_EIP(%esp), %edx /* pt_regs->ip */
436 movl PT_OLDESP(%esp), %ecx /* pt_regs->sp */
437 1: mov PT_FS(%esp), %fs
439 popl %ebx /* pt_regs->bx */
440 addl $2*4, %esp /* skip pt_regs->cx and pt_regs->dx */
441 popl %esi /* pt_regs->si */
442 popl %edi /* pt_regs->di */
443 popl %ebp /* pt_regs->bp */
444 popl %eax /* pt_regs->ax */
447 * Restore all flags except IF. (We restore IF separately because
448 * STI gives a one-instruction window in which we won't be interrupted,
449 * whereas POPF does not.)
451 addl $PT_EFLAGS-PT_DS, %esp /* point esp at pt_regs->flags */
452 btr $X86_EFLAGS_IF_BIT, (%esp)
456 * Return back to the vDSO, which will pop ecx and edx.
457 * Don't bother with DS and ES (they already contain __USER_DS).
462 .pushsection .fixup, "ax"
463 2: movl $0, PT_FS(%esp)
469 .Lsysenter_fix_flags:
470 pushl $X86_EFLAGS_FIXED
472 jmp .Lsysenter_flags_fixed
473 GLOBAL(__end_SYSENTER_singlestep_region)
474 ENDPROC(entry_SYSENTER_32)
477 * 32-bit legacy system call entry.
479 * 32-bit x86 Linux system calls traditionally used the INT $0x80
480 * instruction. INT $0x80 lands here.
482 * This entry point can be used by any 32-bit perform system calls.
483 * Instances of INT $0x80 can be found inline in various programs and
484 * libraries. It is also used by the vDSO's __kernel_vsyscall
485 * fallback for hardware that doesn't support a faster entry method.
486 * Restarted 32-bit system calls also fall back to INT $0x80
487 * regardless of what instruction was originally used to do the system
488 * call. (64-bit programs can use INT $0x80 as well, but they can
489 * only run on 64-bit kernels and therefore land in
490 * entry_INT80_compat.)
492 * This is considered a slow path. It is not used by most libc
493 * implementations on modern hardware except during process startup.
496 * eax system call number
504 ENTRY(entry_INT80_32)
506 pushl %eax /* pt_regs->orig_ax */
507 SAVE_ALL pt_regs_ax=$-ENOSYS /* save rest */
510 * User mode is traced as though IRQs are on, and the interrupt gate
516 call do_int80_syscall_32
522 #ifdef CONFIG_X86_ESPFIX32
523 ALTERNATIVE "jmp restore_nocheck", "", X86_BUG_ESPFIX
525 movl PT_EFLAGS(%esp), %eax # mix EFLAGS, SS and CS
527 * Warning: PT_OLDSS(%esp) contains the wrong/random values if we
528 * are returning to the kernel.
529 * See comments in process.c:copy_thread() for details.
531 movb PT_OLDSS(%esp), %ah
532 movb PT_CS(%esp), %al
533 andl $(X86_EFLAGS_VM | (SEGMENT_TI_MASK << 8) | SEGMENT_RPL_MASK), %eax
534 cmpl $((SEGMENT_LDT << 8) | USER_RPL), %eax
535 je ldt_ss # returning to user-space with LDT SS
538 RESTORE_REGS 4 # skip orig_eax/error_code
541 .section .fixup, "ax"
543 pushl $0 # no error code
547 _ASM_EXTABLE(irq_return, iret_exc)
549 #ifdef CONFIG_X86_ESPFIX32
552 * Setup and switch to ESPFIX stack
554 * We're returning to userspace with a 16 bit stack. The CPU will not
555 * restore the high word of ESP for us on executing iret... This is an
556 * "official" bug of all the x86-compatible CPUs, which we can work
557 * around to make dosemu and wine happy. We do this by preloading the
558 * high word of ESP with the high word of the userspace ESP while
559 * compensating for the offset by changing to the ESPFIX segment with
560 * a base address that matches for the difference.
562 #define GDT_ESPFIX_SS PER_CPU_VAR(gdt_page) + (GDT_ENTRY_ESPFIX_SS * 8)
563 mov %esp, %edx /* load kernel esp */
564 mov PT_OLDESP(%esp), %eax /* load userspace esp */
565 mov %dx, %ax /* eax: new kernel esp */
566 sub %eax, %edx /* offset (low word is 0) */
568 mov %dl, GDT_ESPFIX_SS + 4 /* bits 16..23 */
569 mov %dh, GDT_ESPFIX_SS + 7 /* bits 24..31 */
571 pushl %eax /* new kernel esp */
573 * Disable interrupts, but do not irqtrace this section: we
574 * will soon execute iret and the tracer was already set to
575 * the irqstate after the IRET:
577 DISABLE_INTERRUPTS(CLBR_EAX)
578 lss (%esp), %esp /* switch to espfix segment */
581 ENDPROC(entry_INT80_32)
583 .macro FIXUP_ESPFIX_STACK
585 * Switch back for ESPFIX stack to the normal zerobased stack
587 * We can't call C functions using the ESPFIX stack. This code reads
588 * the high word of the segment base from the GDT and swiches to the
589 * normal stack and adjusts ESP with the matching offset.
591 #ifdef CONFIG_X86_ESPFIX32
592 /* fixup the stack */
593 mov GDT_ESPFIX_SS + 4, %al /* bits 16..23 */
594 mov GDT_ESPFIX_SS + 7, %ah /* bits 24..31 */
596 addl %esp, %eax /* the adjusted stack pointer */
599 lss (%esp), %esp /* switch to the normal stack segment */
602 .macro UNWIND_ESPFIX_STACK
603 #ifdef CONFIG_X86_ESPFIX32
605 /* see if on espfix stack */
606 cmpw $__ESPFIX_SS, %ax
608 movl $__KERNEL_DS, %eax
611 /* switch to normal stack */
618 * Build the entry stubs with some assembler magic.
619 * We pack 1 stub into every 8-byte block.
622 ENTRY(irq_entries_start)
623 vector=FIRST_EXTERNAL_VECTOR
624 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
625 pushl $(~vector+0x80) /* Note: always in signed byte range */
630 END(irq_entries_start)
633 * the CPU automatically disables interrupts when executing an IRQ vector,
634 * so IRQ-flags tracing has to follow that:
636 .p2align CONFIG_X86_L1_CACHE_SHIFT
639 addl $-0x80, (%esp) /* Adjust vector into the [-256, -1] range */
645 ENDPROC(common_interrupt)
647 #define BUILD_INTERRUPT3(name, nr, fn) \
659 #ifdef CONFIG_TRACING
660 # define TRACE_BUILD_INTERRUPT(name, nr) BUILD_INTERRUPT3(trace_##name, nr, smp_trace_##name)
662 # define TRACE_BUILD_INTERRUPT(name, nr)
665 #define BUILD_INTERRUPT(name, nr) \
666 BUILD_INTERRUPT3(name, nr, smp_##name); \
667 TRACE_BUILD_INTERRUPT(name, nr)
669 /* The include is where all of the SMP etc. interrupts come from */
670 #include <asm/entry_arch.h>
672 ENTRY(coprocessor_error)
675 pushl $do_coprocessor_error
677 END(coprocessor_error)
679 ENTRY(simd_coprocessor_error)
682 #ifdef CONFIG_X86_INVD_BUG
683 /* AMD 486 bug: invd from userspace calls exception 19 instead of #GP */
684 ALTERNATIVE "pushl $do_general_protection", \
685 "pushl $do_simd_coprocessor_error", \
688 pushl $do_simd_coprocessor_error
691 END(simd_coprocessor_error)
693 ENTRY(device_not_available)
695 pushl $-1 # mark this as an int
696 pushl $do_device_not_available
698 END(device_not_available)
700 #ifdef CONFIG_PARAVIRT
703 _ASM_EXTABLE(native_iret, iret_exc)
728 ENTRY(coprocessor_segment_overrun)
731 pushl $do_coprocessor_segment_overrun
733 END(coprocessor_segment_overrun)
737 pushl $do_invalid_TSS
741 ENTRY(segment_not_present)
743 pushl $do_segment_not_present
745 END(segment_not_present)
749 pushl $do_stack_segment
753 ENTRY(alignment_check)
755 pushl $do_alignment_check
761 pushl $0 # no error code
762 pushl $do_divide_error
766 #ifdef CONFIG_X86_MCE
770 pushl machine_check_vector
775 ENTRY(spurious_interrupt_bug)
778 pushl $do_spurious_interrupt_bug
780 END(spurious_interrupt_bug)
783 ENTRY(xen_hypervisor_callback)
784 pushl $-1 /* orig_ax = -1 => not a system call */
789 * Check to see if we got the event in the critical
790 * region in xen_iret_direct, after we've reenabled
791 * events and checked for pending events. This simulates
792 * iret instruction's behaviour where it delivers a
793 * pending interrupt when enabling interrupts:
795 movl PT_EIP(%esp), %eax
796 cmpl $xen_iret_start_crit, %eax
798 cmpl $xen_iret_end_crit, %eax
801 jmp xen_iret_crit_fixup
805 call xen_evtchn_do_upcall
806 #ifndef CONFIG_PREEMPT
807 call xen_maybe_preempt_hcall
810 ENDPROC(xen_hypervisor_callback)
813 * Hypervisor uses this for application faults while it executes.
814 * We get here for two reasons:
815 * 1. Fault while reloading DS, ES, FS or GS
816 * 2. Fault while executing IRET
817 * Category 1 we fix up by reattempting the load, and zeroing the segment
818 * register if the load fails.
819 * Category 2 we fix up by jumping to do_iret_error. We cannot use the
820 * normal Linux return path in this case because if we use the IRET hypercall
821 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
822 * We distinguish between categories by maintaining a status value in EAX.
824 ENTRY(xen_failsafe_callback)
831 /* EAX == 0 => Category 1 (Bad segment)
832 EAX != 0 => Category 2 (Bad IRET) */
838 5: pushl $-1 /* orig_ax = -1 => not a system call */
840 jmp ret_from_exception
842 .section .fixup, "ax"
860 ENDPROC(xen_failsafe_callback)
862 BUILD_INTERRUPT3(xen_hvm_callback_vector, HYPERVISOR_CALLBACK_VECTOR,
863 xen_evtchn_do_upcall)
865 #endif /* CONFIG_XEN */
867 #if IS_ENABLED(CONFIG_HYPERV)
869 BUILD_INTERRUPT3(hyperv_callback_vector, HYPERVISOR_CALLBACK_VECTOR,
870 hyperv_vector_handler)
872 #endif /* CONFIG_HYPERV */
874 #ifdef CONFIG_FUNCTION_TRACER
875 #ifdef CONFIG_DYNAMIC_FTRACE
885 pushl $0 /* Pass NULL as regs pointer */
888 movl function_trace_op, %ecx
889 subl $MCOUNT_INSN_SIZE, %eax
895 addl $4, %esp /* skip NULL pointer */
900 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
901 .globl ftrace_graph_call
906 /* This is weak to keep gas from relaxing the jumps */
911 ENTRY(ftrace_regs_caller)
912 pushf /* push flags before compare (in cs location) */
915 * i386 does not save SS and ESP when coming from kernel.
916 * Instead, to get sp, ®s->sp is used (see ptrace.h).
917 * Unfortunately, that means eflags must be at the same location
918 * as the current return ip is. We move the return ip into the
919 * ip location, and move flags into the return ip location.
921 pushl 4(%esp) /* save return ip into ip slot */
923 pushl $0 /* Load 0 into orig_ax */
936 movl 13*4(%esp), %eax /* Get the saved flags */
937 movl %eax, 14*4(%esp) /* Move saved flags into regs->flags location */
938 /* clobbering return ip */
939 movl $__KERNEL_CS, 13*4(%esp)
941 movl 12*4(%esp), %eax /* Load ip (1st parameter) */
942 subl $MCOUNT_INSN_SIZE, %eax /* Adjust ip */
943 movl 0x4(%ebp), %edx /* Load parent ip (2nd parameter) */
944 movl function_trace_op, %ecx /* Save ftrace_pos in 3rd parameter */
945 pushl %esp /* Save pt_regs as 4th parameter */
947 GLOBAL(ftrace_regs_call)
950 addl $4, %esp /* Skip pt_regs */
951 movl 14*4(%esp), %eax /* Move flags back into cs */
952 movl %eax, 13*4(%esp) /* Needed to keep addl from modifying flags */
953 movl 12*4(%esp), %eax /* Get return ip from regs->ip */
954 movl %eax, 14*4(%esp) /* Put return ip back for ret */
967 addl $8, %esp /* Skip orig_ax and ip */
968 popf /* Pop flags at end (no addl to corrupt flags) */
973 #else /* ! CONFIG_DYNAMIC_FTRACE */
976 cmpl $__PAGE_OFFSET, %esp
977 jb ftrace_stub /* Paging not enabled yet? */
979 cmpl $ftrace_stub, ftrace_trace_function
981 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
982 cmpl $ftrace_stub, ftrace_graph_return
983 jnz ftrace_graph_caller
985 cmpl $ftrace_graph_entry_stub, ftrace_graph_entry
986 jnz ftrace_graph_caller
992 /* taken from glibc */
999 subl $MCOUNT_INSN_SIZE, %eax
1001 movl ftrace_trace_function, %ecx
1009 #endif /* CONFIG_DYNAMIC_FTRACE */
1010 EXPORT_SYMBOL(mcount)
1011 #endif /* CONFIG_FUNCTION_TRACER */
1013 #ifdef CONFIG_FUNCTION_GRAPH_TRACER
1014 ENTRY(ftrace_graph_caller)
1018 movl 0xc(%esp), %eax
1021 subl $MCOUNT_INSN_SIZE, %eax
1022 call prepare_ftrace_return
1027 END(ftrace_graph_caller)
1029 .globl return_to_handler
1034 call ftrace_return_to_handler
1041 #ifdef CONFIG_TRACING
1042 ENTRY(trace_page_fault)
1044 pushl $trace_do_page_fault
1046 END(trace_page_fault)
1051 pushl $do_page_fault
1054 /* the function address is in %gs's slot on the stack */
1066 movl $(__KERNEL_PERCPU), %ecx
1070 movl PT_GS(%esp), %edi # get the function address
1071 movl PT_ORIG_EAX(%esp), %edx # get the error code
1072 movl $-1, PT_ORIG_EAX(%esp) # no syscall to restart
1075 movl $(__USER_DS), %ecx
1079 movl %esp, %eax # pt_regs pointer
1081 jmp ret_from_exception
1086 * #DB can happen at the first instruction of
1087 * entry_SYSENTER_32 or in Xen's SYSENTER prologue. If this
1088 * happens, then we will be running on a very small stack. We
1089 * need to detect this condition and switch to the thread
1090 * stack before calling any C code at all.
1092 * If you edit this code, keep in mind that NMIs can happen in here.
1095 pushl $-1 # mark this as an int
1097 xorl %edx, %edx # error code 0
1098 movl %esp, %eax # pt_regs pointer
1100 /* Are we currently on the SYSENTER stack? */
1101 PER_CPU(cpu_tss + CPU_TSS_SYSENTER_stack + SIZEOF_SYSENTER_stack, %ecx)
1102 subl %eax, %ecx /* ecx = (end of SYSENTER_stack) - esp */
1103 cmpl $SIZEOF_SYSENTER_stack, %ecx
1104 jb .Ldebug_from_sysenter_stack
1108 jmp ret_from_exception
1110 .Ldebug_from_sysenter_stack:
1111 /* We're on the SYSENTER stack. Switch off. */
1113 movl PER_CPU_VAR(cpu_current_top_of_stack), %esp
1117 jmp ret_from_exception
1121 * NMI is doubly nasty. It can happen on the first instruction of
1122 * entry_SYSENTER_32 (just like #DB), but it can also interrupt the beginning
1123 * of the #DB handler even if that #DB in turn hit before entry_SYSENTER_32
1124 * switched stacks. We handle both conditions by simply checking whether we
1125 * interrupted kernel code running on the SYSENTER stack.
1129 #ifdef CONFIG_X86_ESPFIX32
1132 cmpw $__ESPFIX_SS, %ax
1137 pushl %eax # pt_regs->orig_ax
1139 xorl %edx, %edx # zero error code
1140 movl %esp, %eax # pt_regs pointer
1142 /* Are we currently on the SYSENTER stack? */
1143 PER_CPU(cpu_tss + CPU_TSS_SYSENTER_stack + SIZEOF_SYSENTER_stack, %ecx)
1144 subl %eax, %ecx /* ecx = (end of SYSENTER_stack) - esp */
1145 cmpl $SIZEOF_SYSENTER_stack, %ecx
1146 jb .Lnmi_from_sysenter_stack
1148 /* Not on SYSENTER stack. */
1150 jmp restore_all_notrace
1152 .Lnmi_from_sysenter_stack:
1154 * We're on the SYSENTER stack. Switch off. No one (not even debug)
1155 * is using the thread stack right now, so it's safe for us to use it.
1158 movl PER_CPU_VAR(cpu_current_top_of_stack), %esp
1161 jmp restore_all_notrace
1163 #ifdef CONFIG_X86_ESPFIX32
1166 * create the pointer to lss back
1171 /* copy the iret frame of 12 bytes */
1177 FIXUP_ESPFIX_STACK # %eax == %esp
1178 xorl %edx, %edx # zero error code
1181 lss 12+4(%esp), %esp # back to espfix stack
1188 pushl $-1 # mark this as an int
1191 xorl %edx, %edx # zero error code
1192 movl %esp, %eax # pt_regs pointer
1194 jmp ret_from_exception
1197 ENTRY(general_protection)
1199 pushl $do_general_protection
1201 END(general_protection)
1203 #ifdef CONFIG_KVM_GUEST
1204 ENTRY(async_page_fault)
1206 pushl $do_async_page_fault
1208 END(async_page_fault)
1211 ENTRY(rewind_stack_do_exit)
1212 /* Prevent any naive code from trying to unwind to our caller. */
1215 movl PER_CPU_VAR(cpu_current_top_of_stack), %esi
1216 leal -TOP_OF_KERNEL_STACK_PADDING-PTREGS_SIZE(%esi), %esp
1220 END(rewind_stack_do_exit)