1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 1991,1992 Linus Torvalds
5 * entry_32.S contains the system-call and low-level fault and trap handling routines.
7 * Stack layout while running C code:
8 * ptrace needs to have all registers on the stack.
9 * If the order here is changed, it needs to be
10 * updated in fork.c:copy_process(), signal.c:do_signal(),
11 * ptrace.c and ptrace.h
23 * 28(%esp) - %gs saved iff !CONFIG_X86_32_LAZY_GS
32 #include <linux/linkage.h>
33 #include <linux/err.h>
34 #include <asm/thread_info.h>
35 #include <asm/irqflags.h>
36 #include <asm/errno.h>
37 #include <asm/segment.h>
39 #include <asm/percpu.h>
40 #include <asm/processor-flags.h>
41 #include <asm/irq_vectors.h>
42 #include <asm/cpufeatures.h>
43 #include <asm/alternative-asm.h>
46 #include <asm/frame.h>
47 #include <asm/nospec-branch.h>
49 .section .entry.text, "ax"
52 * We use macros for low-level operations which need to be overridden
53 * for paravirtualization. The following will never clobber any registers:
54 * INTERRUPT_RETURN (aka. "iret")
55 * GET_CR0_INTO_EAX (aka. "movl %cr0, %eax")
56 * ENABLE_INTERRUPTS_SYSEXIT (aka "sti; sysexit").
58 * For DISABLE_INTERRUPTS/ENABLE_INTERRUPTS (aka "cli"/"sti"), you must
59 * specify what registers can be overwritten (CLBR_NONE, CLBR_EAX/EDX/ECX/ANY).
60 * Allowing a register to be clobbered can shrink the paravirt replacement
61 * enough to patch inline, increasing performance.
65 # define preempt_stop(clobbers) DISABLE_INTERRUPTS(clobbers); TRACE_IRQS_OFF
67 # define preempt_stop(clobbers)
68 # define resume_kernel restore_all_kernel
71 .macro TRACE_IRQS_IRET
72 #ifdef CONFIG_TRACE_IRQFLAGS
73 testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off?
80 #define PTI_SWITCH_MASK (1 << PAGE_SHIFT)
83 * User gs save/restore
85 * %gs is used for userland TLS and kernel only uses it for stack
86 * canary which is required to be at %gs:20 by gcc. Read the comment
87 * at the top of stackprotector.h for more info.
89 * Local labels 98 and 99 are used.
91 #ifdef CONFIG_X86_32_LAZY_GS
93 /* unfortunately push/pop can't be no-op */
98 addl $(4 + \pop), %esp
103 /* all the rest are no-op */
110 .macro REG_TO_PTGS reg
112 .macro SET_KERNEL_GS reg
115 #else /* CONFIG_X86_32_LAZY_GS */
128 .pushsection .fixup, "ax"
132 _ASM_EXTABLE(98b, 99b)
136 98: mov PT_GS(%esp), %gs
139 .pushsection .fixup, "ax"
140 99: movl $0, PT_GS(%esp)
143 _ASM_EXTABLE(98b, 99b)
149 .macro REG_TO_PTGS reg
150 movl \reg, PT_GS(%esp)
152 .macro SET_KERNEL_GS reg
153 movl $(__KERNEL_STACK_CANARY), \reg
157 #endif /* CONFIG_X86_32_LAZY_GS */
159 /* Unconditionally switch to user cr3 */
160 .macro SWITCH_TO_USER_CR3 scratch_reg:req
161 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
163 movl %cr3, \scratch_reg
164 orl $PTI_SWITCH_MASK, \scratch_reg
165 movl \scratch_reg, %cr3
169 .macro BUG_IF_WRONG_CR3 no_user_check=0
170 #ifdef CONFIG_DEBUG_ENTRY
171 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
172 .if \no_user_check == 0
173 /* coming from usermode? */
174 testl $SEGMENT_RPL_MASK, PT_CS(%esp)
179 testl $PTI_SWITCH_MASK, %eax
181 /* From userspace with kernel cr3 - BUG */
188 * Switch to kernel cr3 if not already loaded and return current cr3 in
191 .macro SWITCH_TO_KERNEL_CR3 scratch_reg:req
192 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
193 movl %cr3, \scratch_reg
194 /* Test if we are already on kernel CR3 */
195 testl $PTI_SWITCH_MASK, \scratch_reg
197 andl $(~PTI_SWITCH_MASK), \scratch_reg
198 movl \scratch_reg, %cr3
199 /* Return original CR3 in \scratch_reg */
200 orl $PTI_SWITCH_MASK, \scratch_reg
204 .macro SAVE_ALL pt_regs_ax=%eax switch_stacks=0
217 movl $(__USER_DS), %edx
220 movl $(__KERNEL_PERCPU), %edx
224 /* Switch to kernel stack if necessary */
225 .if \switch_stacks > 0
226 SWITCH_TO_KERNEL_STACK
231 .macro SAVE_ALL_NMI cr3_reg:req
237 * Now switch the CR3 when PTI is enabled.
239 * We can enter with either user or kernel cr3, the code will
240 * store the old cr3 in \cr3_reg and switches to the kernel cr3
243 SWITCH_TO_KERNEL_CR3 scratch_reg=\cr3_reg
248 .macro RESTORE_INT_REGS
258 .macro RESTORE_REGS pop=0
264 .pushsection .fixup, "ax"
278 .macro RESTORE_ALL_NMI cr3_reg:req pop=0
280 * Now switch the CR3 when PTI is enabled.
282 * We enter with kernel cr3 and switch the cr3 to the value
283 * stored on \cr3_reg, which is either a user or a kernel cr3.
285 ALTERNATIVE "jmp .Lswitched_\@", "", X86_FEATURE_PTI
287 testl $PTI_SWITCH_MASK, \cr3_reg
290 /* User cr3 in \cr3_reg - write it to hardware cr3 */
297 RESTORE_REGS pop=\pop
300 .macro CHECK_AND_APPLY_ESPFIX
301 #ifdef CONFIG_X86_ESPFIX32
302 #define GDT_ESPFIX_SS PER_CPU_VAR(gdt_page) + (GDT_ENTRY_ESPFIX_SS * 8)
304 ALTERNATIVE "jmp .Lend_\@", "", X86_BUG_ESPFIX
306 movl PT_EFLAGS(%esp), %eax # mix EFLAGS, SS and CS
308 * Warning: PT_OLDSS(%esp) contains the wrong/random values if we
309 * are returning to the kernel.
310 * See comments in process.c:copy_thread() for details.
312 movb PT_OLDSS(%esp), %ah
313 movb PT_CS(%esp), %al
314 andl $(X86_EFLAGS_VM | (SEGMENT_TI_MASK << 8) | SEGMENT_RPL_MASK), %eax
315 cmpl $((SEGMENT_LDT << 8) | USER_RPL), %eax
316 jne .Lend_\@ # returning to user-space with LDT SS
319 * Setup and switch to ESPFIX stack
321 * We're returning to userspace with a 16 bit stack. The CPU will not
322 * restore the high word of ESP for us on executing iret... This is an
323 * "official" bug of all the x86-compatible CPUs, which we can work
324 * around to make dosemu and wine happy. We do this by preloading the
325 * high word of ESP with the high word of the userspace ESP while
326 * compensating for the offset by changing to the ESPFIX segment with
327 * a base address that matches for the difference.
329 mov %esp, %edx /* load kernel esp */
330 mov PT_OLDESP(%esp), %eax /* load userspace esp */
331 mov %dx, %ax /* eax: new kernel esp */
332 sub %eax, %edx /* offset (low word is 0) */
334 mov %dl, GDT_ESPFIX_SS + 4 /* bits 16..23 */
335 mov %dh, GDT_ESPFIX_SS + 7 /* bits 24..31 */
337 pushl %eax /* new kernel esp */
339 * Disable interrupts, but do not irqtrace this section: we
340 * will soon execute iret and the tracer was already set to
341 * the irqstate after the IRET:
343 DISABLE_INTERRUPTS(CLBR_ANY)
344 lss (%esp), %esp /* switch to espfix segment */
346 #endif /* CONFIG_X86_ESPFIX32 */
350 * Called with pt_regs fully populated and kernel segments loaded,
351 * so we can access PER_CPU and use the integer registers.
353 * We need to be very careful here with the %esp switch, because an NMI
354 * can happen everywhere. If the NMI handler finds itself on the
355 * entry-stack, it will overwrite the task-stack and everything we
356 * copied there. So allocate the stack-frame on the task-stack and
357 * switch to it before we do any copying.
360 #define CS_FROM_ENTRY_STACK (1 << 31)
361 #define CS_FROM_USER_CR3 (1 << 30)
363 .macro SWITCH_TO_KERNEL_STACK
365 ALTERNATIVE "", "jmp .Lend_\@", X86_FEATURE_XENPV
369 SWITCH_TO_KERNEL_CR3 scratch_reg=%eax
372 * %eax now contains the entry cr3 and we carry it forward in
373 * that register for the time this macro runs
377 * The high bits of the CS dword (__csh) are used for
378 * CS_FROM_ENTRY_STACK and CS_FROM_USER_CR3. Clear them in case
379 * hardware didn't do this for us.
381 andl $(0x0000ffff), PT_CS(%esp)
383 /* Are we on the entry stack? Bail out if not! */
384 movl PER_CPU_VAR(cpu_entry_area), %ecx
385 addl $CPU_ENTRY_AREA_entry_stack + SIZEOF_entry_stack, %ecx
386 subl %esp, %ecx /* ecx = (end of entry_stack) - esp */
387 cmpl $SIZEOF_entry_stack, %ecx
390 /* Load stack pointer into %esi and %edi */
394 /* Move %edi to the top of the entry stack */
395 andl $(MASK_entry_stack), %edi
396 addl $(SIZEOF_entry_stack), %edi
398 /* Load top of task-stack into %edi */
399 movl TSS_entry2task_stack(%edi), %edi
401 /* Special case - entry from kernel mode via entry stack */
403 movl PT_EFLAGS(%esp), %ecx # mix EFLAGS and CS
404 movb PT_CS(%esp), %cl
405 andl $(X86_EFLAGS_VM | SEGMENT_RPL_MASK), %ecx
407 movl PT_CS(%esp), %ecx
408 andl $SEGMENT_RPL_MASK, %ecx
411 jb .Lentry_from_kernel_\@
414 movl $PTREGS_SIZE, %ecx
417 testl $X86_EFLAGS_VM, PT_EFLAGS(%esi)
421 * Stack-frame contains 4 additional segment registers when
422 * coming from VM86 mode
429 /* Allocate frame on task-stack */
432 /* Switch to task-stack */
436 * We are now on the task-stack and can safely copy over the
445 .Lentry_from_kernel_\@:
448 * This handles the case when we enter the kernel from
449 * kernel-mode and %esp points to the entry-stack. When this
450 * happens we need to switch to the task-stack to run C code,
451 * but switch back to the entry-stack again when we approach
452 * iret and return to the interrupted code-path. This usually
453 * happens when we hit an exception while restoring user-space
454 * segment registers on the way back to user-space or when the
455 * sysenter handler runs with eflags.tf set.
457 * When we switch to the task-stack here, we can't trust the
458 * contents of the entry-stack anymore, as the exception handler
459 * might be scheduled out or moved to another CPU. Therefore we
460 * copy the complete entry-stack to the task-stack and set a
461 * marker in the iret-frame (bit 31 of the CS dword) to detect
462 * what we've done on the iret path.
464 * On the iret path we copy everything back and switch to the
465 * entry-stack, so that the interrupted kernel code-path
466 * continues on the same stack it was interrupted with.
468 * Be aware that an NMI can happen anytime in this code.
470 * %esi: Entry-Stack pointer (same as %esp)
471 * %edi: Top of the task stack
472 * %eax: CR3 on kernel entry
475 /* Calculate number of bytes on the entry stack in %ecx */
478 /* %ecx to the top of entry-stack */
479 andl $(MASK_entry_stack), %ecx
480 addl $(SIZEOF_entry_stack), %ecx
482 /* Number of bytes on the entry stack to %ecx */
485 /* Mark stackframe as coming from entry stack */
486 orl $CS_FROM_ENTRY_STACK, PT_CS(%esp)
489 * Test the cr3 used to enter the kernel and add a marker
490 * so that we can switch back to it before iret.
492 testl $PTI_SWITCH_MASK, %eax
494 orl $CS_FROM_USER_CR3, PT_CS(%esp)
497 * %esi and %edi are unchanged, %ecx contains the number of
498 * bytes to copy. The code at .Lcopy_pt_regs_\@ will allocate
499 * the stack-frame on task-stack and copy everything over
501 jmp .Lcopy_pt_regs_\@
507 * Switch back from the kernel stack to the entry stack.
509 * The %esp register must point to pt_regs on the task stack. It will
510 * first calculate the size of the stack-frame to copy, depending on
511 * whether we return to VM86 mode or not. With that it uses 'rep movsl'
512 * to copy the contents of the stack over to the entry stack.
514 * We must be very careful here, as we can't trust the contents of the
515 * task-stack once we switched to the entry-stack. When an NMI happens
516 * while on the entry-stack, the NMI handler will switch back to the top
517 * of the task stack, overwriting our stack-frame we are about to copy.
518 * Therefore we switch the stack only after everything is copied over.
520 .macro SWITCH_TO_ENTRY_STACK
522 ALTERNATIVE "", "jmp .Lend_\@", X86_FEATURE_XENPV
525 movl $PTREGS_SIZE, %ecx
528 testl $(X86_EFLAGS_VM), PT_EFLAGS(%esp)
531 /* Additional 4 registers to copy when returning to VM86 mode */
537 /* Initialize source and destination for movsl */
538 movl PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %edi
542 /* Save future stack pointer in %ebx */
545 /* Copy over the stack-frame */
551 * Switch to entry-stack - needs to happen after everything is
552 * copied because the NMI handler will overwrite the task-stack
553 * when on entry-stack
561 * This macro handles the case when we return to kernel-mode on the iret
562 * path and have to switch back to the entry stack and/or user-cr3
564 * See the comments below the .Lentry_from_kernel_\@ label in the
565 * SWITCH_TO_KERNEL_STACK macro for more details.
567 .macro PARANOID_EXIT_TO_KERNEL_MODE
570 * Test if we entered the kernel with the entry-stack. Most
571 * likely we did not, because this code only runs on the
572 * return-to-kernel path.
574 testl $CS_FROM_ENTRY_STACK, PT_CS(%esp)
577 /* Unlikely slow-path */
579 /* Clear marker from stack-frame */
580 andl $(~CS_FROM_ENTRY_STACK), PT_CS(%esp)
582 /* Copy the remaining task-stack contents to entry-stack */
584 movl PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %edi
586 /* Bytes on the task-stack to ecx */
587 movl PER_CPU_VAR(cpu_tss_rw + TSS_sp1), %ecx
590 /* Allocate stack-frame on entry-stack */
594 * Save future stack-pointer, we must not switch until the
595 * copy is done, otherwise the NMI handler could destroy the
596 * contents of the task-stack we are about to copy.
605 /* Safe to switch to entry-stack now */
609 * We came from entry-stack and need to check if we also need to
610 * switch back to user cr3.
612 testl $CS_FROM_USER_CR3, PT_CS(%esp)
615 /* Clear marker from stack-frame */
616 andl $(~CS_FROM_USER_CR3), PT_CS(%esp)
618 SWITCH_TO_USER_CR3 scratch_reg=%eax
626 ENTRY(__switch_to_asm)
628 * Save callee-saved registers
629 * This must match the order in struct inactive_task_frame
638 movl %esp, TASK_threadsp(%eax)
639 movl TASK_threadsp(%edx), %esp
641 #ifdef CONFIG_STACKPROTECTOR
642 movl TASK_stack_canary(%edx), %ebx
643 movl %ebx, PER_CPU_VAR(stack_canary)+stack_canary_offset
646 #ifdef CONFIG_RETPOLINE
648 * When switching from a shallower to a deeper call stack
649 * the RSB may either underflow or use entries populated
650 * with userspace addresses. On CPUs where those concerns
651 * exist, overwrite the RSB with entries which capture
652 * speculative execution to prevent attack.
654 FILL_RETURN_BUFFER %ebx, RSB_CLEAR_LOOPS, X86_FEATURE_RSB_CTXSW
657 /* restore callee-saved registers */
668 * The unwinder expects the last frame on the stack to always be at the same
669 * offset from the end of the page, which allows it to validate the stack.
670 * Calling schedule_tail() directly would break that convention because its an
671 * asmlinkage function so its argument has to be pushed on the stack. This
672 * wrapper creates a proper "end of stack" frame header before the call.
674 ENTRY(schedule_tail_wrapper)
683 ENDPROC(schedule_tail_wrapper)
685 * A newly forked process directly context switches into this address.
687 * eax: prev task we switched from
688 * ebx: kernel thread func (NULL for user thread)
689 * edi: kernel thread arg
692 call schedule_tail_wrapper
695 jnz 1f /* kernel threads are uncommon */
698 /* When we fork, we trace the syscall return in the child, too. */
700 call syscall_return_slowpath
707 * A kernel thread is allowed to return here after successfully
708 * calling do_execve(). Exit to userspace to complete the execve()
711 movl $0, PT_EAX(%esp)
716 * Return to user mode is not as complex as all this looks,
717 * but we want the default path for a system call return to
718 * go as quickly as possible which is why some of this is
719 * less clear than it otherwise should be.
722 # userspace resumption stub bypassing syscall exit tracing
725 preempt_stop(CLBR_ANY)
728 movl PT_EFLAGS(%esp), %eax # mix EFLAGS and CS
729 movb PT_CS(%esp), %al
730 andl $(X86_EFLAGS_VM | SEGMENT_RPL_MASK), %eax
733 * We can be coming here from child spawned by kernel_thread().
735 movl PT_CS(%esp), %eax
736 andl $SEGMENT_RPL_MASK, %eax
739 jb resume_kernel # not returning to v8086 or userspace
741 ENTRY(resume_userspace)
742 DISABLE_INTERRUPTS(CLBR_ANY)
745 call prepare_exit_to_usermode
747 END(ret_from_exception)
749 #ifdef CONFIG_PREEMPT
751 DISABLE_INTERRUPTS(CLBR_ANY)
753 cmpl $0, PER_CPU_VAR(__preempt_count)
754 jnz restore_all_kernel
755 testl $X86_EFLAGS_IF, PT_EFLAGS(%esp) # interrupts off (exception path) ?
756 jz restore_all_kernel
757 call preempt_schedule_irq
762 GLOBAL(__begin_SYSENTER_singlestep_region)
764 * All code from here through __end_SYSENTER_singlestep_region is subject
765 * to being single-stepped if a user program sets TF and executes SYSENTER.
766 * There is absolutely nothing that we can do to prevent this from happening
767 * (thanks Intel!). To keep our handling of this situation as simple as
768 * possible, we handle TF just like AC and NT, except that our #DB handler
769 * will ignore all of the single-step traps generated in this range.
774 * Xen doesn't set %esp to be precisely what the normal SYSENTER
775 * entry point expects, so fix it up before using the normal path.
777 ENTRY(xen_sysenter_target)
778 addl $5*4, %esp /* remove xen-provided frame */
779 jmp .Lsysenter_past_esp
783 * 32-bit SYSENTER entry.
785 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
786 * if X86_FEATURE_SEP is available. This is the preferred system call
787 * entry on 32-bit systems.
789 * The SYSENTER instruction, in principle, should *only* occur in the
790 * vDSO. In practice, a small number of Android devices were shipped
791 * with a copy of Bionic that inlined a SYSENTER instruction. This
792 * never happened in any of Google's Bionic versions -- it only happened
793 * in a narrow range of Intel-provided versions.
795 * SYSENTER loads SS, ESP, CS, and EIP from previously programmed MSRs.
796 * IF and VM in RFLAGS are cleared (IOW: interrupts are off).
797 * SYSENTER does not save anything on the stack,
798 * and does not save old EIP (!!!), ESP, or EFLAGS.
800 * To avoid losing track of EFLAGS.VM (and thus potentially corrupting
801 * user and/or vm86 state), we explicitly disable the SYSENTER
802 * instruction in vm86 mode by reprogramming the MSRs.
805 * eax system call number
814 ENTRY(entry_SYSENTER_32)
816 * On entry-stack with all userspace-regs live - save and
817 * restore eflags and %eax to use it as scratch-reg for the cr3
822 BUG_IF_WRONG_CR3 no_user_check=1
823 SWITCH_TO_KERNEL_CR3 scratch_reg=%eax
827 /* Stack empty again, switch to task stack */
828 movl TSS_entry2task_stack(%esp), %esp
831 pushl $__USER_DS /* pt_regs->ss */
832 pushl %ebp /* pt_regs->sp (stashed in bp) */
833 pushfl /* pt_regs->flags (except IF = 0) */
834 orl $X86_EFLAGS_IF, (%esp) /* Fix IF */
835 pushl $__USER_CS /* pt_regs->cs */
836 pushl $0 /* pt_regs->ip = 0 (placeholder) */
837 pushl %eax /* pt_regs->orig_ax */
838 SAVE_ALL pt_regs_ax=$-ENOSYS /* save rest, stack already switched */
841 * SYSENTER doesn't filter flags, so we need to clear NT, AC
842 * and TF ourselves. To save a few cycles, we can check whether
843 * either was set instead of doing an unconditional popfq.
844 * This needs to happen before enabling interrupts so that
845 * we don't get preempted with NT set.
847 * If TF is set, we will single-step all the way to here -- do_debug
848 * will ignore all the traps. (Yes, this is slow, but so is
849 * single-stepping in general. This allows us to avoid having
850 * a more complicated code to handle the case where a user program
851 * forces us to single-step through the SYSENTER entry code.)
853 * NB.: .Lsysenter_fix_flags is a label with the code under it moved
854 * out-of-line as an optimization: NT is unlikely to be set in the
855 * majority of the cases and instead of polluting the I$ unnecessarily,
856 * we're keeping that code behind a branch which will predict as
857 * not-taken and therefore its instructions won't be fetched.
859 testl $X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, PT_EFLAGS(%esp)
860 jnz .Lsysenter_fix_flags
861 .Lsysenter_flags_fixed:
864 * User mode is traced as though IRQs are on, and SYSENTER
870 call do_fast_syscall_32
871 /* XEN PV guests always use IRET path */
872 ALTERNATIVE "testl %eax, %eax; jz .Lsyscall_32_done", \
873 "jmp .Lsyscall_32_done", X86_FEATURE_XENPV
875 /* Opportunistic SYSEXIT */
876 TRACE_IRQS_ON /* User mode traces as IRQs on. */
879 * Setup entry stack - we keep the pointer in %eax and do the
880 * switch after almost all user-state is restored.
883 /* Load entry stack pointer and allocate frame for eflags/eax */
884 movl PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %eax
887 /* Copy eflags and eax to entry stack */
888 movl PT_EFLAGS(%esp), %edi
889 movl PT_EAX(%esp), %esi
893 /* Restore user registers and segments */
894 movl PT_EIP(%esp), %edx /* pt_regs->ip */
895 movl PT_OLDESP(%esp), %ecx /* pt_regs->sp */
896 1: mov PT_FS(%esp), %fs
899 popl %ebx /* pt_regs->bx */
900 addl $2*4, %esp /* skip pt_regs->cx and pt_regs->dx */
901 popl %esi /* pt_regs->si */
902 popl %edi /* pt_regs->di */
903 popl %ebp /* pt_regs->bp */
905 /* Switch to entry stack */
908 /* Now ready to switch the cr3 */
909 SWITCH_TO_USER_CR3 scratch_reg=%eax
912 * Restore all flags except IF. (We restore IF separately because
913 * STI gives a one-instruction window in which we won't be interrupted,
914 * whereas POPF does not.)
916 btrl $X86_EFLAGS_IF_BIT, (%esp)
917 BUG_IF_WRONG_CR3 no_user_check=1
922 * Return back to the vDSO, which will pop ecx and edx.
923 * Don't bother with DS and ES (they already contain __USER_DS).
928 .pushsection .fixup, "ax"
929 2: movl $0, PT_FS(%esp)
935 .Lsysenter_fix_flags:
936 pushl $X86_EFLAGS_FIXED
938 jmp .Lsysenter_flags_fixed
939 GLOBAL(__end_SYSENTER_singlestep_region)
940 ENDPROC(entry_SYSENTER_32)
943 * 32-bit legacy system call entry.
945 * 32-bit x86 Linux system calls traditionally used the INT $0x80
946 * instruction. INT $0x80 lands here.
948 * This entry point can be used by any 32-bit perform system calls.
949 * Instances of INT $0x80 can be found inline in various programs and
950 * libraries. It is also used by the vDSO's __kernel_vsyscall
951 * fallback for hardware that doesn't support a faster entry method.
952 * Restarted 32-bit system calls also fall back to INT $0x80
953 * regardless of what instruction was originally used to do the system
954 * call. (64-bit programs can use INT $0x80 as well, but they can
955 * only run on 64-bit kernels and therefore land in
956 * entry_INT80_compat.)
958 * This is considered a slow path. It is not used by most libc
959 * implementations on modern hardware except during process startup.
962 * eax system call number
970 ENTRY(entry_INT80_32)
972 pushl %eax /* pt_regs->orig_ax */
974 SAVE_ALL pt_regs_ax=$-ENOSYS switch_stacks=1 /* save rest */
977 * User mode is traced as though IRQs are on, and the interrupt gate
983 call do_int80_syscall_32
988 SWITCH_TO_ENTRY_STACK
989 .Lrestore_all_notrace:
990 CHECK_AND_APPLY_ESPFIX
992 /* Switch back to user CR3 */
993 SWITCH_TO_USER_CR3 scratch_reg=%eax
997 /* Restore user state */
998 RESTORE_REGS pop=4 # skip orig_eax/error_code
1001 * ARCH_HAS_MEMBARRIER_SYNC_CORE rely on IRET core serialization
1002 * when returning from IPI handler and when returning from
1003 * scheduler to user-space.
1009 PARANOID_EXIT_TO_KERNEL_MODE
1014 .section .fixup, "ax"
1016 pushl $0 # no error code
1017 pushl $do_iret_error
1019 #ifdef CONFIG_DEBUG_ENTRY
1021 * The stack-frame here is the one that iret faulted on, so its a
1022 * return-to-user frame. We are on kernel-cr3 because we come here from
1023 * the fixup code. This confuses the CR3 checker, so switch to user-cr3
1024 * as the checker expects it.
1027 SWITCH_TO_USER_CR3 scratch_reg=%eax
1031 jmp common_exception
1033 _ASM_EXTABLE(.Lirq_return, iret_exc)
1034 ENDPROC(entry_INT80_32)
1036 .macro FIXUP_ESPFIX_STACK
1038 * Switch back for ESPFIX stack to the normal zerobased stack
1040 * We can't call C functions using the ESPFIX stack. This code reads
1041 * the high word of the segment base from the GDT and swiches to the
1042 * normal stack and adjusts ESP with the matching offset.
1044 #ifdef CONFIG_X86_ESPFIX32
1045 /* fixup the stack */
1046 mov GDT_ESPFIX_SS + 4, %al /* bits 16..23 */
1047 mov GDT_ESPFIX_SS + 7, %ah /* bits 24..31 */
1049 addl %esp, %eax /* the adjusted stack pointer */
1052 lss (%esp), %esp /* switch to the normal stack segment */
1055 .macro UNWIND_ESPFIX_STACK
1056 #ifdef CONFIG_X86_ESPFIX32
1058 /* see if on espfix stack */
1059 cmpw $__ESPFIX_SS, %ax
1061 movl $__KERNEL_DS, %eax
1064 /* switch to normal stack */
1071 * Build the entry stubs with some assembler magic.
1072 * We pack 1 stub into every 8-byte block.
1075 ENTRY(irq_entries_start)
1076 vector=FIRST_EXTERNAL_VECTOR
1077 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
1078 pushl $(~vector+0x80) /* Note: always in signed byte range */
1080 jmp common_interrupt
1083 END(irq_entries_start)
1085 #ifdef CONFIG_X86_LOCAL_APIC
1087 ENTRY(spurious_entries_start)
1088 vector=FIRST_SYSTEM_VECTOR
1089 .rept (NR_VECTORS - FIRST_SYSTEM_VECTOR)
1090 pushl $(~vector+0x80) /* Note: always in signed byte range */
1095 END(spurious_entries_start)
1099 addl $-0x80, (%esp) /* Adjust vector into the [-256, -1] range */
1100 SAVE_ALL switch_stacks=1
1101 ENCODE_FRAME_POINTER
1104 call smp_spurious_interrupt
1106 ENDPROC(common_spurious)
1110 * the CPU automatically disables interrupts when executing an IRQ vector,
1111 * so IRQ-flags tracing has to follow that:
1113 .p2align CONFIG_X86_L1_CACHE_SHIFT
1116 addl $-0x80, (%esp) /* Adjust vector into the [-256, -1] range */
1118 SAVE_ALL switch_stacks=1
1119 ENCODE_FRAME_POINTER
1124 ENDPROC(common_interrupt)
1126 #define BUILD_INTERRUPT3(name, nr, fn) \
1130 SAVE_ALL switch_stacks=1; \
1131 ENCODE_FRAME_POINTER; \
1135 jmp ret_from_intr; \
1138 #define BUILD_INTERRUPT(name, nr) \
1139 BUILD_INTERRUPT3(name, nr, smp_##name); \
1141 /* The include is where all of the SMP etc. interrupts come from */
1142 #include <asm/entry_arch.h>
1144 ENTRY(coprocessor_error)
1147 pushl $do_coprocessor_error
1148 jmp common_exception
1149 END(coprocessor_error)
1151 ENTRY(simd_coprocessor_error)
1154 #ifdef CONFIG_X86_INVD_BUG
1155 /* AMD 486 bug: invd from userspace calls exception 19 instead of #GP */
1156 ALTERNATIVE "pushl $do_general_protection", \
1157 "pushl $do_simd_coprocessor_error", \
1160 pushl $do_simd_coprocessor_error
1162 jmp common_exception
1163 END(simd_coprocessor_error)
1165 ENTRY(device_not_available)
1167 pushl $-1 # mark this as an int
1168 pushl $do_device_not_available
1169 jmp common_exception
1170 END(device_not_available)
1172 #ifdef CONFIG_PARAVIRT
1175 _ASM_EXTABLE(native_iret, iret_exc)
1183 jmp common_exception
1190 jmp common_exception
1196 pushl $do_invalid_op
1197 jmp common_exception
1200 ENTRY(coprocessor_segment_overrun)
1203 pushl $do_coprocessor_segment_overrun
1204 jmp common_exception
1205 END(coprocessor_segment_overrun)
1209 pushl $do_invalid_TSS
1210 jmp common_exception
1213 ENTRY(segment_not_present)
1215 pushl $do_segment_not_present
1216 jmp common_exception
1217 END(segment_not_present)
1219 ENTRY(stack_segment)
1221 pushl $do_stack_segment
1222 jmp common_exception
1225 ENTRY(alignment_check)
1227 pushl $do_alignment_check
1228 jmp common_exception
1229 END(alignment_check)
1233 pushl $0 # no error code
1234 pushl $do_divide_error
1235 jmp common_exception
1238 #ifdef CONFIG_X86_MCE
1239 ENTRY(machine_check)
1242 pushl machine_check_vector
1243 jmp common_exception
1247 ENTRY(spurious_interrupt_bug)
1250 pushl $do_spurious_interrupt_bug
1251 jmp common_exception
1252 END(spurious_interrupt_bug)
1255 ENTRY(xen_hypervisor_callback)
1256 pushl $-1 /* orig_ax = -1 => not a system call */
1258 ENCODE_FRAME_POINTER
1262 * Check to see if we got the event in the critical
1263 * region in xen_iret_direct, after we've reenabled
1264 * events and checked for pending events. This simulates
1265 * iret instruction's behaviour where it delivers a
1266 * pending interrupt when enabling interrupts:
1268 movl PT_EIP(%esp), %eax
1269 cmpl $xen_iret_start_crit, %eax
1271 cmpl $xen_iret_end_crit, %eax
1274 jmp xen_iret_crit_fixup
1276 ENTRY(xen_do_upcall)
1278 call xen_evtchn_do_upcall
1279 #ifndef CONFIG_PREEMPT
1280 call xen_maybe_preempt_hcall
1283 ENDPROC(xen_hypervisor_callback)
1286 * Hypervisor uses this for application faults while it executes.
1287 * We get here for two reasons:
1288 * 1. Fault while reloading DS, ES, FS or GS
1289 * 2. Fault while executing IRET
1290 * Category 1 we fix up by reattempting the load, and zeroing the segment
1291 * register if the load fails.
1292 * Category 2 we fix up by jumping to do_iret_error. We cannot use the
1293 * normal Linux return path in this case because if we use the IRET hypercall
1294 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
1295 * We distinguish between categories by maintaining a status value in EAX.
1297 ENTRY(xen_failsafe_callback)
1302 3: mov 12(%esp), %fs
1303 4: mov 16(%esp), %gs
1304 /* EAX == 0 => Category 1 (Bad segment)
1305 EAX != 0 => Category 2 (Bad IRET) */
1311 5: pushl $-1 /* orig_ax = -1 => not a system call */
1313 ENCODE_FRAME_POINTER
1314 jmp ret_from_exception
1316 .section .fixup, "ax"
1330 _ASM_EXTABLE(1b, 6b)
1331 _ASM_EXTABLE(2b, 7b)
1332 _ASM_EXTABLE(3b, 8b)
1333 _ASM_EXTABLE(4b, 9b)
1334 ENDPROC(xen_failsafe_callback)
1336 BUILD_INTERRUPT3(xen_hvm_callback_vector, HYPERVISOR_CALLBACK_VECTOR,
1337 xen_evtchn_do_upcall)
1339 #endif /* CONFIG_XEN */
1341 #if IS_ENABLED(CONFIG_HYPERV)
1343 BUILD_INTERRUPT3(hyperv_callback_vector, HYPERVISOR_CALLBACK_VECTOR,
1344 hyperv_vector_handler)
1346 BUILD_INTERRUPT3(hyperv_reenlightenment_vector, HYPERV_REENLIGHTENMENT_VECTOR,
1347 hyperv_reenlightenment_intr)
1349 BUILD_INTERRUPT3(hv_stimer0_callback_vector, HYPERV_STIMER0_VECTOR,
1350 hv_stimer0_vector_handler)
1352 #endif /* CONFIG_HYPERV */
1356 pushl $do_page_fault
1358 jmp common_exception
1362 /* the function address is in %gs's slot on the stack */
1367 movl $(__USER_DS), %eax
1370 movl $(__KERNEL_PERCPU), %eax
1378 SWITCH_TO_KERNEL_STACK
1379 ENCODE_FRAME_POINTER
1383 movl PT_GS(%esp), %edi # get the function address
1384 movl PT_ORIG_EAX(%esp), %edx # get the error code
1385 movl $-1, PT_ORIG_EAX(%esp) # no syscall to restart
1389 movl %esp, %eax # pt_regs pointer
1391 jmp ret_from_exception
1392 END(common_exception)
1396 * Entry from sysenter is now handled in common_exception
1399 pushl $-1 # mark this as an int
1401 jmp common_exception
1405 * NMI is doubly nasty. It can happen on the first instruction of
1406 * entry_SYSENTER_32 (just like #DB), but it can also interrupt the beginning
1407 * of the #DB handler even if that #DB in turn hit before entry_SYSENTER_32
1408 * switched stacks. We handle both conditions by simply checking whether we
1409 * interrupted kernel code running on the SYSENTER stack.
1414 #ifdef CONFIG_X86_ESPFIX32
1417 cmpw $__ESPFIX_SS, %ax
1419 je .Lnmi_espfix_stack
1422 pushl %eax # pt_regs->orig_ax
1423 SAVE_ALL_NMI cr3_reg=%edi
1424 ENCODE_FRAME_POINTER
1425 xorl %edx, %edx # zero error code
1426 movl %esp, %eax # pt_regs pointer
1428 /* Are we currently on the SYSENTER stack? */
1429 movl PER_CPU_VAR(cpu_entry_area), %ecx
1430 addl $CPU_ENTRY_AREA_entry_stack + SIZEOF_entry_stack, %ecx
1431 subl %eax, %ecx /* ecx = (end of entry_stack) - esp */
1432 cmpl $SIZEOF_entry_stack, %ecx
1433 jb .Lnmi_from_sysenter_stack
1435 /* Not on SYSENTER stack. */
1439 .Lnmi_from_sysenter_stack:
1441 * We're on the SYSENTER stack. Switch off. No one (not even debug)
1442 * is using the thread stack right now, so it's safe for us to use it.
1445 movl PER_CPU_VAR(cpu_current_top_of_stack), %esp
1450 CHECK_AND_APPLY_ESPFIX
1451 RESTORE_ALL_NMI cr3_reg=%edi pop=4
1454 #ifdef CONFIG_X86_ESPFIX32
1457 * create the pointer to lss back
1462 /* copy the iret frame of 12 bytes */
1467 SAVE_ALL_NMI cr3_reg=%edi
1468 ENCODE_FRAME_POINTER
1469 FIXUP_ESPFIX_STACK # %eax == %esp
1470 xorl %edx, %edx # zero error code
1472 RESTORE_ALL_NMI cr3_reg=%edi
1473 lss 12+4(%esp), %esp # back to espfix stack
1480 pushl $-1 # mark this as an int
1482 SAVE_ALL switch_stacks=1
1483 ENCODE_FRAME_POINTER
1485 xorl %edx, %edx # zero error code
1486 movl %esp, %eax # pt_regs pointer
1488 jmp ret_from_exception
1491 ENTRY(general_protection)
1493 pushl $do_general_protection
1494 jmp common_exception
1495 END(general_protection)
1497 #ifdef CONFIG_KVM_GUEST
1498 ENTRY(async_page_fault)
1500 pushl $do_async_page_fault
1501 jmp common_exception
1502 END(async_page_fault)
1505 ENTRY(rewind_stack_do_exit)
1506 /* Prevent any naive code from trying to unwind to our caller. */
1509 movl PER_CPU_VAR(cpu_current_top_of_stack), %esi
1510 leal -TOP_OF_KERNEL_STACK_PADDING-PTREGS_SIZE(%esi), %esp
1514 END(rewind_stack_do_exit)