1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 1991,1992 Linus Torvalds
5 * entry_32.S contains the system-call and low-level fault and trap handling routines.
7 * Stack layout while running C code:
8 * ptrace needs to have all registers on the stack.
9 * If the order here is changed, it needs to be
10 * updated in fork.c:copy_process(), signal.c:do_signal(),
11 * ptrace.c and ptrace.h
23 * 28(%esp) - unused -- was %gs on old stackprotector kernels
32 #include <linux/linkage.h>
33 #include <linux/err.h>
34 #include <asm/thread_info.h>
35 #include <asm/irqflags.h>
36 #include <asm/errno.h>
37 #include <asm/segment.h>
39 #include <asm/percpu.h>
40 #include <asm/processor-flags.h>
41 #include <asm/irq_vectors.h>
42 #include <asm/cpufeatures.h>
43 #include <asm/alternative.h>
46 #include <asm/frame.h>
47 #include <asm/trapnr.h>
48 #include <asm/nospec-branch.h>
52 .section .entry.text, "ax"
54 #define PTI_SWITCH_MASK (1 << PAGE_SHIFT)
56 /* Unconditionally switch to user cr3 */
57 .macro SWITCH_TO_USER_CR3 scratch_reg:req
58 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
60 movl %cr3, \scratch_reg
61 orl $PTI_SWITCH_MASK, \scratch_reg
62 movl \scratch_reg, %cr3
66 .macro BUG_IF_WRONG_CR3 no_user_check=0
67 #ifdef CONFIG_DEBUG_ENTRY
68 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
69 .if \no_user_check == 0
70 /* coming from usermode? */
71 testl $USER_SEGMENT_RPL_MASK, PT_CS(%esp)
76 testl $PTI_SWITCH_MASK, %eax
78 /* From userspace with kernel cr3 - BUG */
85 * Switch to kernel cr3 if not already loaded and return current cr3 in
88 .macro SWITCH_TO_KERNEL_CR3 scratch_reg:req
89 ALTERNATIVE "jmp .Lend_\@", "", X86_FEATURE_PTI
90 movl %cr3, \scratch_reg
91 /* Test if we are already on kernel CR3 */
92 testl $PTI_SWITCH_MASK, \scratch_reg
94 andl $(~PTI_SWITCH_MASK), \scratch_reg
95 movl \scratch_reg, %cr3
96 /* Return original CR3 in \scratch_reg */
97 orl $PTI_SWITCH_MASK, \scratch_reg
101 #define CS_FROM_ENTRY_STACK (1 << 31)
102 #define CS_FROM_USER_CR3 (1 << 30)
103 #define CS_FROM_KERNEL (1 << 29)
104 #define CS_FROM_ESPFIX (1 << 28)
108 * The high bits of the CS dword (__csh) are used for CS_FROM_*.
109 * Clear them in case hardware didn't do this for us.
111 andl $0x0000ffff, 4*4(%esp)
114 testl $X86_EFLAGS_VM, 5*4(%esp)
115 jnz .Lfrom_usermode_no_fixup_\@
117 testl $USER_SEGMENT_RPL_MASK, 4*4(%esp)
118 jnz .Lfrom_usermode_no_fixup_\@
120 orl $CS_FROM_KERNEL, 4*4(%esp)
123 * When we're here from kernel mode; the (exception) stack looks like:
125 * 6*4(%esp) - <previous context>
129 * 2*4(%esp) - orig_eax
130 * 1*4(%esp) - gs / function
133 * Lets build a 5 entry IRET frame after that, such that struct pt_regs
134 * is complete and in particular regs->sp is correct. This gives us
135 * the original 6 entries as gap:
137 * 14*4(%esp) - <previous context>
138 * 13*4(%esp) - gap / flags
139 * 12*4(%esp) - gap / cs
140 * 11*4(%esp) - gap / ip
141 * 10*4(%esp) - gap / orig_eax
142 * 9*4(%esp) - gap / gs / function
143 * 8*4(%esp) - gap / fs
149 * 2*4(%esp) - orig_eax
150 * 1*4(%esp) - gs / function
155 pushl %esp # sp (points at ss)
156 addl $7*4, (%esp) # point sp back at the previous context
157 pushl 7*4(%esp) # flags
160 pushl 7*4(%esp) # orig_eax
161 pushl 7*4(%esp) # gs / function
163 .Lfrom_usermode_no_fixup_\@:
168 * We're called with %ds, %es, %fs, and %gs from the interrupted
169 * frame, so we shouldn't use them. Also, we may be in ESPFIX
170 * mode and therefore have a nonzero SS base and an offset ESP,
171 * so any attempt to access the stack needs to use SS. (except for
172 * accesses through %esp, which automatically use SS.)
174 testl $CS_FROM_KERNEL, 1*4(%esp)
175 jz .Lfinished_frame_\@
178 * Reconstruct the 3 entry IRET frame right after the (modified)
179 * regs->sp without lowering %esp in between, such that an NMI in the
180 * middle doesn't scribble our stack.
184 movl 5*4(%esp), %eax # (modified) regs->sp
186 movl 4*4(%esp), %ecx # flags
187 movl %ecx, %ss:-1*4(%eax)
189 movl 3*4(%esp), %ecx # cs
190 andl $0x0000ffff, %ecx
191 movl %ecx, %ss:-2*4(%eax)
193 movl 2*4(%esp), %ecx # ip
194 movl %ecx, %ss:-3*4(%eax)
196 movl 1*4(%esp), %ecx # eax
197 movl %ecx, %ss:-4*4(%eax)
205 .macro SAVE_ALL pt_regs_ax=%eax switch_stacks=0 skip_gs=0 unwind_espfix=0
213 movl $(__KERNEL_PERCPU), %eax
215 .if \unwind_espfix > 0
230 movl $(__USER_DS), %edx
233 /* Switch to kernel stack if necessary */
234 .if \switch_stacks > 0
235 SWITCH_TO_KERNEL_STACK
239 .macro SAVE_ALL_NMI cr3_reg:req unwind_espfix=0
240 SAVE_ALL unwind_espfix=\unwind_espfix
245 * Now switch the CR3 when PTI is enabled.
247 * We can enter with either user or kernel cr3, the code will
248 * store the old cr3 in \cr3_reg and switches to the kernel cr3
251 SWITCH_TO_KERNEL_CR3 scratch_reg=\cr3_reg
256 .macro RESTORE_INT_REGS
266 .macro RESTORE_REGS pop=0
271 addl $(4 + \pop), %esp /* pop the unused "gs" slot */
273 .pushsection .fixup, "ax"
286 .macro RESTORE_ALL_NMI cr3_reg:req pop=0
288 * Now switch the CR3 when PTI is enabled.
290 * We enter with kernel cr3 and switch the cr3 to the value
291 * stored on \cr3_reg, which is either a user or a kernel cr3.
293 ALTERNATIVE "jmp .Lswitched_\@", "", X86_FEATURE_PTI
295 testl $PTI_SWITCH_MASK, \cr3_reg
298 /* User cr3 in \cr3_reg - write it to hardware cr3 */
305 RESTORE_REGS pop=\pop
308 .macro CHECK_AND_APPLY_ESPFIX
309 #ifdef CONFIG_X86_ESPFIX32
310 #define GDT_ESPFIX_OFFSET (GDT_ENTRY_ESPFIX_SS * 8)
311 #define GDT_ESPFIX_SS PER_CPU_VAR(gdt_page) + GDT_ESPFIX_OFFSET
313 ALTERNATIVE "jmp .Lend_\@", "", X86_BUG_ESPFIX
315 movl PT_EFLAGS(%esp), %eax # mix EFLAGS, SS and CS
317 * Warning: PT_OLDSS(%esp) contains the wrong/random values if we
318 * are returning to the kernel.
319 * See comments in process.c:copy_thread() for details.
321 movb PT_OLDSS(%esp), %ah
322 movb PT_CS(%esp), %al
323 andl $(X86_EFLAGS_VM | (SEGMENT_TI_MASK << 8) | SEGMENT_RPL_MASK), %eax
324 cmpl $((SEGMENT_LDT << 8) | USER_RPL), %eax
325 jne .Lend_\@ # returning to user-space with LDT SS
328 * Setup and switch to ESPFIX stack
330 * We're returning to userspace with a 16 bit stack. The CPU will not
331 * restore the high word of ESP for us on executing iret... This is an
332 * "official" bug of all the x86-compatible CPUs, which we can work
333 * around to make dosemu and wine happy. We do this by preloading the
334 * high word of ESP with the high word of the userspace ESP while
335 * compensating for the offset by changing to the ESPFIX segment with
336 * a base address that matches for the difference.
338 mov %esp, %edx /* load kernel esp */
339 mov PT_OLDESP(%esp), %eax /* load userspace esp */
340 mov %dx, %ax /* eax: new kernel esp */
341 sub %eax, %edx /* offset (low word is 0) */
343 mov %dl, GDT_ESPFIX_SS + 4 /* bits 16..23 */
344 mov %dh, GDT_ESPFIX_SS + 7 /* bits 24..31 */
346 pushl %eax /* new kernel esp */
348 * Disable interrupts, but do not irqtrace this section: we
349 * will soon execute iret and the tracer was already set to
350 * the irqstate after the IRET:
353 lss (%esp), %esp /* switch to espfix segment */
355 #endif /* CONFIG_X86_ESPFIX32 */
359 * Called with pt_regs fully populated and kernel segments loaded,
360 * so we can access PER_CPU and use the integer registers.
362 * We need to be very careful here with the %esp switch, because an NMI
363 * can happen everywhere. If the NMI handler finds itself on the
364 * entry-stack, it will overwrite the task-stack and everything we
365 * copied there. So allocate the stack-frame on the task-stack and
366 * switch to it before we do any copying.
369 .macro SWITCH_TO_KERNEL_STACK
373 SWITCH_TO_KERNEL_CR3 scratch_reg=%eax
376 * %eax now contains the entry cr3 and we carry it forward in
377 * that register for the time this macro runs
380 /* Are we on the entry stack? Bail out if not! */
381 movl PER_CPU_VAR(cpu_entry_area), %ecx
382 addl $CPU_ENTRY_AREA_entry_stack + SIZEOF_entry_stack, %ecx
383 subl %esp, %ecx /* ecx = (end of entry_stack) - esp */
384 cmpl $SIZEOF_entry_stack, %ecx
387 /* Load stack pointer into %esi and %edi */
391 /* Move %edi to the top of the entry stack */
392 andl $(MASK_entry_stack), %edi
393 addl $(SIZEOF_entry_stack), %edi
395 /* Load top of task-stack into %edi */
396 movl TSS_entry2task_stack(%edi), %edi
398 /* Special case - entry from kernel mode via entry stack */
400 movl PT_EFLAGS(%esp), %ecx # mix EFLAGS and CS
401 movb PT_CS(%esp), %cl
402 andl $(X86_EFLAGS_VM | SEGMENT_RPL_MASK), %ecx
404 movl PT_CS(%esp), %ecx
405 andl $SEGMENT_RPL_MASK, %ecx
408 jb .Lentry_from_kernel_\@
411 movl $PTREGS_SIZE, %ecx
414 testl $X86_EFLAGS_VM, PT_EFLAGS(%esi)
418 * Stack-frame contains 4 additional segment registers when
419 * coming from VM86 mode
426 /* Allocate frame on task-stack */
429 /* Switch to task-stack */
433 * We are now on the task-stack and can safely copy over the
442 .Lentry_from_kernel_\@:
445 * This handles the case when we enter the kernel from
446 * kernel-mode and %esp points to the entry-stack. When this
447 * happens we need to switch to the task-stack to run C code,
448 * but switch back to the entry-stack again when we approach
449 * iret and return to the interrupted code-path. This usually
450 * happens when we hit an exception while restoring user-space
451 * segment registers on the way back to user-space or when the
452 * sysenter handler runs with eflags.tf set.
454 * When we switch to the task-stack here, we can't trust the
455 * contents of the entry-stack anymore, as the exception handler
456 * might be scheduled out or moved to another CPU. Therefore we
457 * copy the complete entry-stack to the task-stack and set a
458 * marker in the iret-frame (bit 31 of the CS dword) to detect
459 * what we've done on the iret path.
461 * On the iret path we copy everything back and switch to the
462 * entry-stack, so that the interrupted kernel code-path
463 * continues on the same stack it was interrupted with.
465 * Be aware that an NMI can happen anytime in this code.
467 * %esi: Entry-Stack pointer (same as %esp)
468 * %edi: Top of the task stack
469 * %eax: CR3 on kernel entry
472 /* Calculate number of bytes on the entry stack in %ecx */
475 /* %ecx to the top of entry-stack */
476 andl $(MASK_entry_stack), %ecx
477 addl $(SIZEOF_entry_stack), %ecx
479 /* Number of bytes on the entry stack to %ecx */
482 /* Mark stackframe as coming from entry stack */
483 orl $CS_FROM_ENTRY_STACK, PT_CS(%esp)
486 * Test the cr3 used to enter the kernel and add a marker
487 * so that we can switch back to it before iret.
489 testl $PTI_SWITCH_MASK, %eax
491 orl $CS_FROM_USER_CR3, PT_CS(%esp)
494 * %esi and %edi are unchanged, %ecx contains the number of
495 * bytes to copy. The code at .Lcopy_pt_regs_\@ will allocate
496 * the stack-frame on task-stack and copy everything over
498 jmp .Lcopy_pt_regs_\@
504 * Switch back from the kernel stack to the entry stack.
506 * The %esp register must point to pt_regs on the task stack. It will
507 * first calculate the size of the stack-frame to copy, depending on
508 * whether we return to VM86 mode or not. With that it uses 'rep movsl'
509 * to copy the contents of the stack over to the entry stack.
511 * We must be very careful here, as we can't trust the contents of the
512 * task-stack once we switched to the entry-stack. When an NMI happens
513 * while on the entry-stack, the NMI handler will switch back to the top
514 * of the task stack, overwriting our stack-frame we are about to copy.
515 * Therefore we switch the stack only after everything is copied over.
517 .macro SWITCH_TO_ENTRY_STACK
520 movl $PTREGS_SIZE, %ecx
523 testl $(X86_EFLAGS_VM), PT_EFLAGS(%esp)
526 /* Additional 4 registers to copy when returning to VM86 mode */
532 /* Initialize source and destination for movsl */
533 movl PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %edi
537 /* Save future stack pointer in %ebx */
540 /* Copy over the stack-frame */
546 * Switch to entry-stack - needs to happen after everything is
547 * copied because the NMI handler will overwrite the task-stack
548 * when on entry-stack
556 * This macro handles the case when we return to kernel-mode on the iret
557 * path and have to switch back to the entry stack and/or user-cr3
559 * See the comments below the .Lentry_from_kernel_\@ label in the
560 * SWITCH_TO_KERNEL_STACK macro for more details.
562 .macro PARANOID_EXIT_TO_KERNEL_MODE
565 * Test if we entered the kernel with the entry-stack. Most
566 * likely we did not, because this code only runs on the
567 * return-to-kernel path.
569 testl $CS_FROM_ENTRY_STACK, PT_CS(%esp)
572 /* Unlikely slow-path */
574 /* Clear marker from stack-frame */
575 andl $(~CS_FROM_ENTRY_STACK), PT_CS(%esp)
577 /* Copy the remaining task-stack contents to entry-stack */
579 movl PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %edi
581 /* Bytes on the task-stack to ecx */
582 movl PER_CPU_VAR(cpu_tss_rw + TSS_sp1), %ecx
585 /* Allocate stack-frame on entry-stack */
589 * Save future stack-pointer, we must not switch until the
590 * copy is done, otherwise the NMI handler could destroy the
591 * contents of the task-stack we are about to copy.
600 /* Safe to switch to entry-stack now */
604 * We came from entry-stack and need to check if we also need to
605 * switch back to user cr3.
607 testl $CS_FROM_USER_CR3, PT_CS(%esp)
610 /* Clear marker from stack-frame */
611 andl $(~CS_FROM_USER_CR3), PT_CS(%esp)
613 SWITCH_TO_USER_CR3 scratch_reg=%eax
619 * idtentry - Macro to generate entry stubs for simple IDT entries
620 * @vector: Vector number
621 * @asmsym: ASM symbol for the entry point
622 * @cfunc: C function to be called
623 * @has_error_code: Hardware pushed error code on stack
625 .macro idtentry vector asmsym cfunc has_error_code:req
626 SYM_CODE_START(\asmsym)
630 .if \has_error_code == 0
631 pushl $0 /* Clear the error code */
634 /* Push the C-function address into the GS slot */
636 /* Invoke the common exception entry */
638 SYM_CODE_END(\asmsym)
641 .macro idtentry_irq vector cfunc
642 .p2align CONFIG_X86_L1_CACHE_SHIFT
643 SYM_CODE_START_LOCAL(asm_\cfunc)
645 SAVE_ALL switch_stacks=1
648 movl PT_ORIG_EAX(%esp), %edx /* get the vector from stack */
649 movl $-1, PT_ORIG_EAX(%esp) /* no syscall to restart */
651 jmp handle_exception_return
652 SYM_CODE_END(asm_\cfunc)
655 .macro idtentry_sysvec vector cfunc
656 idtentry \vector asm_\cfunc \cfunc has_error_code=0
660 * Include the defines which emit the idt entries which are shared
661 * shared between 32 and 64 bit and emit the __irqentry_text_* markers
662 * so the stacktrace boundary checks work.
665 .globl __irqentry_text_start
666 __irqentry_text_start:
668 #include <asm/idtentry.h>
671 .globl __irqentry_text_end
678 .pushsection .text, "ax"
679 SYM_CODE_START(__switch_to_asm)
681 * Save callee-saved registers
682 * This must match the order in struct inactive_task_frame
689 * Flags are saved to prevent AC leakage. This could go
690 * away if objtool would have 32bit support to verify
691 * the STAC/CLAC correctness.
696 movl %esp, TASK_threadsp(%eax)
697 movl TASK_threadsp(%edx), %esp
699 #ifdef CONFIG_STACKPROTECTOR
700 movl TASK_stack_canary(%edx), %ebx
701 movl %ebx, PER_CPU_VAR(__stack_chk_guard)
704 #ifdef CONFIG_RETPOLINE
706 * When switching from a shallower to a deeper call stack
707 * the RSB may either underflow or use entries populated
708 * with userspace addresses. On CPUs where those concerns
709 * exist, overwrite the RSB with entries which capture
710 * speculative execution to prevent attack.
712 FILL_RETURN_BUFFER %ebx, RSB_CLEAR_LOOPS, X86_FEATURE_RSB_CTXSW
715 /* Restore flags or the incoming task to restore AC state. */
717 /* restore callee-saved registers */
724 SYM_CODE_END(__switch_to_asm)
728 * The unwinder expects the last frame on the stack to always be at the same
729 * offset from the end of the page, which allows it to validate the stack.
730 * Calling schedule_tail() directly would break that convention because its an
731 * asmlinkage function so its argument has to be pushed on the stack. This
732 * wrapper creates a proper "end of stack" frame header before the call.
734 .pushsection .text, "ax"
735 SYM_FUNC_START(schedule_tail_wrapper)
744 SYM_FUNC_END(schedule_tail_wrapper)
748 * A newly forked process directly context switches into this address.
750 * eax: prev task we switched from
751 * ebx: kernel thread func (NULL for user thread)
752 * edi: kernel thread arg
754 .pushsection .text, "ax"
755 SYM_CODE_START(ret_from_fork)
756 call schedule_tail_wrapper
759 jnz 1f /* kernel threads are uncommon */
762 /* When we fork, we trace the syscall return in the child, too. */
764 call syscall_exit_to_user_mode
765 jmp .Lsyscall_32_done
771 * A kernel thread is allowed to return here after successfully
772 * calling kernel_execve(). Exit to userspace to complete the execve()
775 movl $0, PT_EAX(%esp)
777 SYM_CODE_END(ret_from_fork)
780 SYM_ENTRY(__begin_SYSENTER_singlestep_region, SYM_L_GLOBAL, SYM_A_NONE)
782 * All code from here through __end_SYSENTER_singlestep_region is subject
783 * to being single-stepped if a user program sets TF and executes SYSENTER.
784 * There is absolutely nothing that we can do to prevent this from happening
785 * (thanks Intel!). To keep our handling of this situation as simple as
786 * possible, we handle TF just like AC and NT, except that our #DB handler
787 * will ignore all of the single-step traps generated in this range.
791 * 32-bit SYSENTER entry.
793 * 32-bit system calls through the vDSO's __kernel_vsyscall enter here
794 * if X86_FEATURE_SEP is available. This is the preferred system call
795 * entry on 32-bit systems.
797 * The SYSENTER instruction, in principle, should *only* occur in the
798 * vDSO. In practice, a small number of Android devices were shipped
799 * with a copy of Bionic that inlined a SYSENTER instruction. This
800 * never happened in any of Google's Bionic versions -- it only happened
801 * in a narrow range of Intel-provided versions.
803 * SYSENTER loads SS, ESP, CS, and EIP from previously programmed MSRs.
804 * IF and VM in RFLAGS are cleared (IOW: interrupts are off).
805 * SYSENTER does not save anything on the stack,
806 * and does not save old EIP (!!!), ESP, or EFLAGS.
808 * To avoid losing track of EFLAGS.VM (and thus potentially corrupting
809 * user and/or vm86 state), we explicitly disable the SYSENTER
810 * instruction in vm86 mode by reprogramming the MSRs.
813 * eax system call number
822 SYM_FUNC_START(entry_SYSENTER_32)
824 * On entry-stack with all userspace-regs live - save and
825 * restore eflags and %eax to use it as scratch-reg for the cr3
830 BUG_IF_WRONG_CR3 no_user_check=1
831 SWITCH_TO_KERNEL_CR3 scratch_reg=%eax
835 /* Stack empty again, switch to task stack */
836 movl TSS_entry2task_stack(%esp), %esp
839 pushl $__USER_DS /* pt_regs->ss */
840 pushl $0 /* pt_regs->sp (placeholder) */
841 pushfl /* pt_regs->flags (except IF = 0) */
842 pushl $__USER_CS /* pt_regs->cs */
843 pushl $0 /* pt_regs->ip = 0 (placeholder) */
844 pushl %eax /* pt_regs->orig_ax */
845 SAVE_ALL pt_regs_ax=$-ENOSYS /* save rest, stack already switched */
848 * SYSENTER doesn't filter flags, so we need to clear NT, AC
849 * and TF ourselves. To save a few cycles, we can check whether
850 * either was set instead of doing an unconditional popfq.
851 * This needs to happen before enabling interrupts so that
852 * we don't get preempted with NT set.
854 * If TF is set, we will single-step all the way to here -- do_debug
855 * will ignore all the traps. (Yes, this is slow, but so is
856 * single-stepping in general. This allows us to avoid having
857 * a more complicated code to handle the case where a user program
858 * forces us to single-step through the SYSENTER entry code.)
860 * NB.: .Lsysenter_fix_flags is a label with the code under it moved
861 * out-of-line as an optimization: NT is unlikely to be set in the
862 * majority of the cases and instead of polluting the I$ unnecessarily,
863 * we're keeping that code behind a branch which will predict as
864 * not-taken and therefore its instructions won't be fetched.
866 testl $X86_EFLAGS_NT|X86_EFLAGS_AC|X86_EFLAGS_TF, PT_EFLAGS(%esp)
867 jnz .Lsysenter_fix_flags
868 .Lsysenter_flags_fixed:
877 /* Opportunistic SYSEXIT */
880 * Setup entry stack - we keep the pointer in %eax and do the
881 * switch after almost all user-state is restored.
884 /* Load entry stack pointer and allocate frame for eflags/eax */
885 movl PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %eax
888 /* Copy eflags and eax to entry stack */
889 movl PT_EFLAGS(%esp), %edi
890 movl PT_EAX(%esp), %esi
894 /* Restore user registers and segments */
895 movl PT_EIP(%esp), %edx /* pt_regs->ip */
896 movl PT_OLDESP(%esp), %ecx /* pt_regs->sp */
897 1: mov PT_FS(%esp), %fs
899 popl %ebx /* pt_regs->bx */
900 addl $2*4, %esp /* skip pt_regs->cx and pt_regs->dx */
901 popl %esi /* pt_regs->si */
902 popl %edi /* pt_regs->di */
903 popl %ebp /* pt_regs->bp */
905 /* Switch to entry stack */
908 /* Now ready to switch the cr3 */
909 SWITCH_TO_USER_CR3 scratch_reg=%eax
912 * Restore all flags except IF. (We restore IF separately because
913 * STI gives a one-instruction window in which we won't be interrupted,
914 * whereas POPF does not.)
916 btrl $X86_EFLAGS_IF_BIT, (%esp)
917 BUG_IF_WRONG_CR3 no_user_check=1
922 * Return back to the vDSO, which will pop ecx and edx.
923 * Don't bother with DS and ES (they already contain __USER_DS).
928 .pushsection .fixup, "ax"
929 2: movl $0, PT_FS(%esp)
934 .Lsysenter_fix_flags:
935 pushl $X86_EFLAGS_FIXED
937 jmp .Lsysenter_flags_fixed
938 SYM_ENTRY(__end_SYSENTER_singlestep_region, SYM_L_GLOBAL, SYM_A_NONE)
939 SYM_FUNC_END(entry_SYSENTER_32)
942 * 32-bit legacy system call entry.
944 * 32-bit x86 Linux system calls traditionally used the INT $0x80
945 * instruction. INT $0x80 lands here.
947 * This entry point can be used by any 32-bit perform system calls.
948 * Instances of INT $0x80 can be found inline in various programs and
949 * libraries. It is also used by the vDSO's __kernel_vsyscall
950 * fallback for hardware that doesn't support a faster entry method.
951 * Restarted 32-bit system calls also fall back to INT $0x80
952 * regardless of what instruction was originally used to do the system
953 * call. (64-bit programs can use INT $0x80 as well, but they can
954 * only run on 64-bit kernels and therefore land in
955 * entry_INT80_compat.)
957 * This is considered a slow path. It is not used by most libc
958 * implementations on modern hardware except during process startup.
961 * eax system call number
969 SYM_FUNC_START(entry_INT80_32)
971 pushl %eax /* pt_regs->orig_ax */
973 SAVE_ALL pt_regs_ax=$-ENOSYS switch_stacks=1 /* save rest */
976 call do_int80_syscall_32
980 restore_all_switch_stack:
981 SWITCH_TO_ENTRY_STACK
982 CHECK_AND_APPLY_ESPFIX
984 /* Switch back to user CR3 */
985 SWITCH_TO_USER_CR3 scratch_reg=%eax
989 /* Restore user state */
990 RESTORE_REGS pop=4 # skip orig_eax/error_code
993 * ARCH_HAS_MEMBARRIER_SYNC_CORE rely on IRET core serialization
994 * when returning from IPI handler and when returning from
995 * scheduler to user-space.
999 .section .fixup, "ax"
1000 SYM_CODE_START(asm_iret_error)
1001 pushl $0 # no error code
1004 #ifdef CONFIG_DEBUG_ENTRY
1006 * The stack-frame here is the one that iret faulted on, so its a
1007 * return-to-user frame. We are on kernel-cr3 because we come here from
1008 * the fixup code. This confuses the CR3 checker, so switch to user-cr3
1009 * as the checker expects it.
1012 SWITCH_TO_USER_CR3 scratch_reg=%eax
1016 jmp handle_exception
1017 SYM_CODE_END(asm_iret_error)
1019 _ASM_EXTABLE(.Lirq_return, asm_iret_error)
1020 SYM_FUNC_END(entry_INT80_32)
1022 .macro FIXUP_ESPFIX_STACK
1024 * Switch back for ESPFIX stack to the normal zerobased stack
1026 * We can't call C functions using the ESPFIX stack. This code reads
1027 * the high word of the segment base from the GDT and swiches to the
1028 * normal stack and adjusts ESP with the matching offset.
1030 * We might be on user CR3 here, so percpu data is not mapped and we can't
1031 * access the GDT through the percpu segment. Instead, use SGDT to find
1032 * the cpu_entry_area alias of the GDT.
1034 #ifdef CONFIG_X86_ESPFIX32
1035 /* fixup the stack */
1039 movl 2(%esp), %ecx /* GDT address */
1041 * Careful: ECX is a linear pointer, so we need to force base
1042 * zero. %cs is the only known-linear segment we have right now.
1044 mov %cs:GDT_ESPFIX_OFFSET + 4(%ecx), %al /* bits 16..23 */
1045 mov %cs:GDT_ESPFIX_OFFSET + 7(%ecx), %ah /* bits 24..31 */
1049 addl %esp, %eax /* the adjusted stack pointer */
1052 lss (%esp), %esp /* switch to the normal stack segment */
1056 .macro UNWIND_ESPFIX_STACK
1057 /* It's safe to clobber %eax, all other regs need to be preserved */
1058 #ifdef CONFIG_X86_ESPFIX32
1060 /* see if on espfix stack */
1061 cmpw $__ESPFIX_SS, %ax
1063 /* switch to normal stack */
1069 SYM_CODE_START_LOCAL_NOALIGN(handle_exception)
1070 /* the function address is in %gs's slot on the stack */
1071 SAVE_ALL switch_stacks=1 skip_gs=1 unwind_espfix=1
1072 ENCODE_FRAME_POINTER
1074 movl PT_GS(%esp), %edi # get the function address
1076 /* fixup orig %eax */
1077 movl PT_ORIG_EAX(%esp), %edx # get the error code
1078 movl $-1, PT_ORIG_EAX(%esp) # no syscall to restart
1080 movl %esp, %eax # pt_regs pointer
1083 handle_exception_return:
1085 movl PT_EFLAGS(%esp), %eax # mix EFLAGS and CS
1086 movb PT_CS(%esp), %al
1087 andl $(X86_EFLAGS_VM | SEGMENT_RPL_MASK), %eax
1090 * We can be coming here from child spawned by kernel_thread().
1092 movl PT_CS(%esp), %eax
1093 andl $SEGMENT_RPL_MASK, %eax
1095 cmpl $USER_RPL, %eax # returning to v8086 or userspace ?
1098 PARANOID_EXIT_TO_KERNEL_MODE
1105 jmp restore_all_switch_stack
1106 SYM_CODE_END(handle_exception)
1108 SYM_CODE_START(asm_exc_double_fault)
1111 * This is a task gate handler, not an interrupt gate handler.
1112 * The error code is on the stack, but the stack is otherwise
1113 * empty. Interrupts are off. Our state is sane with the following
1116 * - CR0.TS is set. "TS" literally means "task switched".
1117 * - EFLAGS.NT is set because we're a "nested task".
1118 * - The doublefault TSS has back_link set and has been marked busy.
1119 * - TR points to the doublefault TSS and the normal TSS is busy.
1120 * - CR3 is the normal kernel PGD. This would be delightful, except
1121 * that the CPU didn't bother to save the old CR3 anywhere. This
1122 * would make it very awkward to return back to the context we came
1125 * The rest of EFLAGS is sanitized for us, so we don't need to
1126 * worry about AC or DF.
1128 * Don't even bother popping the error code. It's always zero,
1129 * and ignoring it makes us a bit more robust against buggy
1130 * hypervisor task gate implementations.
1132 * We will manually undo the task switch instead of doing a
1133 * task-switching IRET.
1136 clts /* clear CR0.TS */
1137 pushl $X86_EFLAGS_FIXED
1138 popfl /* clear EFLAGS.NT */
1140 call doublefault_shim
1142 /* We don't support returning, so we have no IRET here. */
1146 SYM_CODE_END(asm_exc_double_fault)
1149 * NMI is doubly nasty. It can happen on the first instruction of
1150 * entry_SYSENTER_32 (just like #DB), but it can also interrupt the beginning
1151 * of the #DB handler even if that #DB in turn hit before entry_SYSENTER_32
1152 * switched stacks. We handle both conditions by simply checking whether we
1153 * interrupted kernel code running on the SYSENTER stack.
1155 SYM_CODE_START(asm_exc_nmi)
1158 #ifdef CONFIG_X86_ESPFIX32
1160 * ESPFIX_SS is only ever set on the return to user path
1161 * after we've switched to the entry stack.
1165 cmpw $__ESPFIX_SS, %ax
1167 je .Lnmi_espfix_stack
1170 pushl %eax # pt_regs->orig_ax
1171 SAVE_ALL_NMI cr3_reg=%edi
1172 ENCODE_FRAME_POINTER
1173 xorl %edx, %edx # zero error code
1174 movl %esp, %eax # pt_regs pointer
1176 /* Are we currently on the SYSENTER stack? */
1177 movl PER_CPU_VAR(cpu_entry_area), %ecx
1178 addl $CPU_ENTRY_AREA_entry_stack + SIZEOF_entry_stack, %ecx
1179 subl %eax, %ecx /* ecx = (end of entry_stack) - esp */
1180 cmpl $SIZEOF_entry_stack, %ecx
1181 jb .Lnmi_from_sysenter_stack
1183 /* Not on SYSENTER stack. */
1187 .Lnmi_from_sysenter_stack:
1189 * We're on the SYSENTER stack. Switch off. No one (not even debug)
1190 * is using the thread stack right now, so it's safe for us to use it.
1193 movl PER_CPU_VAR(cpu_current_top_of_stack), %esp
1198 #ifdef CONFIG_X86_ESPFIX32
1199 testl $CS_FROM_ESPFIX, PT_CS(%esp)
1200 jnz .Lnmi_from_espfix
1203 CHECK_AND_APPLY_ESPFIX
1204 RESTORE_ALL_NMI cr3_reg=%edi pop=4
1207 #ifdef CONFIG_X86_ESPFIX32
1210 * Create the pointer to LSS back
1216 /* Copy the (short) IRET frame */
1217 pushl 4*4(%esp) # flags
1218 pushl 4*4(%esp) # cs
1219 pushl 4*4(%esp) # ip
1221 pushl %eax # orig_ax
1223 SAVE_ALL_NMI cr3_reg=%edi unwind_espfix=1
1224 ENCODE_FRAME_POINTER
1226 /* clear CS_FROM_KERNEL, set CS_FROM_ESPFIX */
1227 xorl $(CS_FROM_ESPFIX | CS_FROM_KERNEL), PT_CS(%esp)
1229 xorl %edx, %edx # zero error code
1230 movl %esp, %eax # pt_regs pointer
1231 jmp .Lnmi_from_sysenter_stack
1234 RESTORE_ALL_NMI cr3_reg=%edi
1236 * Because we cleared CS_FROM_KERNEL, IRET_FRAME 'forgot' to
1237 * fix up the gap and long frame:
1239 * 3 - original frame (exception)
1240 * 2 - ESPFIX block (above)
1241 * 6 - gap (FIXUP_FRAME)
1242 * 5 - long frame (FIXUP_FRAME)
1245 lss (1+5+6)*4(%esp), %esp # back to espfix stack
1248 SYM_CODE_END(asm_exc_nmi)
1250 .pushsection .text, "ax"
1251 SYM_CODE_START(rewind_stack_do_exit)
1252 /* Prevent any naive code from trying to unwind to our caller. */
1255 movl PER_CPU_VAR(cpu_current_top_of_stack), %esi
1256 leal -TOP_OF_KERNEL_STACK_PADDING-PTREGS_SIZE(%esi), %esp
1260 SYM_CODE_END(rewind_stack_do_exit)