2 * Glue Code for the AVX assembler implemention of the Cast5 Cipher
4 * Copyright (C) 2012 Johannes Goetzfried
5 * <Johannes.Goetzfried@informatik.stud.uni-erlangen.de>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
24 #include <linux/module.h>
25 #include <linux/hardirq.h>
26 #include <linux/types.h>
27 #include <linux/crypto.h>
28 #include <linux/err.h>
29 #include <crypto/ablk_helper.h>
30 #include <crypto/algapi.h>
31 #include <crypto/cast5.h>
32 #include <crypto/cryptd.h>
33 #include <crypto/ctr.h>
34 #include <asm/fpu/api.h>
35 #include <asm/crypto/glue_helper.h>
37 #define CAST5_PARALLEL_BLOCKS 16
39 asmlinkage void cast5_ecb_enc_16way(struct cast5_ctx *ctx, u8 *dst,
41 asmlinkage void cast5_ecb_dec_16way(struct cast5_ctx *ctx, u8 *dst,
43 asmlinkage void cast5_cbc_dec_16way(struct cast5_ctx *ctx, u8 *dst,
45 asmlinkage void cast5_ctr_16way(struct cast5_ctx *ctx, u8 *dst, const u8 *src,
48 static inline bool cast5_fpu_begin(bool fpu_enabled, unsigned int nbytes)
50 return glue_fpu_begin(CAST5_BLOCK_SIZE, CAST5_PARALLEL_BLOCKS,
51 NULL, fpu_enabled, nbytes);
54 static inline void cast5_fpu_end(bool fpu_enabled)
56 return glue_fpu_end(fpu_enabled);
59 static int ecb_crypt(struct blkcipher_desc *desc, struct blkcipher_walk *walk,
62 bool fpu_enabled = false;
63 struct cast5_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
64 const unsigned int bsize = CAST5_BLOCK_SIZE;
66 void (*fn)(struct cast5_ctx *ctx, u8 *dst, const u8 *src);
69 err = blkcipher_walk_virt(desc, walk);
70 desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
72 while ((nbytes = walk->nbytes)) {
73 u8 *wsrc = walk->src.virt.addr;
74 u8 *wdst = walk->dst.virt.addr;
76 fpu_enabled = cast5_fpu_begin(fpu_enabled, nbytes);
78 /* Process multi-block batch */
79 if (nbytes >= bsize * CAST5_PARALLEL_BLOCKS) {
80 fn = (enc) ? cast5_ecb_enc_16way : cast5_ecb_dec_16way;
84 wsrc += bsize * CAST5_PARALLEL_BLOCKS;
85 wdst += bsize * CAST5_PARALLEL_BLOCKS;
86 nbytes -= bsize * CAST5_PARALLEL_BLOCKS;
87 } while (nbytes >= bsize * CAST5_PARALLEL_BLOCKS);
93 fn = (enc) ? __cast5_encrypt : __cast5_decrypt;
95 /* Handle leftovers */
102 } while (nbytes >= bsize);
105 err = blkcipher_walk_done(desc, walk, nbytes);
108 cast5_fpu_end(fpu_enabled);
112 static int ecb_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
113 struct scatterlist *src, unsigned int nbytes)
115 struct blkcipher_walk walk;
117 blkcipher_walk_init(&walk, dst, src, nbytes);
118 return ecb_crypt(desc, &walk, true);
121 static int ecb_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
122 struct scatterlist *src, unsigned int nbytes)
124 struct blkcipher_walk walk;
126 blkcipher_walk_init(&walk, dst, src, nbytes);
127 return ecb_crypt(desc, &walk, false);
130 static unsigned int __cbc_encrypt(struct blkcipher_desc *desc,
131 struct blkcipher_walk *walk)
133 struct cast5_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
134 const unsigned int bsize = CAST5_BLOCK_SIZE;
135 unsigned int nbytes = walk->nbytes;
136 u64 *src = (u64 *)walk->src.virt.addr;
137 u64 *dst = (u64 *)walk->dst.virt.addr;
138 u64 *iv = (u64 *)walk->iv;
142 __cast5_encrypt(ctx, (u8 *)dst, (u8 *)dst);
148 } while (nbytes >= bsize);
150 *(u64 *)walk->iv = *iv;
154 static int cbc_encrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
155 struct scatterlist *src, unsigned int nbytes)
157 struct blkcipher_walk walk;
160 blkcipher_walk_init(&walk, dst, src, nbytes);
161 err = blkcipher_walk_virt(desc, &walk);
163 while ((nbytes = walk.nbytes)) {
164 nbytes = __cbc_encrypt(desc, &walk);
165 err = blkcipher_walk_done(desc, &walk, nbytes);
171 static unsigned int __cbc_decrypt(struct blkcipher_desc *desc,
172 struct blkcipher_walk *walk)
174 struct cast5_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
175 const unsigned int bsize = CAST5_BLOCK_SIZE;
176 unsigned int nbytes = walk->nbytes;
177 u64 *src = (u64 *)walk->src.virt.addr;
178 u64 *dst = (u64 *)walk->dst.virt.addr;
181 /* Start of the last block. */
182 src += nbytes / bsize - 1;
183 dst += nbytes / bsize - 1;
187 /* Process multi-block batch */
188 if (nbytes >= bsize * CAST5_PARALLEL_BLOCKS) {
190 nbytes -= bsize * (CAST5_PARALLEL_BLOCKS - 1);
191 src -= CAST5_PARALLEL_BLOCKS - 1;
192 dst -= CAST5_PARALLEL_BLOCKS - 1;
194 cast5_cbc_dec_16way(ctx, (u8 *)dst, (u8 *)src);
203 } while (nbytes >= bsize * CAST5_PARALLEL_BLOCKS);
206 /* Handle leftovers */
208 __cast5_decrypt(ctx, (u8 *)dst, (u8 *)src);
220 *dst ^= *(u64 *)walk->iv;
221 *(u64 *)walk->iv = last_iv;
226 static int cbc_decrypt(struct blkcipher_desc *desc, struct scatterlist *dst,
227 struct scatterlist *src, unsigned int nbytes)
229 bool fpu_enabled = false;
230 struct blkcipher_walk walk;
233 blkcipher_walk_init(&walk, dst, src, nbytes);
234 err = blkcipher_walk_virt(desc, &walk);
235 desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
237 while ((nbytes = walk.nbytes)) {
238 fpu_enabled = cast5_fpu_begin(fpu_enabled, nbytes);
239 nbytes = __cbc_decrypt(desc, &walk);
240 err = blkcipher_walk_done(desc, &walk, nbytes);
243 cast5_fpu_end(fpu_enabled);
247 static void ctr_crypt_final(struct blkcipher_desc *desc,
248 struct blkcipher_walk *walk)
250 struct cast5_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
251 u8 *ctrblk = walk->iv;
252 u8 keystream[CAST5_BLOCK_SIZE];
253 u8 *src = walk->src.virt.addr;
254 u8 *dst = walk->dst.virt.addr;
255 unsigned int nbytes = walk->nbytes;
257 __cast5_encrypt(ctx, keystream, ctrblk);
258 crypto_xor(keystream, src, nbytes);
259 memcpy(dst, keystream, nbytes);
261 crypto_inc(ctrblk, CAST5_BLOCK_SIZE);
264 static unsigned int __ctr_crypt(struct blkcipher_desc *desc,
265 struct blkcipher_walk *walk)
267 struct cast5_ctx *ctx = crypto_blkcipher_ctx(desc->tfm);
268 const unsigned int bsize = CAST5_BLOCK_SIZE;
269 unsigned int nbytes = walk->nbytes;
270 u64 *src = (u64 *)walk->src.virt.addr;
271 u64 *dst = (u64 *)walk->dst.virt.addr;
273 /* Process multi-block batch */
274 if (nbytes >= bsize * CAST5_PARALLEL_BLOCKS) {
276 cast5_ctr_16way(ctx, (u8 *)dst, (u8 *)src,
279 src += CAST5_PARALLEL_BLOCKS;
280 dst += CAST5_PARALLEL_BLOCKS;
281 nbytes -= bsize * CAST5_PARALLEL_BLOCKS;
282 } while (nbytes >= bsize * CAST5_PARALLEL_BLOCKS);
288 /* Handle leftovers */
295 ctrblk = *(u64 *)walk->iv;
296 be64_add_cpu((__be64 *)walk->iv, 1);
298 __cast5_encrypt(ctx, (u8 *)&ctrblk, (u8 *)&ctrblk);
304 } while (nbytes >= bsize);
310 static int ctr_crypt(struct blkcipher_desc *desc, struct scatterlist *dst,
311 struct scatterlist *src, unsigned int nbytes)
313 bool fpu_enabled = false;
314 struct blkcipher_walk walk;
317 blkcipher_walk_init(&walk, dst, src, nbytes);
318 err = blkcipher_walk_virt_block(desc, &walk, CAST5_BLOCK_SIZE);
319 desc->flags &= ~CRYPTO_TFM_REQ_MAY_SLEEP;
321 while ((nbytes = walk.nbytes) >= CAST5_BLOCK_SIZE) {
322 fpu_enabled = cast5_fpu_begin(fpu_enabled, nbytes);
323 nbytes = __ctr_crypt(desc, &walk);
324 err = blkcipher_walk_done(desc, &walk, nbytes);
327 cast5_fpu_end(fpu_enabled);
330 ctr_crypt_final(desc, &walk);
331 err = blkcipher_walk_done(desc, &walk, 0);
338 static struct crypto_alg cast5_algs[6] = { {
339 .cra_name = "__ecb-cast5-avx",
340 .cra_driver_name = "__driver-ecb-cast5-avx",
342 .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER |
344 .cra_blocksize = CAST5_BLOCK_SIZE,
345 .cra_ctxsize = sizeof(struct cast5_ctx),
347 .cra_type = &crypto_blkcipher_type,
348 .cra_module = THIS_MODULE,
351 .min_keysize = CAST5_MIN_KEY_SIZE,
352 .max_keysize = CAST5_MAX_KEY_SIZE,
353 .setkey = cast5_setkey,
354 .encrypt = ecb_encrypt,
355 .decrypt = ecb_decrypt,
359 .cra_name = "__cbc-cast5-avx",
360 .cra_driver_name = "__driver-cbc-cast5-avx",
362 .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER |
364 .cra_blocksize = CAST5_BLOCK_SIZE,
365 .cra_ctxsize = sizeof(struct cast5_ctx),
367 .cra_type = &crypto_blkcipher_type,
368 .cra_module = THIS_MODULE,
371 .min_keysize = CAST5_MIN_KEY_SIZE,
372 .max_keysize = CAST5_MAX_KEY_SIZE,
373 .setkey = cast5_setkey,
374 .encrypt = cbc_encrypt,
375 .decrypt = cbc_decrypt,
379 .cra_name = "__ctr-cast5-avx",
380 .cra_driver_name = "__driver-ctr-cast5-avx",
382 .cra_flags = CRYPTO_ALG_TYPE_BLKCIPHER |
385 .cra_ctxsize = sizeof(struct cast5_ctx),
387 .cra_type = &crypto_blkcipher_type,
388 .cra_module = THIS_MODULE,
391 .min_keysize = CAST5_MIN_KEY_SIZE,
392 .max_keysize = CAST5_MAX_KEY_SIZE,
393 .ivsize = CAST5_BLOCK_SIZE,
394 .setkey = cast5_setkey,
395 .encrypt = ctr_crypt,
396 .decrypt = ctr_crypt,
400 .cra_name = "ecb(cast5)",
401 .cra_driver_name = "ecb-cast5-avx",
403 .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
404 .cra_blocksize = CAST5_BLOCK_SIZE,
405 .cra_ctxsize = sizeof(struct async_helper_ctx),
407 .cra_type = &crypto_ablkcipher_type,
408 .cra_module = THIS_MODULE,
409 .cra_init = ablk_init,
410 .cra_exit = ablk_exit,
413 .min_keysize = CAST5_MIN_KEY_SIZE,
414 .max_keysize = CAST5_MAX_KEY_SIZE,
415 .setkey = ablk_set_key,
416 .encrypt = ablk_encrypt,
417 .decrypt = ablk_decrypt,
421 .cra_name = "cbc(cast5)",
422 .cra_driver_name = "cbc-cast5-avx",
424 .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
425 .cra_blocksize = CAST5_BLOCK_SIZE,
426 .cra_ctxsize = sizeof(struct async_helper_ctx),
428 .cra_type = &crypto_ablkcipher_type,
429 .cra_module = THIS_MODULE,
430 .cra_init = ablk_init,
431 .cra_exit = ablk_exit,
434 .min_keysize = CAST5_MIN_KEY_SIZE,
435 .max_keysize = CAST5_MAX_KEY_SIZE,
436 .ivsize = CAST5_BLOCK_SIZE,
437 .setkey = ablk_set_key,
438 .encrypt = __ablk_encrypt,
439 .decrypt = ablk_decrypt,
443 .cra_name = "ctr(cast5)",
444 .cra_driver_name = "ctr-cast5-avx",
446 .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC,
448 .cra_ctxsize = sizeof(struct async_helper_ctx),
450 .cra_type = &crypto_ablkcipher_type,
451 .cra_module = THIS_MODULE,
452 .cra_init = ablk_init,
453 .cra_exit = ablk_exit,
456 .min_keysize = CAST5_MIN_KEY_SIZE,
457 .max_keysize = CAST5_MAX_KEY_SIZE,
458 .ivsize = CAST5_BLOCK_SIZE,
459 .setkey = ablk_set_key,
460 .encrypt = ablk_encrypt,
461 .decrypt = ablk_encrypt,
467 static int __init cast5_init(void)
469 const char *feature_name;
471 if (!cpu_has_xfeatures(XFEATURE_MASK_SSE | XFEATURE_MASK_YMM,
473 pr_info("CPU feature '%s' is not supported.\n", feature_name);
477 return crypto_register_algs(cast5_algs, ARRAY_SIZE(cast5_algs));
480 static void __exit cast5_exit(void)
482 crypto_unregister_algs(cast5_algs, ARRAY_SIZE(cast5_algs));
485 module_init(cast5_init);
486 module_exit(cast5_exit);
488 MODULE_DESCRIPTION("Cast5 Cipher Algorithm, AVX optimized");
489 MODULE_LICENSE("GPL");
490 MODULE_ALIAS_CRYPTO("cast5");