2 #include <asm/e820/types.h>
3 #include <asm/processor.h>
8 #define BIOS_START_MIN 0x20000U /* 128K, less than this is insane */
9 #define BIOS_START_MAX 0x9f000U /* 640K, absolute maximum */
11 struct paging_config {
12 unsigned long trampoline_start;
13 unsigned long l5_required;
16 /* Buffer to preserve trampoline memory */
17 static char trampoline_save[TRAMPOLINE_32BIT_SIZE];
20 * Trampoline address will be printed by extract_kernel() for debugging
23 * Avoid putting the pointer into .bss as it will be cleared between
24 * paging_prepare() and extract_kernel().
26 unsigned long *trampoline_32bit __section(.data);
28 extern struct boot_params *boot_params;
29 int cmdline_find_option_bool(const char *option);
31 static unsigned long find_trampoline_placement(void)
33 unsigned long bios_start = 0, ebda_start = 0;
34 struct boot_e820_entry *entry;
39 * Find a suitable spot for the trampoline.
40 * This code is based on reserve_bios_regions().
44 * EFI systems may not provide legacy ROM. The memory may not be mapped
47 * Only look for values in the legacy ROM for non-EFI system.
49 signature = (char *)&boot_params->efi_info.efi_loader_signature;
50 if (strncmp(signature, EFI32_LOADER_SIGNATURE, 4) &&
51 strncmp(signature, EFI64_LOADER_SIGNATURE, 4)) {
52 ebda_start = *(unsigned short *)0x40e << 4;
53 bios_start = *(unsigned short *)0x413 << 10;
56 if (bios_start < BIOS_START_MIN || bios_start > BIOS_START_MAX)
57 bios_start = BIOS_START_MAX;
59 if (ebda_start > BIOS_START_MIN && ebda_start < bios_start)
60 bios_start = ebda_start;
62 bios_start = round_down(bios_start, PAGE_SIZE);
64 /* Find the first usable memory region under bios_start. */
65 for (i = boot_params->e820_entries - 1; i >= 0; i--) {
66 unsigned long new = bios_start;
68 entry = &boot_params->e820_table[i];
70 /* Skip all entries above bios_start. */
71 if (bios_start <= entry->addr)
74 /* Skip non-RAM entries. */
75 if (entry->type != E820_TYPE_RAM)
78 /* Adjust bios_start to the end of the entry if needed. */
79 if (bios_start > entry->addr + entry->size)
80 new = entry->addr + entry->size;
82 /* Keep bios_start page-aligned. */
83 new = round_down(new, PAGE_SIZE);
85 /* Skip the entry if it's too small. */
86 if (new - TRAMPOLINE_32BIT_SIZE < entry->addr)
89 /* Protect against underflow. */
90 if (new - TRAMPOLINE_32BIT_SIZE > bios_start)
97 /* Place the trampoline just below the end of low memory */
98 return bios_start - TRAMPOLINE_32BIT_SIZE;
101 struct paging_config paging_prepare(void *rmode)
103 struct paging_config paging_config = {};
105 /* Initialize boot_params. Required for cmdline_find_option_bool(). */
109 * Check if LA57 is desired and supported.
111 * There are several parts to the check:
112 * - if the kernel supports 5-level paging: CONFIG_X86_5LEVEL=y
113 * - if user asked to disable 5-level paging: no5lvl in cmdline
114 * - if the machine supports 5-level paging:
115 * + CPUID leaf 7 is supported
116 * + the leaf has the feature bit set
118 * That's substitute for boot_cpu_has() in early boot code.
120 if (IS_ENABLED(CONFIG_X86_5LEVEL) &&
121 !cmdline_find_option_bool("no5lvl") &&
122 native_cpuid_eax(0) >= 7 &&
123 (native_cpuid_ecx(7) & (1 << (X86_FEATURE_LA57 & 31)))) {
124 paging_config.l5_required = 1;
127 paging_config.trampoline_start = find_trampoline_placement();
129 trampoline_32bit = (unsigned long *)paging_config.trampoline_start;
131 /* Preserve trampoline memory */
132 memcpy(trampoline_save, trampoline_32bit, TRAMPOLINE_32BIT_SIZE);
134 /* Clear trampoline memory first */
135 memset(trampoline_32bit, 0, TRAMPOLINE_32BIT_SIZE);
137 /* Copy trampoline code in place */
138 memcpy(trampoline_32bit + TRAMPOLINE_32BIT_CODE_OFFSET / sizeof(unsigned long),
139 &trampoline_32bit_src, TRAMPOLINE_32BIT_CODE_SIZE);
142 * The code below prepares page table in trampoline memory.
144 * The new page table will be used by trampoline code for switching
145 * from 4- to 5-level paging or vice versa.
147 * If switching is not required, the page table is unused: trampoline
148 * code wouldn't touch CR3.
152 * We are not going to use the page table in trampoline memory if we
153 * are already in the desired paging mode.
155 if (paging_config.l5_required == !!(native_read_cr4() & X86_CR4_LA57))
158 if (paging_config.l5_required) {
160 * For 4- to 5-level paging transition, set up current CR3 as
161 * the first and the only entry in a new top-level page table.
163 trampoline_32bit[TRAMPOLINE_32BIT_PGTABLE_OFFSET] = __native_read_cr3() | _PAGE_TABLE_NOENC;
168 * For 5- to 4-level paging transition, copy page table pointed
169 * by first entry in the current top-level page table as our
170 * new top-level page table.
172 * We cannot just point to the page table from trampoline as it
175 src = *(unsigned long *)__native_read_cr3() & PAGE_MASK;
176 memcpy(trampoline_32bit + TRAMPOLINE_32BIT_PGTABLE_OFFSET / sizeof(unsigned long),
177 (void *)src, PAGE_SIZE);
181 return paging_config;
184 void cleanup_trampoline(void *pgtable)
186 void *trampoline_pgtable;
188 trampoline_pgtable = trampoline_32bit + TRAMPOLINE_32BIT_PGTABLE_OFFSET / sizeof(unsigned long);
191 * Move the top level page table out of trampoline memory,
194 if ((void *)__native_read_cr3() == trampoline_pgtable) {
195 memcpy(pgtable, trampoline_pgtable, PAGE_SIZE);
196 native_write_cr3((unsigned long)pgtable);
199 /* Restore trampoline memory */
200 memcpy(trampoline_32bit, trampoline_save, TRAMPOLINE_32BIT_SIZE);