1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 1991, 1992, 1993 Linus Torvalds
9 * head.S contains the 32-bit startup code.
11 * NOTE!!! Startup happens at absolute address 0x00001000, which is also where
12 * the page directory will exist. The startup code will be overwritten by
13 * the page directory. [According to comments etc elsewhere on a compressed
14 * kernel it will end up at 0x1000 + 1Mb I hope so as I assume this. - AC]
16 * Page 0 is deliberately kept safe, since System Management Mode code in
17 * laptops may need to access the BIOS data stored there. This is also
18 * useful for future device drivers that either access the BIOS via VM86
23 * High loaded stuff by Hans Lermen & Werner Almesberger, Feb. 1996
28 #include <linux/init.h>
29 #include <linux/linkage.h>
30 #include <asm/segment.h>
33 #include <asm/processor-flags.h>
34 #include <asm/asm-offsets.h>
35 #include <asm/bootparam.h>
39 * Locally defined symbols should be marked hidden:
51 * 32bit entry is 0 and it is ABI so immutable!
52 * If we come here directly from a bootloader,
53 * kernel(text+data+bss+brk) ramdisk, zero_page, command line
54 * all need to be under the 4G limit.
58 * Test KEEP_SEGMENTS flag to see if the bootloader is asking
59 * us to not reload segments
61 testb $KEEP_SEGMENTS, BP_loadflags(%esi)
65 movl $(__BOOT_DS), %eax
72 * Calculate the delta between where we were compiled to run
73 * at and where we were actually loaded at. This can only be done
74 * with a short local call on x86. Nothing else will tell us what
75 * address we are running at. The reserved chunk of the real-mode
76 * data at 0x1e4 (defined as a scratch field) are used as the stack
77 * for this calculation. Only 4 bytes are needed.
79 leal (BP_scratch+4)(%esi), %esp
84 /* setup a stack and make sure cpu supports long mode. */
85 movl $boot_stack_end, %eax
94 * Compute the delta between where we were compiled to run at
95 * and where the code will actually run at.
97 * %ebp contains the address we are loaded at by the boot loader and %ebx
98 * contains the address where we should move the kernel image temporarily
99 * for safe in-place decompression.
102 #ifdef CONFIG_RELOCATABLE
104 movl BP_kernel_alignment(%esi), %eax
109 cmpl $LOAD_PHYSICAL_ADDR, %ebx
112 movl $LOAD_PHYSICAL_ADDR, %ebx
115 /* Target address to relocate to for decompression */
116 movl BP_init_size(%esi), %eax
121 * Prepare for entering 64 bit mode
124 /* Load new GDT with the 64bit segments using 32bit descriptor */
125 addl %ebp, gdt+2(%ebp)
128 /* Enable PAE mode */
130 orl $X86_CR4_PAE, %eax
134 * Build early 4G boot pagetable
137 * If SEV is active then set the encryption mask in the page tables.
138 * This will insure that when the kernel is copied and decompressed
139 * it will be done so encrypted.
141 call get_sev_encryption_bit
145 subl $32, %eax /* Encryption bit is always above bit 31 */
146 bts %eax, %edx /* Set encryption mask for page tables */
149 /* Initialize Page tables to 0 */
150 leal pgtable(%ebx), %edi
152 movl $(BOOT_INIT_PGT_SIZE/4), %ecx
156 leal pgtable + 0(%ebx), %edi
157 leal 0x1007 (%edi), %eax
162 leal pgtable + 0x1000(%ebx), %edi
163 leal 0x1007(%edi), %eax
165 1: movl %eax, 0x00(%edi)
166 addl %edx, 0x04(%edi)
167 addl $0x00001000, %eax
173 leal pgtable + 0x2000(%ebx), %edi
174 movl $0x00000183, %eax
176 1: movl %eax, 0(%edi)
178 addl $0x00200000, %eax
183 /* Enable the boot page tables */
184 leal pgtable(%ebx), %eax
187 /* Enable Long mode in EFER (Extended Feature Enable Register) */
190 btsl $_EFER_LME, %eax
193 /* After gdt is loaded */
196 movl $__BOOT_TSS, %eax
200 * Setup for the jump to 64bit mode
202 * When the jump is performend we will be in long mode but
203 * in 32bit compatibility mode with EFER.LME = 1, CS.L = 0, CS.D = 1
204 * (and in turn EFER.LMA = 1). To jump into 64bit mode we use
205 * the new gdt/idt that has __KERNEL_CS with CS.L = 1.
206 * We place all of the values on our mini stack so lret can
207 * used to perform that far jump.
210 leal startup_64(%ebp), %eax
211 #ifdef CONFIG_EFI_MIXED
212 movl efi32_config(%ebp), %ebx
215 leal handover_entry(%ebp), %eax
220 /* Enter paged protected Mode, activating Long Mode */
221 movl $(X86_CR0_PG | X86_CR0_PE), %eax /* Enable Paging and Protected mode */
224 /* Jump from 32bit compatibility mode into 64bit mode. */
228 #ifdef CONFIG_EFI_MIXED
230 ENTRY(efi32_stub_entry)
231 add $0x4, %esp /* Discard return address */
236 leal (BP_scratch+4)(%esi), %esp
241 movl %ecx, efi32_config(%ebp)
242 movl %edx, efi32_config+8(%ebp)
243 sgdtl efi32_boot_gdt(%ebp)
245 leal efi32_config(%ebp), %eax
246 movl %eax, efi_config(%ebp)
250 btrl $X86_CR0_PG_BIT, %eax
254 ENDPROC(efi32_stub_entry)
261 * 64bit entry is 0x200 and it is ABI so immutable!
262 * We come here either from startup_32 or directly from a
264 * If we come here from a bootloader, kernel(text+data+bss+brk),
265 * ramdisk, zero_page, command line could be above 4G.
266 * We depend on an identity mapped page table being provided
267 * that maps our entire kernel(text+data+bss+brk), zero page
271 /* Setup data segments. */
280 * Compute the decompressed kernel start address. It is where
281 * we were loaded at aligned to a 2M boundary. %rbp contains the
282 * decompressed kernel start address.
284 * If it is a relocatable kernel then decompress and run the kernel
285 * from load address aligned to 2MB addr, otherwise decompress and
286 * run the kernel from LOAD_PHYSICAL_ADDR
288 * We cannot rely on the calculation done in 32-bit mode, since we
289 * may have been invoked via the 64-bit entry point.
292 /* Start with the delta to where the kernel will run at. */
293 #ifdef CONFIG_RELOCATABLE
294 leaq startup_32(%rip) /* - $startup_32 */, %rbp
295 movl BP_kernel_alignment(%rsi), %eax
300 cmpq $LOAD_PHYSICAL_ADDR, %rbp
303 movq $LOAD_PHYSICAL_ADDR, %rbp
306 /* Target address to relocate to for decompression */
307 movl BP_init_size(%rsi), %ebx
311 /* Set up the stack */
312 leaq boot_stack_end(%rbx), %rsp
315 * paging_prepare() and cleanup_trampoline() below can have GOT
316 * references. Adjust the table with address we are running at.
318 * Zero RAX for adjust_got: the GOT was not adjusted before;
319 * there's no adjustment to undo.
324 * Calculate the address the binary is loaded at and use it as
334 * At this point we are in long mode with 4-level paging enabled,
335 * but we might want to enable 5-level paging or vice versa.
337 * The problem is that we cannot do it directly. Setting or clearing
338 * CR4.LA57 in long mode would trigger #GP. So we need to switch off
339 * long mode and paging first.
341 * We also need a trampoline in lower memory to switch over from
342 * 4- to 5-level paging for cases when the bootloader puts the kernel
343 * above 4G, but didn't enable 5-level paging for us.
345 * The same trampoline can be used to switch from 5- to 4-level paging
346 * mode, like when starting 4-level paging kernel via kexec() when
347 * original kernel worked in 5-level paging mode.
349 * For the trampoline, we need the top page table to reside in lower
350 * memory as we don't have a way to load 64-bit values into CR3 in
353 * We go though the trampoline even if we don't have to: if we're
354 * already in a desired paging mode. This way the trampoline code gets
355 * tested on every boot.
358 /* Make sure we have GDT with 32-bit code segment */
360 movq %rax, gdt64+2(%rip)
364 * paging_prepare() sets up the trampoline and checks if we need to
365 * enable 5-level paging.
367 * paging_prepare() returns a two-quadword structure which lands
369 * - Address of the trampoline is returned in RAX.
370 * - Non zero RDX means trampoline needs to enable 5-level
373 * RSI holds real mode data and needs to be preserved across
374 * this function call.
377 movq %rsi, %rdi /* real mode address */
381 /* Save the trampoline address in RCX */
384 /* Set up 32-bit addressable stack */
385 leaq TRAMPOLINE_32BIT_STACK_END(%rcx), %rsp
388 * Preserve live 64-bit registers on the stack: this is necessary
389 * because the architecture does not guarantee that GPRs will retain
390 * their full 64-bit values across a 32-bit mode switch.
397 * Push the 64-bit address of trampoline_return() onto the new stack.
398 * It will be used by the trampoline to return to the main code. Due to
399 * the 32-bit mode switch, it cannot be kept it in a register either.
401 leaq trampoline_return(%rip), %rdi
404 /* Switch to compatibility mode (CS.L = 0 CS.D = 1) via far return */
406 leaq TRAMPOLINE_32BIT_CODE_OFFSET(%rax), %rax
410 /* Restore live 64-bit registers */
415 /* Restore the stack, the 32-bit trampoline uses its own stack */
416 leaq boot_stack_end(%rbx), %rsp
419 * cleanup_trampoline() would restore trampoline memory.
421 * RDI is address of the page table to use instead of page table
422 * in trampoline memory (if required).
424 * RSI holds real mode data and needs to be preserved across
425 * this function call.
428 leaq top_pgtable(%rbx), %rdi
429 call cleanup_trampoline
437 * Previously we've adjusted the GOT with address the binary was
438 * loaded at. Now we need to re-adjust for relocation address.
440 * Calculate the address the binary is loaded at, so that we can
441 * undo the previous GOT adjustment.
447 /* The new adjustment is the relocation address */
452 * Copy the compressed kernel to the end of our buffer
453 * where decompression in place becomes safe.
456 leaq (_bss-8)(%rip), %rsi
457 leaq (_bss-8)(%rbx), %rdi
458 movq $_bss /* - $startup_32 */, %rcx
466 * Jump to the relocated address.
468 leaq .Lrelocated(%rbx), %rax
471 #ifdef CONFIG_EFI_STUB
473 /* The entry point for the PE/COFF executable is efi_pe_entry. */
475 movq %rcx, efi64_config(%rip) /* Handle */
476 movq %rdx, efi64_config+8(%rip) /* EFI System table pointer */
478 leaq efi64_config(%rip), %rax
479 movq %rax, efi_config(%rip)
486 * Relocate efi_config->call().
488 addq %rbp, efi64_config+40(%rip)
491 call make_boot_params
495 leaq startup_32(%rip), %rax
496 movl %eax, BP_code32_start(%rsi)
497 jmp 2f /* Skip the relocation */
505 * Relocate efi_config->call().
507 movq efi_config(%rip), %rax
510 movq efi_config(%rip), %rdi
516 /* EFI init failed, so hang. */
520 movl BP_code32_start(%esi), %eax
521 leaq startup_64(%rax), %rax
523 ENDPROC(efi_pe_entry)
526 ENTRY(efi64_stub_entry)
527 movq %rdi, efi64_config(%rip) /* Handle */
528 movq %rsi, efi64_config+8(%rip) /* EFI System table pointer */
530 leaq efi64_config(%rip), %rax
531 movq %rax, efi_config(%rip)
535 ENDPROC(efi64_stub_entry)
539 SYM_FUNC_START_LOCAL_NOALIGN(.Lrelocated)
542 * Clear BSS (stack is currently empty)
545 leaq _bss(%rip), %rdi
546 leaq _ebss(%rip), %rcx
552 * Do the extraction, and jump to the new kernel..
554 pushq %rsi /* Save the real mode argument */
555 movq %rsi, %rdi /* real mode address */
556 leaq boot_heap(%rip), %rsi /* malloc area for uncompression */
557 leaq input_data(%rip), %rdx /* input_data */
558 movl $z_input_len, %ecx /* input_len */
559 movq %rbp, %r8 /* output target address */
560 movq $z_output_len, %r9 /* decompressed length, end of relocs */
561 call extract_kernel /* returns kernel location in %rax */
565 * Jump to the decompressed kernel.
568 SYM_FUNC_END(.Lrelocated)
571 * Adjust the global offset table
573 * RAX is the previous adjustment of the table to undo (use 0 if it's the
574 * first time we touch GOT).
575 * RDI is the new adjustment to apply.
578 /* Walk through the GOT adding the address to the entries */
579 leaq _got(%rip), %rdx
580 leaq _egot(%rip), %rcx
584 subq %rax, (%rdx) /* Undo previous adjustment */
585 addq %rdi, (%rdx) /* Apply the new adjustment */
593 * This is the 32-bit trampoline that will be copied over to low memory.
595 * Return address is at the top of the stack (might be above 4G).
596 * ECX contains the base address of the trampoline memory.
597 * Non zero RDX means trampoline needs to enable 5-level paging.
599 ENTRY(trampoline_32bit_src)
600 /* Set up data and stack segments */
601 movl $__KERNEL_DS, %eax
607 btrl $X86_CR0_PG_BIT, %eax
610 /* Check what paging mode we want to be in after the trampoline */
614 /* We want 5-level paging: don't touch CR3 if it already points to 5-level page tables */
616 testl $X86_CR4_LA57, %eax
620 /* We want 4-level paging: don't touch CR3 if it already points to 4-level page tables */
622 testl $X86_CR4_LA57, %eax
625 /* Point CR3 to the trampoline's new top level page table */
626 leal TRAMPOLINE_32BIT_PGTABLE_OFFSET(%ecx), %eax
629 /* Set EFER.LME=1 as a precaution in case hypervsior pulls the rug */
634 btsl $_EFER_LME, %eax
639 /* Enable PAE and LA57 (if required) paging modes */
640 movl $X86_CR4_PAE, %eax
643 orl $X86_CR4_LA57, %eax
647 /* Calculate address of paging_enabled() once we are executing in the trampoline */
648 leal .Lpaging_enabled - trampoline_32bit_src + TRAMPOLINE_32BIT_CODE_OFFSET(%ecx), %eax
650 /* Prepare the stack for far return to Long Mode */
654 /* Enable paging again */
655 movl $(X86_CR0_PG | X86_CR0_PE), %eax
661 SYM_FUNC_START_LOCAL_NOALIGN(.Lpaging_enabled)
662 /* Return from the trampoline */
664 SYM_FUNC_END(.Lpaging_enabled)
667 * The trampoline code has a size limit.
668 * Make sure we fail to compile if the trampoline code grows
669 * beyond TRAMPOLINE_32BIT_CODE_SIZE bytes.
671 .org trampoline_32bit_src + TRAMPOLINE_32BIT_CODE_SIZE
674 SYM_FUNC_START_LOCAL_NOALIGN(.Lno_longmode)
675 /* This isn't an x86-64 CPU, so hang intentionally, we cannot continue */
679 SYM_FUNC_END(.Lno_longmode)
681 #include "../../kernel/verify_cpu.S"
692 .quad 0x00cf9a000000ffff /* __KERNEL32_CS */
693 .quad 0x00af9a000000ffff /* __KERNEL_CS */
694 .quad 0x00cf92000000ffff /* __KERNEL_DS */
695 .quad 0x0080890000000000 /* TS descriptor */
696 .quad 0x0000000000000000 /* TS continued */
699 #ifdef CONFIG_EFI_STUB
703 #ifdef CONFIG_EFI_MIXED
716 #endif /* CONFIG_EFI_STUB */
719 * Stack and heap for uncompression
724 .fill BOOT_HEAP_SIZE, 1, 0
726 .fill BOOT_STACK_SIZE, 1, 0
730 * Space for page tables (not in .bss so not zeroed)
732 .section ".pgtable","a",@nobits
735 .fill BOOT_PGT_SIZE, 1, 0
738 * The page table is going to be used instead of page table in the trampoline
742 .fill PAGE_SIZE, 1, 0