1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020 Intel Corporation
4 * Author: Johannes Berg <johannes@sipsolutions.net>
6 #include <linux/module.h>
8 #include <linux/virtio.h>
9 #include <linux/virtio_config.h>
10 #include <linux/logic_iomem.h>
11 #include <linux/of_platform.h>
12 #include <linux/irqdomain.h>
13 #include <linux/virtio_pcidev.h>
14 #include <linux/virtio-uml.h>
15 #include <linux/delay.h>
16 #include <linux/msi.h>
17 #include <asm/unaligned.h>
21 #define MAX_MSI_VECTORS 32
22 #define CFG_SPACE_SIZE 4096
24 /* for MSI-X we have a 32-bit payload */
25 #define MAX_IRQ_MSG_SIZE (sizeof(struct virtio_pcidev_msg) + sizeof(u32))
26 #define NUM_IRQ_MSGS 10
28 #define HANDLE_NO_FREE(ptr) ((void *)((unsigned long)(ptr) | 1))
29 #define HANDLE_IS_NO_FREE(ptr) ((unsigned long)(ptr) & 1)
31 struct um_pci_device {
32 struct virtio_device *vdev;
34 /* for now just standard BARs */
35 u8 resptr[PCI_STD_NUM_BARS];
37 struct virtqueue *cmd_vq, *irq_vq;
39 #define UM_PCI_STAT_WAITING 0
47 struct um_pci_device_reg {
48 struct um_pci_device *dev;
52 static struct pci_host_bridge *bridge;
53 static DEFINE_MUTEX(um_pci_mtx);
54 static struct um_pci_device *um_pci_platform_device;
55 static struct um_pci_device_reg um_pci_devices[MAX_DEVICES];
56 static struct fwnode_handle *um_pci_fwnode;
57 static struct irq_domain *um_pci_inner_domain;
58 static struct irq_domain *um_pci_msi_domain;
59 static unsigned long um_pci_msi_used[BITS_TO_LONGS(MAX_MSI_VECTORS)];
61 static unsigned int um_pci_max_delay_us = 40000;
62 module_param_named(max_delay_us, um_pci_max_delay_us, uint, 0644);
64 struct um_pci_message_buffer {
65 struct virtio_pcidev_msg hdr;
69 static struct um_pci_message_buffer __percpu *um_pci_msg_bufs;
71 static int um_pci_send_cmd(struct um_pci_device *dev,
72 struct virtio_pcidev_msg *cmd,
73 unsigned int cmd_size,
74 const void *extra, unsigned int extra_size,
75 void *out, unsigned int out_size)
77 struct scatterlist out_sg, extra_sg, in_sg;
78 struct scatterlist *sgs_list[] = {
80 [1] = extra ? &extra_sg : &in_sg,
81 [2] = extra ? &in_sg : NULL,
83 struct um_pci_message_buffer *buf;
88 if (WARN_ON(cmd_size < sizeof(*cmd) || cmd_size > sizeof(*buf)))
92 case VIRTIO_PCIDEV_OP_CFG_WRITE:
93 case VIRTIO_PCIDEV_OP_MMIO_WRITE:
94 case VIRTIO_PCIDEV_OP_MMIO_MEMSET:
95 /* in PCI, writes are posted, so don't wait */
104 buf = get_cpu_var(um_pci_msg_bufs);
106 memcpy(buf, cmd, cmd_size);
109 u8 *ncmd = kmalloc(cmd_size + extra_size, GFP_ATOMIC);
112 memcpy(ncmd, cmd, cmd_size);
114 memcpy(ncmd + cmd_size, extra, extra_size);
116 cmd_size += extra_size;
120 /* try without allocating memory */
128 sg_init_one(&out_sg, cmd, cmd_size);
130 sg_init_one(&extra_sg, extra, extra_size);
132 sg_init_one(&in_sg, out, out_size);
134 /* add to internal virtio queue */
135 ret = virtqueue_add_sgs(dev->cmd_vq, sgs_list,
138 posted ? cmd : HANDLE_NO_FREE(cmd),
147 virtqueue_kick(dev->cmd_vq);
152 /* kick and poll for getting a response on the queue */
153 set_bit(UM_PCI_STAT_WAITING, &dev->status);
154 virtqueue_kick(dev->cmd_vq);
157 void *completed = virtqueue_get_buf(dev->cmd_vq, &len);
159 if (completed == HANDLE_NO_FREE(cmd))
162 if (completed && !HANDLE_IS_NO_FREE(completed))
165 if (WARN_ONCE(virtqueue_is_broken(dev->cmd_vq) ||
166 ++delay_count > um_pci_max_delay_us,
167 "um virt-pci delay: %d", delay_count)) {
173 clear_bit(UM_PCI_STAT_WAITING, &dev->status);
176 put_cpu_var(um_pci_msg_bufs);
180 static unsigned long um_pci_cfgspace_read(void *priv, unsigned int offset,
183 struct um_pci_device_reg *reg = priv;
184 struct um_pci_device *dev = reg->dev;
185 struct virtio_pcidev_msg hdr = {
186 .op = VIRTIO_PCIDEV_OP_CFG_READ,
190 /* buf->data is maximum size - we may only use parts of it */
191 struct um_pci_message_buffer *buf;
193 unsigned long ret = ULONG_MAX;
194 size_t bytes = sizeof(buf->data);
199 buf = get_cpu_var(um_pci_msg_bufs);
203 memset(data, 0xff, bytes);
214 WARN(1, "invalid config space read size %d\n", size);
218 if (um_pci_send_cmd(dev, &hdr, sizeof(hdr), NULL, 0, data, bytes))
226 ret = le16_to_cpup((void *)data);
229 ret = le32_to_cpup((void *)data);
233 ret = le64_to_cpup((void *)data);
241 put_cpu_var(um_pci_msg_bufs);
245 static void um_pci_cfgspace_write(void *priv, unsigned int offset, int size,
248 struct um_pci_device_reg *reg = priv;
249 struct um_pci_device *dev = reg->dev;
251 struct virtio_pcidev_msg hdr;
252 /* maximum size - we may only use parts of it */
256 .op = VIRTIO_PCIDEV_OP_CFG_WRITE,
267 msg.data[0] = (u8)val;
270 put_unaligned_le16(val, (void *)msg.data);
273 put_unaligned_le32(val, (void *)msg.data);
277 put_unaligned_le64(val, (void *)msg.data);
281 WARN(1, "invalid config space write size %d\n", size);
285 WARN_ON(um_pci_send_cmd(dev, &msg.hdr, sizeof(msg), NULL, 0, NULL, 0));
288 static const struct logic_iomem_ops um_pci_device_cfgspace_ops = {
289 .read = um_pci_cfgspace_read,
290 .write = um_pci_cfgspace_write,
293 static void um_pci_bar_copy_from(void *priv, void *buffer,
294 unsigned int offset, int size)
297 struct um_pci_device *dev = container_of(resptr - *resptr,
298 struct um_pci_device,
300 struct virtio_pcidev_msg hdr = {
301 .op = VIRTIO_PCIDEV_OP_MMIO_READ,
307 memset(buffer, 0xff, size);
309 um_pci_send_cmd(dev, &hdr, sizeof(hdr), NULL, 0, buffer, size);
312 static unsigned long um_pci_bar_read(void *priv, unsigned int offset,
315 /* buf->data is maximum size - we may only use parts of it */
316 struct um_pci_message_buffer *buf;
318 unsigned long ret = ULONG_MAX;
320 buf = get_cpu_var(um_pci_msg_bufs);
332 WARN(1, "invalid config space read size %d\n", size);
336 um_pci_bar_copy_from(priv, data, offset, size);
343 ret = le16_to_cpup((void *)data);
346 ret = le32_to_cpup((void *)data);
350 ret = le64_to_cpup((void *)data);
358 put_cpu_var(um_pci_msg_bufs);
362 static void um_pci_bar_copy_to(void *priv, unsigned int offset,
363 const void *buffer, int size)
366 struct um_pci_device *dev = container_of(resptr - *resptr,
367 struct um_pci_device,
369 struct virtio_pcidev_msg hdr = {
370 .op = VIRTIO_PCIDEV_OP_MMIO_WRITE,
376 um_pci_send_cmd(dev, &hdr, sizeof(hdr), buffer, size, NULL, 0);
379 static void um_pci_bar_write(void *priv, unsigned int offset, int size,
382 /* maximum size - we may only use parts of it */
390 put_unaligned_le16(val, (void *)data);
393 put_unaligned_le32(val, (void *)data);
397 put_unaligned_le64(val, (void *)data);
401 WARN(1, "invalid config space write size %d\n", size);
405 um_pci_bar_copy_to(priv, offset, data, size);
408 static void um_pci_bar_set(void *priv, unsigned int offset, u8 value, int size)
411 struct um_pci_device *dev = container_of(resptr - *resptr,
412 struct um_pci_device,
415 struct virtio_pcidev_msg hdr;
419 .op = VIRTIO_PCIDEV_OP_CFG_WRITE,
427 um_pci_send_cmd(dev, &msg.hdr, sizeof(msg), NULL, 0, NULL, 0);
430 static const struct logic_iomem_ops um_pci_device_bar_ops = {
431 .read = um_pci_bar_read,
432 .write = um_pci_bar_write,
433 .set = um_pci_bar_set,
434 .copy_from = um_pci_bar_copy_from,
435 .copy_to = um_pci_bar_copy_to,
438 static void __iomem *um_pci_map_bus(struct pci_bus *bus, unsigned int devfn,
441 struct um_pci_device_reg *dev;
442 unsigned int busn = bus->number;
447 /* not allowing functions for now ... */
451 if (devfn / 8 >= ARRAY_SIZE(um_pci_devices))
454 dev = &um_pci_devices[devfn / 8];
458 return (void __iomem *)((unsigned long)dev->iomem + where);
461 static struct pci_ops um_pci_ops = {
462 .map_bus = um_pci_map_bus,
463 .read = pci_generic_config_read,
464 .write = pci_generic_config_write,
467 static void um_pci_rescan(void)
469 pci_lock_rescan_remove();
470 pci_rescan_bus(bridge->bus);
471 pci_unlock_rescan_remove();
474 static void um_pci_irq_vq_addbuf(struct virtqueue *vq, void *buf, bool kick)
476 struct scatterlist sg[1];
478 sg_init_one(sg, buf, MAX_IRQ_MSG_SIZE);
479 if (virtqueue_add_inbuf(vq, sg, 1, buf, GFP_ATOMIC))
485 static void um_pci_handle_irq_message(struct virtqueue *vq,
486 struct virtio_pcidev_msg *msg)
488 struct virtio_device *vdev = vq->vdev;
489 struct um_pci_device *dev = vdev->priv;
494 /* we should properly chain interrupts, but on ARCH=um we don't care */
497 case VIRTIO_PCIDEV_OP_INT:
498 generic_handle_irq(dev->irq);
500 case VIRTIO_PCIDEV_OP_MSI:
501 /* our MSI message is just the interrupt number */
502 if (msg->size == sizeof(u32))
503 generic_handle_irq(le32_to_cpup((void *)msg->data));
505 generic_handle_irq(le16_to_cpup((void *)msg->data));
507 case VIRTIO_PCIDEV_OP_PME:
508 /* nothing to do - we already woke up due to the message */
511 dev_err(&vdev->dev, "unexpected virt-pci message %d\n", msg->op);
516 static void um_pci_cmd_vq_cb(struct virtqueue *vq)
518 struct virtio_device *vdev = vq->vdev;
519 struct um_pci_device *dev = vdev->priv;
523 if (test_bit(UM_PCI_STAT_WAITING, &dev->status))
526 while ((cmd = virtqueue_get_buf(vq, &len))) {
527 if (WARN_ON(HANDLE_IS_NO_FREE(cmd)))
533 static void um_pci_irq_vq_cb(struct virtqueue *vq)
535 struct virtio_pcidev_msg *msg;
538 while ((msg = virtqueue_get_buf(vq, &len))) {
539 if (len >= sizeof(*msg))
540 um_pci_handle_irq_message(vq, msg);
542 /* recycle the message buffer */
543 um_pci_irq_vq_addbuf(vq, msg, true);
548 /* Copied from arch/x86/kernel/devicetree.c */
549 struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus)
551 struct device_node *np;
553 for_each_node_by_type(np, "pci") {
555 unsigned int bus_min;
557 prop = of_get_property(np, "bus-range", NULL);
560 bus_min = be32_to_cpup(prop);
561 if (bus->number == bus_min)
568 static int um_pci_init_vqs(struct um_pci_device *dev)
570 struct virtqueue *vqs[2];
571 static const char *const names[2] = { "cmd", "irq" };
572 vq_callback_t *cbs[2] = { um_pci_cmd_vq_cb, um_pci_irq_vq_cb };
575 err = virtio_find_vqs(dev->vdev, 2, vqs, cbs, names, NULL);
579 dev->cmd_vq = vqs[0];
580 dev->irq_vq = vqs[1];
582 virtio_device_ready(dev->vdev);
584 for (i = 0; i < NUM_IRQ_MSGS; i++) {
585 void *msg = kzalloc(MAX_IRQ_MSG_SIZE, GFP_KERNEL);
588 um_pci_irq_vq_addbuf(dev->irq_vq, msg, false);
591 virtqueue_kick(dev->irq_vq);
596 static void __um_pci_virtio_platform_remove(struct virtio_device *vdev,
597 struct um_pci_device *dev)
599 virtio_reset_device(vdev);
600 vdev->config->del_vqs(vdev);
602 mutex_lock(&um_pci_mtx);
603 um_pci_platform_device = NULL;
604 mutex_unlock(&um_pci_mtx);
609 static int um_pci_virtio_platform_probe(struct virtio_device *vdev,
610 struct um_pci_device *dev)
614 dev->platform = true;
616 mutex_lock(&um_pci_mtx);
618 if (um_pci_platform_device) {
619 mutex_unlock(&um_pci_mtx);
624 ret = um_pci_init_vqs(dev);
626 mutex_unlock(&um_pci_mtx);
630 um_pci_platform_device = dev;
632 mutex_unlock(&um_pci_mtx);
634 ret = of_platform_default_populate(vdev->dev.of_node, NULL, &vdev->dev);
636 __um_pci_virtio_platform_remove(vdev, dev);
645 static int um_pci_virtio_probe(struct virtio_device *vdev)
647 struct um_pci_device *dev;
651 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
658 if (of_device_is_compatible(vdev->dev.of_node, "simple-bus"))
659 return um_pci_virtio_platform_probe(vdev, dev);
661 mutex_lock(&um_pci_mtx);
662 for (i = 0; i < MAX_DEVICES; i++) {
663 if (um_pci_devices[i].dev)
672 err = um_pci_init_vqs(dev);
676 dev->irq = irq_alloc_desc(numa_node_id());
681 um_pci_devices[free].dev = dev;
684 mutex_unlock(&um_pci_mtx);
686 device_set_wakeup_enable(&vdev->dev, true);
689 * In order to do suspend-resume properly, don't allow VQs
692 virtio_uml_set_no_vq_suspend(vdev, true);
697 virtio_reset_device(vdev);
698 vdev->config->del_vqs(vdev);
700 mutex_unlock(&um_pci_mtx);
705 static void um_pci_virtio_remove(struct virtio_device *vdev)
707 struct um_pci_device *dev = vdev->priv;
711 of_platform_depopulate(&vdev->dev);
712 __um_pci_virtio_platform_remove(vdev, dev);
716 device_set_wakeup_enable(&vdev->dev, false);
718 mutex_lock(&um_pci_mtx);
719 for (i = 0; i < MAX_DEVICES; i++) {
720 if (um_pci_devices[i].dev != dev)
723 um_pci_devices[i].dev = NULL;
724 irq_free_desc(dev->irq);
728 mutex_unlock(&um_pci_mtx);
730 if (i < MAX_DEVICES) {
731 struct pci_dev *pci_dev;
733 pci_dev = pci_get_slot(bridge->bus, i);
735 pci_stop_and_remove_bus_device_locked(pci_dev);
738 /* Stop all virtqueues */
739 virtio_reset_device(vdev);
742 vdev->config->del_vqs(vdev);
747 static struct virtio_device_id id_table[] = {
748 { CONFIG_UML_PCI_OVER_VIRTIO_DEVICE_ID, VIRTIO_DEV_ANY_ID },
751 MODULE_DEVICE_TABLE(virtio, id_table);
753 static struct virtio_driver um_pci_virtio_driver = {
754 .driver.name = "virtio-pci",
755 .driver.owner = THIS_MODULE,
756 .id_table = id_table,
757 .probe = um_pci_virtio_probe,
758 .remove = um_pci_virtio_remove,
761 static struct resource virt_cfgspace_resource = {
762 .name = "PCI config space",
763 .start = 0xf0000000 - MAX_DEVICES * CFG_SPACE_SIZE,
764 .end = 0xf0000000 - 1,
765 .flags = IORESOURCE_MEM,
768 static long um_pci_map_cfgspace(unsigned long offset, size_t size,
769 const struct logic_iomem_ops **ops,
772 if (WARN_ON(size > CFG_SPACE_SIZE || offset % CFG_SPACE_SIZE))
775 if (offset / CFG_SPACE_SIZE < MAX_DEVICES) {
776 *ops = &um_pci_device_cfgspace_ops;
777 *priv = &um_pci_devices[offset / CFG_SPACE_SIZE];
781 WARN(1, "cannot map offset 0x%lx/0x%zx\n", offset, size);
785 static const struct logic_iomem_region_ops um_pci_cfgspace_ops = {
786 .map = um_pci_map_cfgspace,
789 static struct resource virt_iomem_resource = {
793 .flags = IORESOURCE_MEM,
796 struct um_pci_map_iomem_data {
797 unsigned long offset;
799 const struct logic_iomem_ops **ops;
804 static int um_pci_map_iomem_walk(struct pci_dev *pdev, void *_data)
806 struct um_pci_map_iomem_data *data = _data;
807 struct um_pci_device_reg *reg = &um_pci_devices[pdev->devfn / 8];
808 struct um_pci_device *dev;
814 for (i = 0; i < ARRAY_SIZE(dev->resptr); i++) {
815 struct resource *r = &pdev->resource[i];
817 if ((r->flags & IORESOURCE_TYPE_BITS) != IORESOURCE_MEM)
821 * must be the whole or part of the resource,
822 * not allowed to only overlap
824 if (data->offset < r->start || data->offset > r->end)
826 if (data->offset + data->size - 1 > r->end)
830 *data->ops = &um_pci_device_bar_ops;
832 *data->priv = &dev->resptr[i];
833 data->ret = data->offset - r->start;
835 /* no need to continue */
842 static long um_pci_map_iomem(unsigned long offset, size_t size,
843 const struct logic_iomem_ops **ops,
846 struct um_pci_map_iomem_data data = {
847 /* we want the full address here */
848 .offset = offset + virt_iomem_resource.start,
855 pci_walk_bus(bridge->bus, um_pci_map_iomem_walk, &data);
859 static const struct logic_iomem_region_ops um_pci_iomem_ops = {
860 .map = um_pci_map_iomem,
863 static void um_pci_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
866 * This is a very low address and not actually valid 'physical' memory
867 * in UML, so we can simply map MSI(-X) vectors to there, it cannot be
868 * legitimately written to by the device in any other way.
869 * We use the (virtual) IRQ number here as the message to simplify the
870 * code that receives the message, where for now we simply trust the
871 * device to send the correct message.
874 msg->address_lo = 0xa0000;
875 msg->data = data->irq;
878 static struct irq_chip um_pci_msi_bottom_irq_chip = {
879 .name = "UM virtio MSI",
880 .irq_compose_msi_msg = um_pci_compose_msi_msg,
883 static int um_pci_inner_domain_alloc(struct irq_domain *domain,
884 unsigned int virq, unsigned int nr_irqs,
889 WARN_ON(nr_irqs != 1);
891 mutex_lock(&um_pci_mtx);
892 bit = find_first_zero_bit(um_pci_msi_used, MAX_MSI_VECTORS);
893 if (bit >= MAX_MSI_VECTORS) {
894 mutex_unlock(&um_pci_mtx);
898 set_bit(bit, um_pci_msi_used);
899 mutex_unlock(&um_pci_mtx);
901 irq_domain_set_info(domain, virq, bit, &um_pci_msi_bottom_irq_chip,
902 domain->host_data, handle_simple_irq,
908 static void um_pci_inner_domain_free(struct irq_domain *domain,
909 unsigned int virq, unsigned int nr_irqs)
911 struct irq_data *d = irq_domain_get_irq_data(domain, virq);
913 mutex_lock(&um_pci_mtx);
915 if (!test_bit(d->hwirq, um_pci_msi_used))
916 pr_err("trying to free unused MSI#%lu\n", d->hwirq);
918 __clear_bit(d->hwirq, um_pci_msi_used);
920 mutex_unlock(&um_pci_mtx);
923 static const struct irq_domain_ops um_pci_inner_domain_ops = {
924 .alloc = um_pci_inner_domain_alloc,
925 .free = um_pci_inner_domain_free,
928 static struct irq_chip um_pci_msi_irq_chip = {
929 .name = "UM virtio PCIe MSI",
930 .irq_mask = pci_msi_mask_irq,
931 .irq_unmask = pci_msi_unmask_irq,
934 static struct msi_domain_info um_pci_msi_domain_info = {
935 .flags = MSI_FLAG_USE_DEF_DOM_OPS |
936 MSI_FLAG_USE_DEF_CHIP_OPS |
938 .chip = &um_pci_msi_irq_chip,
941 static struct resource busn_resource = {
945 .flags = IORESOURCE_BUS,
948 static int um_pci_map_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
950 struct um_pci_device_reg *reg = &um_pci_devices[pdev->devfn / 8];
952 if (WARN_ON(!reg->dev))
955 /* Yes, we map all pins to the same IRQ ... doesn't matter for now. */
956 return reg->dev->irq;
959 void *pci_root_bus_fwnode(struct pci_bus *bus)
961 return um_pci_fwnode;
964 static long um_pci_map_platform(unsigned long offset, size_t size,
965 const struct logic_iomem_ops **ops,
968 if (!um_pci_platform_device)
971 *ops = &um_pci_device_bar_ops;
972 *priv = &um_pci_platform_device->resptr[0];
977 static const struct logic_iomem_region_ops um_pci_platform_ops = {
978 .map = um_pci_map_platform,
981 static struct resource virt_platform_resource = {
985 .flags = IORESOURCE_MEM,
988 static int __init um_pci_init(void)
992 WARN_ON(logic_iomem_add_region(&virt_cfgspace_resource,
993 &um_pci_cfgspace_ops));
994 WARN_ON(logic_iomem_add_region(&virt_iomem_resource,
996 WARN_ON(logic_iomem_add_region(&virt_platform_resource,
997 &um_pci_platform_ops));
999 if (WARN(CONFIG_UML_PCI_OVER_VIRTIO_DEVICE_ID < 0,
1000 "No virtio device ID configured for PCI - no PCI support\n"))
1003 um_pci_msg_bufs = alloc_percpu(struct um_pci_message_buffer);
1004 if (!um_pci_msg_bufs)
1007 bridge = pci_alloc_host_bridge(0);
1013 um_pci_fwnode = irq_domain_alloc_named_fwnode("um-pci");
1014 if (!um_pci_fwnode) {
1019 um_pci_inner_domain = __irq_domain_add(um_pci_fwnode, MAX_MSI_VECTORS,
1021 &um_pci_inner_domain_ops, NULL);
1022 if (!um_pci_inner_domain) {
1027 um_pci_msi_domain = pci_msi_create_irq_domain(um_pci_fwnode,
1028 &um_pci_msi_domain_info,
1029 um_pci_inner_domain);
1030 if (!um_pci_msi_domain) {
1035 pci_add_resource(&bridge->windows, &virt_iomem_resource);
1036 pci_add_resource(&bridge->windows, &busn_resource);
1037 bridge->ops = &um_pci_ops;
1038 bridge->map_irq = um_pci_map_irq;
1040 for (i = 0; i < MAX_DEVICES; i++) {
1041 resource_size_t start;
1043 start = virt_cfgspace_resource.start + i * CFG_SPACE_SIZE;
1044 um_pci_devices[i].iomem = ioremap(start, CFG_SPACE_SIZE);
1045 if (WARN(!um_pci_devices[i].iomem, "failed to map %d\n", i)) {
1051 err = pci_host_probe(bridge);
1055 err = register_virtio_driver(&um_pci_virtio_driver);
1060 if (um_pci_inner_domain)
1061 irq_domain_remove(um_pci_inner_domain);
1063 irq_domain_free_fwnode(um_pci_fwnode);
1065 pci_free_resource_list(&bridge->windows);
1066 pci_free_host_bridge(bridge);
1068 free_percpu(um_pci_msg_bufs);
1071 module_init(um_pci_init);
1073 static void __exit um_pci_exit(void)
1075 unregister_virtio_driver(&um_pci_virtio_driver);
1076 irq_domain_remove(um_pci_msi_domain);
1077 irq_domain_remove(um_pci_inner_domain);
1078 pci_free_resource_list(&bridge->windows);
1079 pci_free_host_bridge(bridge);
1080 free_percpu(um_pci_msg_bufs);
1082 module_exit(um_pci_exit);