1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * Copyright 2010 Tilera Corporation. All Rights Reserved.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation, version 2.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12 * NON INFRINGEMENT. See the GNU General Public License for
19 * Some low-level simulator definitions.
22 #ifndef __ARCH_SIM_DEF_H__
23 #define __ARCH_SIM_DEF_H__
27 * Internal: the low bits of the SIM_CONTROL_* SPR values specify
28 * the operation to perform, and the remaining bits are
29 * an operation-specific parameter (often unused).
31 #define _SIM_CONTROL_OPERATOR_BITS 8
35 * Values which can be written to SPR_SIM_CONTROL.
38 /** If written to SPR_SIM_CONTROL, stops profiling. */
39 #define SIM_CONTROL_PROFILER_DISABLE 0
41 /** If written to SPR_SIM_CONTROL, starts profiling. */
42 #define SIM_CONTROL_PROFILER_ENABLE 1
44 /** If written to SPR_SIM_CONTROL, clears profiling counters. */
45 #define SIM_CONTROL_PROFILER_CLEAR 2
47 /** If written to SPR_SIM_CONTROL, checkpoints the simulator. */
48 #define SIM_CONTROL_CHECKPOINT 3
51 * If written to SPR_SIM_CONTROL, combined with a mask (shifted by 8),
52 * sets the tracing mask to the given mask. See "sim_set_tracing()".
54 #define SIM_CONTROL_SET_TRACING 4
57 * If written to SPR_SIM_CONTROL, combined with a mask (shifted by 8),
58 * dumps the requested items of machine state to the log.
60 #define SIM_CONTROL_DUMP 5
62 /** If written to SPR_SIM_CONTROL, clears chip-level profiling counters. */
63 #define SIM_CONTROL_PROFILER_CHIP_CLEAR 6
65 /** If written to SPR_SIM_CONTROL, disables chip-level profiling. */
66 #define SIM_CONTROL_PROFILER_CHIP_DISABLE 7
68 /** If written to SPR_SIM_CONTROL, enables chip-level profiling. */
69 #define SIM_CONTROL_PROFILER_CHIP_ENABLE 8
71 /** If written to SPR_SIM_CONTROL, enables chip-level functional mode */
72 #define SIM_CONTROL_ENABLE_FUNCTIONAL 9
74 /** If written to SPR_SIM_CONTROL, disables chip-level functional mode. */
75 #define SIM_CONTROL_DISABLE_FUNCTIONAL 10
78 * If written to SPR_SIM_CONTROL, enables chip-level functional mode.
79 * All tiles must perform this write for functional mode to be enabled.
80 * Ignored in naked boot mode unless --functional is specified.
81 * WARNING: Only the hypervisor startup code should use this!
83 #define SIM_CONTROL_ENABLE_FUNCTIONAL_BARRIER 11
86 * If written to SPR_SIM_CONTROL, combined with a character (shifted by 8),
87 * writes a string directly to the simulator output. Written to once for
88 * each character in the string, plus a final NUL. Instead of NUL,
89 * you can also use "SIM_PUTC_FLUSH_STRING" or "SIM_PUTC_FLUSH_BINARY".
91 /* ISSUE: Document the meaning of "newline", and the handling of NUL. */
92 #define SIM_CONTROL_PUTC 12
95 * If written to SPR_SIM_CONTROL, clears the --grind-coherence state for
96 * this core. This is intended to be used before a loop that will
97 * invalidate the cache by loading new data and evicting all current data.
98 * Generally speaking, this API should only be used by system code.
100 #define SIM_CONTROL_GRINDER_CLEAR 13
102 /** If written to SPR_SIM_CONTROL, shuts down the simulator. */
103 #define SIM_CONTROL_SHUTDOWN 14
106 * If written to SPR_SIM_CONTROL, combined with a pid (shifted by 8),
107 * indicates that a fork syscall just created the given process.
109 #define SIM_CONTROL_OS_FORK 15
112 * If written to SPR_SIM_CONTROL, combined with a pid (shifted by 8),
113 * indicates that an exit syscall was just executed by the given process.
115 #define SIM_CONTROL_OS_EXIT 16
118 * If written to SPR_SIM_CONTROL, combined with a pid (shifted by 8),
119 * indicates that the OS just switched to the given process.
121 #define SIM_CONTROL_OS_SWITCH 17
124 * If written to SPR_SIM_CONTROL, combined with a character (shifted by 8),
125 * indicates that an exec syscall was just executed. Written to once for
126 * each character in the executable name, plus a final NUL.
128 #define SIM_CONTROL_OS_EXEC 18
131 * If written to SPR_SIM_CONTROL, combined with a character (shifted by 8),
132 * indicates that an interpreter (PT_INTERP) was loaded. Written to once
133 * for each character in "ADDR:PATH", plus a final NUL, where "ADDR" is a
134 * hex load address starting with "0x", and "PATH" is the executable name.
136 #define SIM_CONTROL_OS_INTERP 19
139 * If written to SPR_SIM_CONTROL, combined with a character (shifted by 8),
140 * indicates that a dll was loaded. Written to once for each character
141 * in "ADDR:PATH", plus a final NUL, where "ADDR" is a hexadecimal load
142 * address starting with "0x", and "PATH" is the executable name.
144 #define SIM_CONTROL_DLOPEN 20
147 * If written to SPR_SIM_CONTROL, combined with a character (shifted by 8),
148 * indicates that a dll was unloaded. Written to once for each character
149 * in "ADDR", plus a final NUL, where "ADDR" is a hexadecimal load
150 * address starting with "0x".
152 #define SIM_CONTROL_DLCLOSE 21
155 * If written to SPR_SIM_CONTROL, combined with a flag (shifted by 8),
156 * indicates whether to allow data reads to remotely-cached
157 * dirty cache lines to be cached locally without grinder warnings or
158 * assertions (used by Linux kernel fast memcpy).
160 #define SIM_CONTROL_ALLOW_MULTIPLE_CACHING 22
162 /** If written to SPR_SIM_CONTROL, enables memory tracing. */
163 #define SIM_CONTROL_ENABLE_MEM_LOGGING 23
165 /** If written to SPR_SIM_CONTROL, disables memory tracing. */
166 #define SIM_CONTROL_DISABLE_MEM_LOGGING 24
169 * If written to SPR_SIM_CONTROL, changes the shaping parameters of one of
170 * the gbe or xgbe shims. Must specify the shim id, the type, the units, and
171 * the rate, as defined in SIM_SHAPING_SPR_ARG.
173 #define SIM_CONTROL_SHAPING 25
176 * If written to SPR_SIM_CONTROL, combined with character (shifted by 8),
177 * requests that a simulator command be executed. Written to once for each
178 * character in the command, plus a final NUL.
180 #define SIM_CONTROL_COMMAND 26
183 * If written to SPR_SIM_CONTROL, indicates that the simulated system
184 * is panicking, to allow debugging via --debug-on-panic.
186 #define SIM_CONTROL_PANIC 27
189 * If written to SPR_SIM_CONTROL, triggers a simulator syscall.
190 * See "sim_syscall()" for more info.
192 #define SIM_CONTROL_SYSCALL 32
195 * If written to SPR_SIM_CONTROL, combined with a pid (shifted by 8),
196 * provides the pid that subsequent SIM_CONTROL_OS_FORK writes should
197 * use as the pid, rather than the default previous SIM_CONTROL_OS_SWITCH.
199 #define SIM_CONTROL_OS_FORK_PARENT 33
202 * If written to SPR_SIM_CONTROL, combined with a mPIPE shim number
203 * (shifted by 8), clears the pending magic data section. The cleared
204 * pending magic data section and any subsequently appended magic bytes
205 * will only take effect when the classifier blast programmer is run.
207 #define SIM_CONTROL_CLEAR_MPIPE_MAGIC_BYTES 34
210 * If written to SPR_SIM_CONTROL, combined with a mPIPE shim number
211 * (shifted by 8) and a byte of data (shifted by 16), appends that byte
212 * to the shim's pending magic data section. The pending magic data
213 * section takes effect when the classifier blast programmer is run.
215 #define SIM_CONTROL_APPEND_MPIPE_MAGIC_BYTE 35
218 * If written to SPR_SIM_CONTROL, combined with a mPIPE shim number
219 * (shifted by 8), an enable=1/disable=0 bit (shifted by 16), and a
220 * mask of links (shifted by 32), enable or disable the corresponding
223 #define SIM_CONTROL_ENABLE_MPIPE_LINK_MAGIC_BYTE 36
227 * Syscall numbers for use with "sim_syscall()".
230 /** Syscall number for sim_add_watchpoint(). */
231 #define SIM_SYSCALL_ADD_WATCHPOINT 2
233 /** Syscall number for sim_remove_watchpoint(). */
234 #define SIM_SYSCALL_REMOVE_WATCHPOINT 3
236 /** Syscall number for sim_query_watchpoint(). */
237 #define SIM_SYSCALL_QUERY_WATCHPOINT 4
240 * Syscall number that asserts that the cache lines whose 64-bit PA
241 * is passed as the second argument to sim_syscall(), and over a
242 * range passed as the third argument, are no longer in cache.
243 * The simulator raises an error if this is not the case.
245 #define SIM_SYSCALL_VALIDATE_LINES_EVICTED 5
247 /** Syscall number for sim_query_cpu_speed(). */
248 #define SIM_SYSCALL_QUERY_CPU_SPEED 6
252 * Bit masks which can be shifted by 8, combined with
253 * SIM_CONTROL_SET_TRACING, and written to SPR_SIM_CONTROL.
257 * @addtogroup arch_sim
261 /** Enable --trace-cycle when passed to simulator_set_tracing(). */
262 #define SIM_TRACE_CYCLES 0x01
264 /** Enable --trace-router when passed to simulator_set_tracing(). */
265 #define SIM_TRACE_ROUTER 0x02
267 /** Enable --trace-register-writes when passed to simulator_set_tracing(). */
268 #define SIM_TRACE_REGISTER_WRITES 0x04
270 /** Enable --trace-disasm when passed to simulator_set_tracing(). */
271 #define SIM_TRACE_DISASM 0x08
273 /** Enable --trace-stall-info when passed to simulator_set_tracing(). */
274 #define SIM_TRACE_STALL_INFO 0x10
276 /** Enable --trace-memory-controller when passed to simulator_set_tracing(). */
277 #define SIM_TRACE_MEMORY_CONTROLLER 0x20
279 /** Enable --trace-l2 when passed to simulator_set_tracing(). */
280 #define SIM_TRACE_L2_CACHE 0x40
282 /** Enable --trace-lines when passed to simulator_set_tracing(). */
283 #define SIM_TRACE_LINES 0x80
285 /** Turn off all tracing when passed to simulator_set_tracing(). */
286 #define SIM_TRACE_NONE 0
288 /** Turn on all tracing when passed to simulator_set_tracing(). */
289 #define SIM_TRACE_ALL (-1)
293 /** Computes the value to write to SPR_SIM_CONTROL to set tracing flags. */
294 #define SIM_TRACE_SPR_ARG(mask) \
295 (SIM_CONTROL_SET_TRACING | ((mask) << _SIM_CONTROL_OPERATOR_BITS))
299 * Bit masks which can be shifted by 8, combined with
300 * SIM_CONTROL_DUMP, and written to SPR_SIM_CONTROL.
304 * @addtogroup arch_sim
308 /** Dump the general-purpose registers. */
309 #define SIM_DUMP_REGS 0x001
311 /** Dump the SPRs. */
312 #define SIM_DUMP_SPRS 0x002
314 /** Dump the ITLB. */
315 #define SIM_DUMP_ITLB 0x004
317 /** Dump the DTLB. */
318 #define SIM_DUMP_DTLB 0x008
320 /** Dump the L1 I-cache. */
321 #define SIM_DUMP_L1I 0x010
323 /** Dump the L1 D-cache. */
324 #define SIM_DUMP_L1D 0x020
326 /** Dump the L2 cache. */
327 #define SIM_DUMP_L2 0x040
329 /** Dump the switch registers. */
330 #define SIM_DUMP_SNREGS 0x080
332 /** Dump the switch ITLB. */
333 #define SIM_DUMP_SNITLB 0x100
335 /** Dump the switch L1 I-cache. */
336 #define SIM_DUMP_SNL1I 0x200
338 /** Dump the current backtrace. */
339 #define SIM_DUMP_BACKTRACE 0x400
341 /** Only dump valid lines in caches. */
342 #define SIM_DUMP_VALID_LINES 0x800
344 /** Dump everything that is dumpable. */
345 #define SIM_DUMP_ALL (-1 & ~SIM_DUMP_VALID_LINES)
349 /** Computes the value to write to SPR_SIM_CONTROL to dump machine state. */
350 #define SIM_DUMP_SPR_ARG(mask) \
351 (SIM_CONTROL_DUMP | ((mask) << _SIM_CONTROL_OPERATOR_BITS))
355 * Bit masks which can be shifted by 8, combined with
356 * SIM_CONTROL_PROFILER_CHIP_xxx, and written to SPR_SIM_CONTROL.
360 * @addtogroup arch_sim
364 /** Use with SIM_PROFILER_CHIP_xxx to control the memory controllers. */
365 #define SIM_CHIP_MEMCTL 0x001
367 /** Use with SIM_PROFILER_CHIP_xxx to control the XAUI interface. */
368 #define SIM_CHIP_XAUI 0x002
370 /** Use with SIM_PROFILER_CHIP_xxx to control the PCIe interface. */
371 #define SIM_CHIP_PCIE 0x004
373 /** Use with SIM_PROFILER_CHIP_xxx to control the MPIPE interface. */
374 #define SIM_CHIP_MPIPE 0x008
376 /** Use with SIM_PROFILER_CHIP_xxx to control the TRIO interface. */
377 #define SIM_CHIP_TRIO 0x010
379 /** Reference all chip devices. */
380 #define SIM_CHIP_ALL (-1)
384 /** Computes the value to write to SPR_SIM_CONTROL to clear chip statistics. */
385 #define SIM_PROFILER_CHIP_CLEAR_SPR_ARG(mask) \
386 (SIM_CONTROL_PROFILER_CHIP_CLEAR | ((mask) << _SIM_CONTROL_OPERATOR_BITS))
388 /** Computes the value to write to SPR_SIM_CONTROL to disable chip statistics.*/
389 #define SIM_PROFILER_CHIP_DISABLE_SPR_ARG(mask) \
390 (SIM_CONTROL_PROFILER_CHIP_DISABLE | ((mask) << _SIM_CONTROL_OPERATOR_BITS))
392 /** Computes the value to write to SPR_SIM_CONTROL to enable chip statistics. */
393 #define SIM_PROFILER_CHIP_ENABLE_SPR_ARG(mask) \
394 (SIM_CONTROL_PROFILER_CHIP_ENABLE | ((mask) << _SIM_CONTROL_OPERATOR_BITS))
398 /* Shim bitrate controls. */
400 /** The number of bits used to store the shim id. */
401 #define SIM_CONTROL_SHAPING_SHIM_ID_BITS 3
404 * @addtogroup arch_sim
408 /** Change the gbe 0 bitrate. */
409 #define SIM_CONTROL_SHAPING_GBE_0 0x0
411 /** Change the gbe 1 bitrate. */
412 #define SIM_CONTROL_SHAPING_GBE_1 0x1
414 /** Change the gbe 2 bitrate. */
415 #define SIM_CONTROL_SHAPING_GBE_2 0x2
417 /** Change the gbe 3 bitrate. */
418 #define SIM_CONTROL_SHAPING_GBE_3 0x3
420 /** Change the xgbe 0 bitrate. */
421 #define SIM_CONTROL_SHAPING_XGBE_0 0x4
423 /** Change the xgbe 1 bitrate. */
424 #define SIM_CONTROL_SHAPING_XGBE_1 0x5
426 /** The type of shaping to do. */
427 #define SIM_CONTROL_SHAPING_TYPE_BITS 2
429 /** Control the multiplier. */
430 #define SIM_CONTROL_SHAPING_MULTIPLIER 0
432 /** Control the PPS. */
433 #define SIM_CONTROL_SHAPING_PPS 1
435 /** Control the BPS. */
436 #define SIM_CONTROL_SHAPING_BPS 2
438 /** The number of bits for the units for the shaping parameter. */
439 #define SIM_CONTROL_SHAPING_UNITS_BITS 2
441 /** Provide a number in single units. */
442 #define SIM_CONTROL_SHAPING_UNITS_SINGLE 0
444 /** Provide a number in kilo units. */
445 #define SIM_CONTROL_SHAPING_UNITS_KILO 1
447 /** Provide a number in mega units. */
448 #define SIM_CONTROL_SHAPING_UNITS_MEGA 2
450 /** Provide a number in giga units. */
451 #define SIM_CONTROL_SHAPING_UNITS_GIGA 3
455 /** How many bits are available for the rate. */
456 #define SIM_CONTROL_SHAPING_RATE_BITS \
457 (32 - (_SIM_CONTROL_OPERATOR_BITS + \
458 SIM_CONTROL_SHAPING_SHIM_ID_BITS + \
459 SIM_CONTROL_SHAPING_TYPE_BITS + \
460 SIM_CONTROL_SHAPING_UNITS_BITS))
462 /** Computes the value to write to SPR_SIM_CONTROL to change a bitrate. */
463 #define SIM_SHAPING_SPR_ARG(shim, type, units, rate) \
464 (SIM_CONTROL_SHAPING | \
466 ((type) << (SIM_CONTROL_SHAPING_SHIM_ID_BITS)) | \
467 ((units) << (SIM_CONTROL_SHAPING_SHIM_ID_BITS + \
468 SIM_CONTROL_SHAPING_TYPE_BITS)) | \
469 ((rate) << (SIM_CONTROL_SHAPING_SHIM_ID_BITS + \
470 SIM_CONTROL_SHAPING_TYPE_BITS + \
471 SIM_CONTROL_SHAPING_UNITS_BITS))) << _SIM_CONTROL_OPERATOR_BITS)
475 * Values returned when reading SPR_SIM_CONTROL.
476 * ISSUE: These names should share a longer common prefix.
480 * When reading SPR_SIM_CONTROL, the mask of simulator tracing bits
481 * (SIM_TRACE_xxx values).
483 #define SIM_TRACE_FLAG_MASK 0xFFFF
485 /** When reading SPR_SIM_CONTROL, the mask for whether profiling is enabled. */
486 #define SIM_PROFILER_ENABLED_MASK 0x10000
490 * Special arguments for "SIM_CONTROL_PUTC".
494 * Flag value for forcing a PUTC string-flush, including
495 * coordinate/cycle prefix and newline.
497 #define SIM_PUTC_FLUSH_STRING 0x100
500 * Flag value for forcing a PUTC binary-data-flush, which skips the
501 * prefix and does not append a newline.
503 #define SIM_PUTC_FLUSH_BINARY 0x101
506 #endif /* __ARCH_SIM_DEF_H__ */