1 // SPDX-License-Identifier: GPL-2.0
2 /* smp.c: Sparc SMP support.
4 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
6 * Copyright (C) 2004 Keith M Wesolowski (wesolows@foobazco.org)
11 #include <linux/kernel.h>
12 #include <linux/sched.h>
13 #include <linux/threads.h>
14 #include <linux/smp.h>
15 #include <linux/interrupt.h>
16 #include <linux/kernel_stat.h>
17 #include <linux/init.h>
18 #include <linux/spinlock.h>
21 #include <linux/seq_file.h>
22 #include <linux/cache.h>
23 #include <linux/delay.h>
24 #include <linux/profile.h>
25 #include <linux/cpu.h>
27 #include <asm/ptrace.h>
28 #include <linux/atomic.h>
32 #include <asm/oplib.h>
33 #include <asm/cacheflush.h>
34 #include <asm/tlbflush.h>
35 #include <asm/cpudata.h>
36 #include <asm/timer.h>
42 volatile unsigned long cpu_callin_map[NR_CPUS] = {0,};
44 cpumask_t smp_commenced_mask = CPU_MASK_NONE;
46 const struct sparc32_ipi_ops *sparc32_ipi_ops;
48 /* The only guaranteed locking primitive available on all Sparc
49 * processors is 'ldstub [%reg + immediate], %dest_reg' which atomically
50 * places the current byte at the effective address into dest_reg and
51 * places 0xff there afterwards. Pretty lame locking primitive
52 * compared to the Alpha and the Intel no? Most Sparcs have 'swap'
53 * instruction which is much better...
56 void smp_store_cpu_info(int id)
61 cpu_data(id).udelay_val = loops_per_jiffy;
63 cpu_find_by_mid(id, &cpu_node);
64 cpu_data(id).clock_tick = prom_getintdefault(cpu_node,
65 "clock-frequency", 0);
66 cpu_data(id).prom_node = cpu_node;
67 mid = cpu_get_hwmid(cpu_node);
70 printk(KERN_NOTICE "No MID found for CPU%d at node 0x%08x", id, cpu_node);
73 cpu_data(id).mid = mid;
76 void __init smp_cpus_done(unsigned int max_cpus)
78 unsigned long bogosum = 0;
81 for_each_online_cpu(cpu) {
83 bogosum += cpu_data(cpu).udelay_val;
86 printk("Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
87 num, bogosum/(500000/HZ),
88 (bogosum/(5000/HZ))%100);
90 switch(sparc_cpu_model) {
109 printk("UNKNOWN!\n");
117 printk("CPU[%d]: Returns from cpu_idle!\n", smp_processor_id());
118 panic("SMP bolixed\n");
121 struct linux_prom_registers smp_penguin_ctable = { 0 };
123 void smp_send_reschedule(int cpu)
126 * CPU model dependent way of implementing IPI generation targeting
127 * a single CPU. The trap handler needs only to do trap entry/return
130 sparc32_ipi_ops->resched(cpu);
133 void smp_send_stop(void)
137 void arch_send_call_function_single_ipi(int cpu)
139 /* trigger one IPI single call on one CPU */
140 sparc32_ipi_ops->single(cpu);
143 void arch_send_call_function_ipi_mask(const struct cpumask *mask)
147 /* trigger IPI mask call on each CPU */
148 for_each_cpu(cpu, mask)
149 sparc32_ipi_ops->mask_one(cpu);
152 void smp_resched_interrupt(void)
156 local_cpu_data().irq_resched_count++;
158 /* re-schedule routine called by interrupt return code. */
161 void smp_call_function_single_interrupt(void)
164 generic_smp_call_function_single_interrupt();
165 local_cpu_data().irq_call_count++;
169 void smp_call_function_interrupt(void)
172 generic_smp_call_function_interrupt();
173 local_cpu_data().irq_call_count++;
177 int setup_profiling_timer(unsigned int multiplier)
182 void __init smp_prepare_cpus(unsigned int max_cpus)
186 printk("Entering SMP Mode...\n");
189 for (i = 0; !cpu_find_by_instance(i, NULL, &cpuid); i++) {
190 if (cpuid >= NR_CPUS)
193 /* i = number of cpus */
194 if (extra && max_cpus > i - extra)
195 printk("Warning: NR_CPUS is too low to start all cpus\n");
197 smp_store_cpu_info(boot_cpu_id);
199 switch(sparc_cpu_model) {
218 printk("UNKNOWN!\n");
224 /* Set this up early so that things like the scheduler can init
225 * properly. We use the same cpu mask for both the present and
228 void __init smp_setup_cpu_possible_map(void)
233 while (!cpu_find_by_instance(instance, NULL, &mid)) {
235 set_cpu_possible(mid, true);
236 set_cpu_present(mid, true);
242 void __init smp_prepare_boot_cpu(void)
244 int cpuid = hard_smp_processor_id();
246 if (cpuid >= NR_CPUS) {
247 prom_printf("Serious problem, boot cpu id >= NR_CPUS\n");
251 printk("boot cpu id != 0, this could work but is untested\n");
253 current_thread_info()->cpu = cpuid;
254 set_cpu_online(cpuid, true);
255 set_cpu_possible(cpuid, true);
258 int __cpu_up(unsigned int cpu, struct task_struct *tidle)
262 switch(sparc_cpu_model) {
264 ret = smp4m_boot_one_cpu(cpu, tidle);
267 ret = smp4d_boot_one_cpu(cpu, tidle);
270 ret = leon_boot_one_cpu(cpu, tidle);
281 printk("UNKNOWN!\n");
287 cpumask_set_cpu(cpu, &smp_commenced_mask);
288 while (!cpu_online(cpu))
294 static void arch_cpu_pre_starting(void *arg)
296 local_ops->cache_all();
297 local_ops->tlb_all();
299 switch(sparc_cpu_model) {
301 sun4m_cpu_pre_starting(arg);
304 sun4d_cpu_pre_starting(arg);
307 leon_cpu_pre_starting(arg);
314 static void arch_cpu_pre_online(void *arg)
316 unsigned int cpuid = hard_smp_processor_id();
318 register_percpu_ce(cpuid);
321 smp_store_cpu_info(cpuid);
323 local_ops->cache_all();
324 local_ops->tlb_all();
326 switch(sparc_cpu_model) {
328 sun4m_cpu_pre_online(arg);
331 sun4d_cpu_pre_online(arg);
334 leon_cpu_pre_online(arg);
341 static void sparc_start_secondary(void *arg)
346 * SMP booting is extremely fragile in some architectures. So run
347 * the cpu initialization code first before anything else.
349 arch_cpu_pre_starting(arg);
351 cpu = smp_processor_id();
353 notify_cpu_starting(cpu);
354 arch_cpu_pre_online(arg);
356 /* Set the CPU in the cpu_online_mask */
357 set_cpu_online(cpu, true);
359 /* Enable local interrupts now */
363 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
365 /* We should never reach here! */
369 void smp_callin(void)
371 sparc_start_secondary(NULL);
374 void smp_bogo(struct seq_file *m)
378 for_each_online_cpu(i) {
380 "Cpu%dBogo\t: %lu.%02lu\n",
382 cpu_data(i).udelay_val/(500000/HZ),
383 (cpu_data(i).udelay_val/(5000/HZ))%100);
387 void smp_info(struct seq_file *m)
391 seq_printf(m, "State:\n");
392 for_each_online_cpu(i)
393 seq_printf(m, "CPU%d\t\t: online\n", i);