1 /* SPDX-License-Identifier: GPL-2.0 */
3 * rtrap.S: Preparing for return from trap on Sparc V9.
5 * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
6 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
11 #include <asm/pstate.h>
12 #include <asm/ptrace.h>
13 #include <asm/spitfire.h>
15 #include <asm/visasm.h>
16 #include <asm/processor.h>
18 #ifdef CONFIG_CONTEXT_TRACKING
19 # define SCHEDULE_USER schedule_user
21 # define SCHEDULE_USER schedule
28 wrpr %g0, RTRAP_PSTATE, %pstate
29 ba,pt %xcc, __handle_preemption_continue
30 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
32 __handle_user_windows:
33 add %sp, PTREGS_OFF, %o0
34 call fault_in_user_windows
35 wrpr %g0, RTRAP_PSTATE, %pstate
36 ba,pt %xcc, __handle_preemption_continue
37 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
41 andcc %l5, FPRS_FEF, %g0
42 sethi %hi(TSTATE_PEF), %o0
43 be,a,pn %icc, __handle_userfpu_continue
45 ba,a,pt %xcc, __handle_userfpu_continue
49 add %sp, PTREGS_OFF, %o0
52 wrpr %g0, RTRAP_PSTATE, %pstate
53 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
55 /* Signal delivery can modify pt_regs tstate, so we must
58 ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
59 sethi %hi(0xf << 20), %l4
61 ba,pt %xcc, __handle_preemption_continue
64 /* When returning from a NMI (%pil==15) interrupt we want to
65 * avoid running softirqs, doing IRQ tracing, preempting, etc.
68 rtrap_nmi: ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
69 sethi %hi(0xf << 20), %l4
73 ba,pt %xcc, rtrap_no_irq_enable
75 /* Do not actually set the %pil here. We will do that
76 * below after we clear PSTATE_IE in the %pstate register.
77 * If we re-enable interrupts here, we can recurse down
78 * the hardirq stack potentially endlessly, causing a
83 .globl rtrap_irq, rtrap, irqsz_patchme, rtrap_xcall
86 /* mm/ultra.S:xcall_report_regs KNOWS about this load. */
87 ldx [%sp + PTREGS_OFF + PT_V9_TSTATE], %l1
89 sethi %hi(0xf << 20), %l4
93 #ifdef CONFIG_TRACE_IRQFLAGS
94 brnz,pn %l4, rtrap_no_irq_enable
96 call trace_hardirqs_on
98 /* Do not actually set the %pil here. We will do that
99 * below after we clear PSTATE_IE in the %pstate register.
100 * If we re-enable interrupts here, we can recurse down
101 * the hardirq stack potentially endlessly, causing a
104 * It is tempting to put this test and trace_hardirqs_on
105 * call at the 'rt_continue' label, but that will not work
106 * as that path hits unconditionally and we do not want to
107 * execute this in NMI return paths, for example.
111 andcc %l1, TSTATE_PRIV, %l3
112 bne,pn %icc, to_kernel
115 /* We must hold IRQs off and atomically test schedule+signal
116 * state, then hold them off all the way back to userspace.
117 * If we are returning to kernel, none of this matters. Note
118 * that we are disabling interrupts via PSTATE_IE, not using
121 * If we do not do this, there is a window where we would do
122 * the tests, later the signal/resched event arrives but we do
123 * not process it since we are still in kernel mode. It would
124 * take until the next local IRQ before the signal/resched
125 * event would be handled.
127 * This also means that if we have to deal with user
128 * windows, we have to redo all of these sched+signal checks
129 * with IRQs disabled.
131 to_user: wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
133 __handle_preemption_continue:
134 ldx [%g6 + TI_FLAGS], %l0
135 sethi %hi(_TIF_USER_WORK_MASK), %o0
136 or %o0, %lo(_TIF_USER_WORK_MASK), %o0
138 sethi %hi(TSTATE_PEF), %o0
139 be,pt %xcc, user_nowork
141 andcc %l0, _TIF_NEED_RESCHED, %g0
142 bne,pn %xcc, __handle_preemption
143 andcc %l0, _TIF_DO_NOTIFY_RESUME_MASK, %g0
144 bne,pn %xcc, __handle_signal
145 ldub [%g6 + TI_WSAVED], %o2
146 brnz,pn %o2, __handle_user_windows
148 sethi %hi(TSTATE_PEF), %o0
151 /* This fpdepth clear is necessary for non-syscall rtraps only */
153 bne,pn %xcc, __handle_userfpu
154 stb %g0, [%g6 + TI_FPDEPTH]
155 __handle_userfpu_continue:
157 rt_continue: ldx [%sp + PTREGS_OFF + PT_V9_G1], %g1
158 ldx [%sp + PTREGS_OFF + PT_V9_G2], %g2
160 ldx [%sp + PTREGS_OFF + PT_V9_G3], %g3
161 ldx [%sp + PTREGS_OFF + PT_V9_G4], %g4
162 ldx [%sp + PTREGS_OFF + PT_V9_G5], %g5
166 /* Must do this before thread reg is clobbered below. */
167 LOAD_PER_CPU_BASE(%g5, %g6, %i0, %i1, %i2)
169 ldx [%sp + PTREGS_OFF + PT_V9_G6], %g6
170 ldx [%sp + PTREGS_OFF + PT_V9_G7], %g7
172 /* Normal globals are restored, go to trap globals. */
173 661: wrpr %g0, RTRAP_PSTATE_AG_IRQOFF, %pstate
175 .section .sun4v_2insn_patch, "ax"
177 wrpr %g0, RTRAP_PSTATE_IRQOFF, %pstate
183 ldx [%sp + PTREGS_OFF + PT_V9_I0], %i0
184 ldx [%sp + PTREGS_OFF + PT_V9_I1], %i1
186 ldx [%sp + PTREGS_OFF + PT_V9_I2], %i2
187 ldx [%sp + PTREGS_OFF + PT_V9_I3], %i3
188 ldx [%sp + PTREGS_OFF + PT_V9_I4], %i4
189 ldx [%sp + PTREGS_OFF + PT_V9_I5], %i5
190 ldx [%sp + PTREGS_OFF + PT_V9_I6], %i6
191 ldx [%sp + PTREGS_OFF + PT_V9_I7], %i7
192 ldx [%sp + PTREGS_OFF + PT_V9_TPC], %l2
193 ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %o2
195 ld [%sp + PTREGS_OFF + PT_V9_Y], %o3
199 andn %l1, TSTATE_SYSCALL, %l1
200 wrpr %l1, %g0, %tstate
204 brnz,pn %l3, kern_rtt
205 mov PRIMARY_CONTEXT, %l7
207 661: ldxa [%l7 + %l7] ASI_DMMU, %l0
208 .section .sun4v_1insn_patch, "ax"
210 ldxa [%l7 + %l7] ASI_MMU, %l0
213 sethi %hi(sparc64_kern_pri_nuc_bits), %l1
214 ldx [%l1 + %lo(sparc64_kern_pri_nuc_bits)], %l1
217 661: stxa %l0, [%l7] ASI_DMMU
218 .section .sun4v_1insn_patch, "ax"
220 stxa %l0, [%l7] ASI_MMU
223 sethi %hi(KERNBASE), %l7
229 661: wrpr %l2, %g0, %canrestore
230 .section .fast_win_ctrl_1insn_patch, "ax"
232 .word 0x89880000 ! normalw
235 wrpr %l1, %g0, %wstate
236 brnz,pt %l2, user_rtt_restore
237 661: wrpr %g0, %g0, %otherwin
238 .section .fast_win_ctrl_1insn_patch, "ax"
243 ldx [%g6 + TI_FLAGS], %g3
244 wr %g0, ASI_AIUP, %asi
246 andcc %g3, _TIF_32BIT, %g0
248 bne,pt %xcc, user_rtt_fill_32bit
250 ba,a,pt %xcc, user_rtt_fill_64bit
253 user_rtt_fill_fixup_dax:
254 ba,pt %xcc, user_rtt_fill_fixup_common
257 user_rtt_fill_fixup_mna:
258 ba,pt %xcc, user_rtt_fill_fixup_common
262 ba,pt %xcc, user_rtt_fill_fixup_common
265 user_rtt_pre_restore:
271 rdpr %canrestore, %g1
272 wrpr %g1, 0x0, %cleanwin
276 kern_rtt: rdpr %canrestore, %g1
277 brz,pn %g1, kern_rtt_fill
280 stw %g0, [%sp + PTREGS_OFF + PT_V9_MAGIC]
285 #ifdef CONFIG_PREEMPT
286 ldsw [%g6 + TI_PRE_COUNT], %l5
287 brnz %l5, kern_fpucheck
288 ldx [%g6 + TI_FLAGS], %l5
289 andcc %l5, _TIF_NEED_RESCHED, %g0
290 be,pt %xcc, kern_fpucheck
293 bne,pn %xcc, kern_fpucheck
295 call preempt_schedule_irq
299 kern_fpucheck: ldub [%g6 + TI_FPDEPTH], %l5
300 brz,pt %l5, rt_continue
302 add %g6, TI_FPSAVED, %l6
303 ldub [%l6 + %o0], %l2
307 andcc %l2, (FPRS_FEF|FPRS_DU), %g0
309 and %l2, FPRS_DL, %l6
310 andcc %l2, FPRS_FEF, %g0
315 wr %g1, FPRS_FEF, %fprs
317 add %g6, TI_XFSR, %o1
319 add %g6, TI_FPREGS, %o3
321 add %g6, TI_FPREGS+0x40, %o4
324 ldda [%o3 + %o2] ASI_BLK_P, %f0
325 ldda [%o4 + %o2] ASI_BLK_P, %f16
327 1: andcc %l2, FPRS_DU, %g0
332 ldda [%o3 + %o2] ASI_BLK_P, %f32
333 ldda [%o4 + %o2] ASI_BLK_P, %f48
335 ldx [%o1 + %o5], %fsr
336 2: stb %l5, [%g6 + TI_FPDEPTH]
337 ba,pt %xcc, rt_continue
339 5: wr %g0, FPRS_FEF, %fprs
342 add %g6, TI_FPREGS+0x80, %o3
343 add %g6, TI_FPREGS+0xc0, %o4
345 ldda [%o3 + %o2] ASI_BLK_P, %f32
346 ldda [%o4 + %o2] ASI_BLK_P, %f48
348 wr %g0, FPRS_DU, %fprs
349 ba,pt %xcc, rt_continue
350 stb %l5, [%g6 + TI_FPDEPTH]