2 * arch/sh/mm/cache-sh7705.c
4 * Copyright (C) 1999, 2000 Niibe Yutaka
5 * Copyright (C) 2004 Alex Song
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
12 #include <linux/init.h>
13 #include <linux/mman.h>
16 #include <linux/pagemap.h>
17 #include <linux/threads.h>
18 #include <asm/addrspace.h>
20 #include <asm/processor.h>
21 #include <asm/cache.h>
23 #include <linux/uaccess.h>
24 #include <asm/mmu_context.h>
25 #include <asm/cacheflush.h>
28 * The 32KB cache on the SH7705 suffers from the same synonym problem
31 static inline void cache_wback_all(void)
33 unsigned long ways, waysize, addrstart;
35 ways = current_cpu_data.dcache.ways;
36 waysize = current_cpu_data.dcache.sets;
37 waysize <<= current_cpu_data.dcache.entry_shift;
39 addrstart = CACHE_OC_ADDRESS_ARRAY;
44 for (addr = addrstart;
45 addr < addrstart + waysize;
46 addr += current_cpu_data.dcache.linesz) {
48 int v = SH_CACHE_UPDATED | SH_CACHE_VALID;
50 data = __raw_readl(addr);
53 __raw_writel(data & ~v, addr);
57 addrstart += current_cpu_data.dcache.way_incr;
62 * Write back the range of D-cache, and purge the I-cache.
64 * Called from kernel/module.c:sys_init_module and routine for a.out format.
66 static void sh7705_flush_icache_range(void *args)
68 struct flusher_data *data = args;
69 unsigned long start, end;
74 __flush_wback_region((void *)start, end - start);
78 * Writeback&Invalidate the D-cache of the page
80 static void __flush_dcache_page(unsigned long phys)
82 unsigned long ways, waysize, addrstart;
85 phys |= SH_CACHE_VALID;
88 * Here, phys is the physical address of the page. We check all the
89 * tags in the cache for those with the same page number as this page
90 * (by masking off the lowest 2 bits of the 19-bit tag; these bits are
91 * derived from the offset within in the 4k page). Matching valid
92 * entries are invalidated.
94 * Since 2 bits of the cache index are derived from the virtual page
95 * number, knowing this would reduce the number of cache entries to be
96 * searched by a factor of 4. However this function exists to deal with
97 * potential cache aliasing, therefore the optimisation is probably not
100 local_irq_save(flags);
103 ways = current_cpu_data.dcache.ways;
104 waysize = current_cpu_data.dcache.sets;
105 waysize <<= current_cpu_data.dcache.entry_shift;
107 addrstart = CACHE_OC_ADDRESS_ARRAY;
112 for (addr = addrstart;
113 addr < addrstart + waysize;
114 addr += current_cpu_data.dcache.linesz) {
117 data = __raw_readl(addr) & (0x1ffffC00 | SH_CACHE_VALID);
119 data &= ~(SH_CACHE_VALID | SH_CACHE_UPDATED);
120 __raw_writel(data, addr);
124 addrstart += current_cpu_data.dcache.way_incr;
128 local_irq_restore(flags);
132 * Write back & invalidate the D-cache of the page.
133 * (To avoid "alias" issues)
135 static void sh7705_flush_dcache_page(void *arg)
137 struct page *page = arg;
138 struct address_space *mapping = page_mapping_file(page);
140 if (mapping && !mapping_mapped(mapping))
141 clear_bit(PG_dcache_clean, &page->flags);
143 __flush_dcache_page(__pa(page_address(page)));
146 static void sh7705_flush_cache_all(void *args)
150 local_irq_save(flags);
155 local_irq_restore(flags);
159 * Write back and invalidate I/D-caches for the page.
161 * ADDRESS: Virtual Address (U0 address)
163 static void sh7705_flush_cache_page(void *args)
165 struct flusher_data *data = args;
166 unsigned long pfn = data->addr2;
168 __flush_dcache_page(pfn << PAGE_SHIFT);
172 * This is called when a page-cache page is about to be mapped into a
173 * user process' address space. It offers an opportunity for a
174 * port to ensure d-cache/i-cache coherency if necessary.
176 * Not entirely sure why this is necessary on SH3 with 32K cache but
177 * without it we get occasional "Memory fault" when loading a program.
179 static void sh7705_flush_icache_page(void *page)
181 __flush_purge_region(page_address(page), PAGE_SIZE);
184 void __init sh7705_cache_init(void)
186 local_flush_icache_range = sh7705_flush_icache_range;
187 local_flush_dcache_page = sh7705_flush_dcache_page;
188 local_flush_cache_all = sh7705_flush_cache_all;
189 local_flush_cache_mm = sh7705_flush_cache_all;
190 local_flush_cache_dup_mm = sh7705_flush_cache_all;
191 local_flush_cache_range = sh7705_flush_cache_all;
192 local_flush_cache_page = sh7705_flush_cache_page;
193 local_flush_icache_page = sh7705_flush_icache_page;