arch/sh/kernel/cpu/sh2/setup-sh7619.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * SH7619 Setup
   4  *
   5  *  Copyright (C) 2006  Yoshinori Sato
   6  *  Copyright (C) 2009  Paul Mundt
   7  */
   8 #include <linux/platform_device.h>
   9 #include <linux/init.h>
  10 #include <linux/serial.h>
  11 #include <linux/serial_sci.h>
  12 #include <linux/sh_eth.h>
  13 #include <linux/sh_timer.h>
  14 #include <linux/io.h>
  15 #include <asm/platform_early.h>
  16
  17 enum {
  18         UNUSED = 0,
  19
  20         /* interrupt sources */
  21         IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
  22         WDT, EDMAC, CMT0, CMT1,
  23         SCIF0, SCIF1, SCIF2,
  24         HIF_HIFI, HIF_HIFBI,
  25         DMAC0, DMAC1, DMAC2, DMAC3,
  26         SIOF,
  27 };
  28
  29 static struct intc_vect vectors[] __initdata = {
  30         INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65),
  31         INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
  32         INTC_IRQ(IRQ4, 80), INTC_IRQ(IRQ5, 81),
  33         INTC_IRQ(IRQ6, 82), INTC_IRQ(IRQ7, 83),
  34         INTC_IRQ(WDT, 84), INTC_IRQ(EDMAC, 85),
  35         INTC_IRQ(CMT0, 86), INTC_IRQ(CMT1, 87),
  36         INTC_IRQ(SCIF0, 88), INTC_IRQ(SCIF0, 89),
  37         INTC_IRQ(SCIF0, 90), INTC_IRQ(SCIF0, 91),
  38         INTC_IRQ(SCIF1, 92), INTC_IRQ(SCIF1, 93),
  39         INTC_IRQ(SCIF1, 94), INTC_IRQ(SCIF1, 95),
  40         INTC_IRQ(SCIF2, 96), INTC_IRQ(SCIF2, 97),
  41         INTC_IRQ(SCIF2, 98), INTC_IRQ(SCIF2, 99),
  42         INTC_IRQ(HIF_HIFI, 100), INTC_IRQ(HIF_HIFBI, 101),
  43         INTC_IRQ(DMAC0, 104), INTC_IRQ(DMAC1, 105),
  44         INTC_IRQ(DMAC2, 106), INTC_IRQ(DMAC3, 107),
  45         INTC_IRQ(SIOF, 108),
  46 };
  47
  48 static struct intc_prio_reg prio_registers[] __initdata = {
  49         { 0xf8140006, 0, 16, 4, /* IPRA */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
  50         { 0xf8140008, 0, 16, 4, /* IPRB */ { IRQ4, IRQ5, IRQ6, IRQ7 } },
  51         { 0xf8080000, 0, 16, 4, /* IPRC */ { WDT, EDMAC, CMT0, CMT1 } },
  52         { 0xf8080002, 0, 16, 4, /* IPRD */ { SCIF0, SCIF1, SCIF2 } },
  53         { 0xf8080004, 0, 16, 4, /* IPRE */ { HIF_HIFI, HIF_HIFBI } },
  54         { 0xf8080006, 0, 16, 4, /* IPRF */ { DMAC0, DMAC1, DMAC2, DMAC3 } },
  55         { 0xf8080008, 0, 16, 4, /* IPRG */ { SIOF } },
  56 };
  57
  58 static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, NULL,
  59                          NULL, prio_registers, NULL);
  60
  61 static struct plat_sci_port scif0_platform_data = {
  62         .scscr          = SCSCR_REIE,
  63         .type           = PORT_SCIF,
  64 };
  65
  66 static struct resource scif0_resources[] = {
  67         DEFINE_RES_MEM(0xf8400000, 0x100),
  68         DEFINE_RES_IRQ(88),
  69 };
  70
  71 static struct platform_device scif0_device = {
  72         .name           = "sh-sci",
  73         .id             = 0,
  74         .resource       = scif0_resources,
  75         .num_resources  = ARRAY_SIZE(scif0_resources),
  76         .dev            = {
  77                 .platform_data  = &scif0_platform_data,
  78         },
  79 };
  80
  81 static struct plat_sci_port scif1_platform_data = {
  82         .scscr          = SCSCR_REIE,
  83         .type           = PORT_SCIF,
  84 };
  85
  86 static struct resource scif1_resources[] = {
  87         DEFINE_RES_MEM(0xf8410000, 0x100),
  88         DEFINE_RES_IRQ(92),
  89 };
  90
  91 static struct platform_device scif1_device = {
  92         .name           = "sh-sci",
  93         .id             = 1,
  94         .resource       = scif1_resources,
  95         .num_resources  = ARRAY_SIZE(scif1_resources),
  96         .dev            = {
  97                 .platform_data  = &scif1_platform_data,
  98         },
  99 };
 100
 101 static struct plat_sci_port scif2_platform_data = {
 102         .scscr          = SCSCR_REIE,
 103         .type           = PORT_SCIF,
 104 };
 105
 106 static struct resource scif2_resources[] = {
 107         DEFINE_RES_MEM(0xf8420000, 0x100),
 108         DEFINE_RES_IRQ(96),
 109 };
 110
 111 static struct platform_device scif2_device = {
 112         .name           = "sh-sci",
 113         .id             = 2,
 114         .resource       = scif2_resources,
 115         .num_resources  = ARRAY_SIZE(scif2_resources),
 116         .dev            = {
 117                 .platform_data  = &scif2_platform_data,
 118         },
 119 };
 120
 121 static struct sh_eth_plat_data eth_platform_data = {
 122         .phy            = 1,
 123         .phy_interface  = PHY_INTERFACE_MODE_MII,
 124 };
 125
 126 static struct resource eth_resources[] = {
 127         [0] = {
 128                 .start = 0xfb000000,
 129                 .end = 0xfb0001c7,
 130                 .flags = IORESOURCE_MEM,
 131         },
 132         [1] = {
 133                 .start = 85,
 134                 .end = 85,
 135                 .flags = IORESOURCE_IRQ,
 136         },
 137 };
 138
 139 static struct platform_device eth_device = {
 140         .name = "sh7619-ether",
 141         .id = -1,
 142         .dev = {
 143                 .platform_data = &eth_platform_data,
 144         },
 145         .num_resources = ARRAY_SIZE(eth_resources),
 146         .resource = eth_resources,
 147 };
 148
 149 static struct sh_timer_config cmt_platform_data = {
 150         .channels_mask = 3,
 151 };
 152
 153 static struct resource cmt_resources[] = {
 154         DEFINE_RES_MEM(0xf84a0070, 0x10),
 155         DEFINE_RES_IRQ(86),
 156         DEFINE_RES_IRQ(87),
 157 };
 158
 159 static struct platform_device cmt_device = {
 160         .name           = "sh-cmt-16",
 161         .id             = 0,
 162         .dev = {
 163                 .platform_data  = &cmt_platform_data,
 164         },
 165         .resource       = cmt_resources,
 166         .num_resources  = ARRAY_SIZE(cmt_resources),
 167 };
 168
 169 static struct platform_device *sh7619_devices[] __initdata = {
 170         &scif0_device,
 171         &scif1_device,
 172         &scif2_device,
 173         &eth_device,
 174         &cmt_device,
 175 };
 176
 177 static int __init sh7619_devices_setup(void)
 178 {
 179         return platform_add_devices(sh7619_devices,
 180                                     ARRAY_SIZE(sh7619_devices));
 181 }
 182 arch_initcall(sh7619_devices_setup);
 183
 184 void __init plat_irq_setup(void)
 185 {
 186         register_intc_controller(&intc_desc);
 187 }
 188
 189 static struct platform_device *sh7619_early_devices[] __initdata = {
 190         &scif0_device,
 191         &scif1_device,
 192         &scif2_device,
 193         &cmt_device,
 194 };
 195
 196 #define STBCR3 0xf80a0000
 197
 198 void __init plat_early_device_setup(void)
 199 {
 200         /* enable CMT clock */
 201         __raw_writeb(__raw_readb(STBCR3) & ~0x10, STBCR3);
 202
 203         sh_early_platform_add_devices(sh7619_early_devices,
 204                                    ARRAY_SIZE(sh7619_early_devices));
 205 }