4 * Copyright (c) 2004 - 2009 Paul Mundt
5 * Copyright (c) 2002 M. R. Brown
7 * Modelled after arch/mips/pci/pci.c:
8 * Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
14 #include <linux/kernel.h>
16 #include <linux/pci.h>
17 #include <linux/init.h>
18 #include <linux/types.h>
19 #include <linux/dma-debug.h>
21 #include <linux/mutex.h>
22 #include <linux/spinlock.h>
23 #include <linux/export.h>
25 unsigned long PCIBIOS_MIN_IO = 0x0000;
26 unsigned long PCIBIOS_MIN_MEM = 0;
29 * The PCI controller list.
31 static struct pci_channel *hose_head, **hose_tail = &hose_head;
33 static int pci_initialized;
35 static void pcibios_scanbus(struct pci_channel *hose)
37 static int next_busno;
38 static int need_domain_info;
41 resource_size_t offset;
43 struct pci_host_bridge *bridge;
45 bridge = pci_alloc_host_bridge(0);
49 for (i = 0; i < hose->nr_resources; i++) {
50 res = hose->resources + i;
52 if (res->flags & IORESOURCE_DISABLED)
54 if (res->flags & IORESOURCE_IO)
55 offset = hose->io_offset;
56 else if (res->flags & IORESOURCE_MEM)
57 offset = hose->mem_offset;
58 pci_add_resource_offset(&resources, res, offset);
61 list_splice_init(&resources, &bridge->windows);
62 bridge->dev.parent = NULL;
63 bridge->sysdata = hose;
64 bridge->busnr = next_busno;
65 bridge->ops = hose->pci_ops;
66 bridge->swizzle_irq = pci_common_swizzle;
67 bridge->map_irq = pcibios_map_platform_irq;
69 ret = pci_scan_root_bus_bridge(bridge);
71 pci_free_host_bridge(bridge);
75 hose->bus = bridge->bus;
77 need_domain_info = need_domain_info || hose->index;
78 hose->need_domain_info = need_domain_info;
80 next_busno = hose->bus->busn_res.end + 1;
81 /* Don't allow 8-bit bus number overflow inside the hose -
82 reserve some space for bridges. */
83 if (next_busno > 224) {
88 pci_bus_size_bridges(hose->bus);
89 pci_bus_assign_resources(hose->bus);
90 pci_bus_add_devices(hose->bus);
94 * This interrupt-safe spinlock protects all accesses to PCI
95 * configuration space.
97 DEFINE_RAW_SPINLOCK(pci_config_lock);
98 static DEFINE_MUTEX(pci_scan_mutex);
100 int register_pci_controller(struct pci_channel *hose)
104 for (i = 0; i < hose->nr_resources; i++) {
105 struct resource *res = hose->resources + i;
107 if (res->flags & IORESOURCE_DISABLED)
110 if (res->flags & IORESOURCE_IO) {
111 if (request_resource(&ioport_resource, res) < 0)
114 if (request_resource(&iomem_resource, res) < 0)
120 hose_tail = &hose->next;
123 * Do not panic here but later - this might happen before console init.
125 if (!hose->io_map_base) {
127 "registering PCI controller with io_map_base unset\n");
131 * Setup the ERR/PERR and SERR timers, if available.
133 pcibios_enable_timers(hose);
136 * Scan the bus if it is register after the PCI subsystem
139 if (pci_initialized) {
140 mutex_lock(&pci_scan_mutex);
141 pcibios_scanbus(hose);
142 mutex_unlock(&pci_scan_mutex);
148 for (--i; i >= 0; i--)
149 release_resource(&hose->resources[i]);
151 printk(KERN_WARNING "Skipping PCI bus scan due to resource conflict\n");
155 static int __init pcibios_init(void)
157 struct pci_channel *hose;
159 /* Scan all of the recorded PCI controllers. */
160 for (hose = hose_head; hose; hose = hose->next)
161 pcibios_scanbus(hose);
167 subsys_initcall(pcibios_init);
170 * We need to avoid collisions with `mirrored' VGA ports
171 * and other strange ISA hardware, so we always want the
172 * addresses to be allocated in the 0x000-0x0ff region
175 resource_size_t pcibios_align_resource(void *data, const struct resource *res,
176 resource_size_t size, resource_size_t align)
178 struct pci_dev *dev = data;
179 struct pci_channel *hose = dev->sysdata;
180 resource_size_t start = res->start;
182 if (res->flags & IORESOURCE_IO) {
183 if (start < PCIBIOS_MIN_IO + hose->resources[0].start)
184 start = PCIBIOS_MIN_IO + hose->resources[0].start;
187 * Put everything into 0x00-0xff region modulo 0x400.
190 start = (start + 0x3ff) & ~0x3ff;
197 pcibios_bus_report_status_early(struct pci_channel *hose,
198 int top_bus, int current_bus,
199 unsigned int status_mask, int warn)
201 unsigned int pci_devfn;
205 for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
206 if (PCI_FUNC(pci_devfn))
208 ret = early_read_config_word(hose, top_bus, current_bus,
209 pci_devfn, PCI_STATUS, &status);
210 if (ret != PCIBIOS_SUCCESSFUL)
212 if (status == 0xffff)
215 early_write_config_word(hose, top_bus, current_bus,
216 pci_devfn, PCI_STATUS,
217 status & status_mask);
219 printk("(%02x:%02x: %04X) ", current_bus,
225 * We can't use pci_find_device() here since we are
226 * called from interrupt context.
229 pcibios_bus_report_status(struct pci_bus *bus, unsigned int status_mask,
234 list_for_each_entry(dev, &bus->devices, bus_list) {
238 * ignore host bridge - we handle
241 if (dev->bus->number == 0 && dev->devfn == 0)
244 pci_read_config_word(dev, PCI_STATUS, &status);
245 if (status == 0xffff)
248 if ((status & status_mask) == 0)
251 /* clear the status errors */
252 pci_write_config_word(dev, PCI_STATUS, status & status_mask);
255 printk("(%s: %04X) ", pci_name(dev), status);
258 list_for_each_entry(dev, &bus->devices, bus_list)
259 if (dev->subordinate)
260 pcibios_bus_report_status(dev->subordinate, status_mask, warn);
263 void __ref pcibios_report_status(unsigned int status_mask, int warn)
265 struct pci_channel *hose;
267 for (hose = hose_head; hose; hose = hose->next) {
268 if (unlikely(!hose->bus))
269 pcibios_bus_report_status_early(hose, hose_head->index,
270 hose->index, status_mask, warn);
272 pcibios_bus_report_status(hose->bus, status_mask, warn);
276 #ifndef CONFIG_GENERIC_IOMAP
278 void __iomem *__pci_ioport_map(struct pci_dev *dev,
279 unsigned long port, unsigned int nr)
281 struct pci_channel *chan = dev->sysdata;
283 if (unlikely(!chan->io_map_base)) {
284 chan->io_map_base = sh_io_port_base;
286 if (pci_domains_supported)
287 panic("To avoid data corruption io_map_base MUST be "
288 "set with multiple PCI domains.");
291 return (void __iomem *)(chan->io_map_base + port);
294 void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
298 EXPORT_SYMBOL(pci_iounmap);
300 #endif /* CONFIG_GENERIC_IOMAP */
302 EXPORT_SYMBOL(PCIBIOS_MIN_IO);
303 EXPORT_SYMBOL(PCIBIOS_MIN_MEM);