1 // SPDX-License-Identifier: GPL-2.0
3 * linux/arch/sh/boards/se/770x/setup.c
5 * Copyright (C) 2000 Kazumoto Kojima
7 * Hitachi SolutionEngine Support.
10 #include <linux/init.h>
11 #include <linux/platform_device.h>
12 #include <linux/sh_eth.h>
13 #include <mach-se/mach/se.h>
14 #include <mach-se/mach/mrshpc.h>
15 #include <asm/machvec.h>
17 #include <asm/smc37c93x.h>
18 #include <asm/heartbeat.h>
21 * Configure the Super I/O chip
23 static void __init smsc_config(int index, int data)
25 outb_p(index, INDEX_PORT);
26 outb_p(data, DATA_PORT);
29 /* XXX: Another candidate for a more generic cchip machine vector */
30 static void __init smsc_setup(char **cmdline_p)
32 outb_p(CONFIG_ENTER, CONFIG_PORT);
33 outb_p(CONFIG_ENTER, CONFIG_PORT);
36 smsc_config(CURRENT_LDN_INDEX, LDN_FDC);
37 smsc_config(ACTIVATE_INDEX, 0x01);
38 smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */
40 /* AUXIO (GPIO): to use IDE1 */
41 smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO);
42 smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */
43 smsc_config(GPIO47_INDEX, 0x00); /* nIOWOP */
46 smsc_config(CURRENT_LDN_INDEX, LDN_COM1);
47 smsc_config(ACTIVATE_INDEX, 0x01);
48 smsc_config(IO_BASE_HI_INDEX, 0x03);
49 smsc_config(IO_BASE_LO_INDEX, 0xf8);
50 smsc_config(IRQ_SELECT_INDEX, 4); /* IRQ4 */
53 smsc_config(CURRENT_LDN_INDEX, LDN_COM2);
54 smsc_config(ACTIVATE_INDEX, 0x01);
55 smsc_config(IO_BASE_HI_INDEX, 0x02);
56 smsc_config(IO_BASE_LO_INDEX, 0xf8);
57 smsc_config(IRQ_SELECT_INDEX, 3); /* IRQ3 */
60 smsc_config(CURRENT_LDN_INDEX, LDN_RTC);
61 smsc_config(ACTIVATE_INDEX, 0x01);
62 smsc_config(IRQ_SELECT_INDEX, 8); /* IRQ8 */
64 /* XXX: PARPORT, KBD, and MOUSE will come here... */
65 outb_p(CONFIG_EXIT, CONFIG_PORT);
69 static struct resource cf_ide_resources[] = {
71 .start = PA_MRSHPC_IO + 0x1f0,
72 .end = PA_MRSHPC_IO + 0x1f0 + 8,
73 .flags = IORESOURCE_MEM,
76 .start = PA_MRSHPC_IO + 0x1f0 + 0x206,
77 .end = PA_MRSHPC_IO + 0x1f0 + 8 + 0x206 + 8,
78 .flags = IORESOURCE_MEM,
82 .flags = IORESOURCE_IRQ,
86 static struct platform_device cf_ide_device = {
87 .name = "pata_platform",
89 .num_resources = ARRAY_SIZE(cf_ide_resources),
90 .resource = cf_ide_resources,
93 static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
95 static struct heartbeat_data heartbeat_data = {
96 .bit_pos = heartbeat_bit_pos,
97 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
100 static struct resource heartbeat_resource = {
103 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
106 static struct platform_device heartbeat_device = {
110 .platform_data = &heartbeat_data,
113 .resource = &heartbeat_resource,
116 #if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
117 defined(CONFIG_CPU_SUBTYPE_SH7712)
118 /* SH771X Ethernet driver */
119 static struct sh_eth_plat_data sh_eth_plat = {
121 .phy_interface = PHY_INTERFACE_MODE_MII,
124 static struct resource sh_eth0_resources[] = {
126 .start = SH_ETH0_BASE,
127 .end = SH_ETH0_BASE + 0x1B8,
128 .flags = IORESOURCE_MEM,
131 .start = SH_ETH0_IRQ,
133 .flags = IORESOURCE_IRQ,
137 static struct platform_device sh_eth0_device = {
138 .name = "sh771x-ether",
141 .platform_data = &sh_eth_plat,
143 .num_resources = ARRAY_SIZE(sh_eth0_resources),
144 .resource = sh_eth0_resources,
147 static struct resource sh_eth1_resources[] = {
149 .start = SH_ETH1_BASE,
150 .end = SH_ETH1_BASE + 0x1B8,
151 .flags = IORESOURCE_MEM,
154 .start = SH_ETH1_IRQ,
156 .flags = IORESOURCE_IRQ,
160 static struct platform_device sh_eth1_device = {
161 .name = "sh771x-ether",
164 .platform_data = &sh_eth_plat,
166 .num_resources = ARRAY_SIZE(sh_eth1_resources),
167 .resource = sh_eth1_resources,
171 static struct platform_device *se_devices[] __initdata = {
174 #if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
175 defined(CONFIG_CPU_SUBTYPE_SH7712)
181 static int __init se_devices_setup(void)
183 mrshpc_setup_windows();
184 return platform_add_devices(se_devices, ARRAY_SIZE(se_devices));
186 device_initcall(se_devices_setup);
191 static struct sh_machine_vector mv_se __initmv = {
192 .mv_name = "SolutionEngine",
193 .mv_setup = smsc_setup,
194 .mv_init_irq = init_se_IRQ,