2 * BPF Jit compiler for s390.
4 * Minimum build requirements:
6 * - HAVE_MARCH_Z196_FEATURES: laal, laalg
7 * - HAVE_MARCH_Z10_FEATURES: msfi, cgrj, clgrj
8 * - HAVE_MARCH_Z9_109_FEATURES: alfi, llilf, clfi, oilf, nilf
12 * Copyright IBM Corp. 2012,2015
14 * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
15 * Michael Holzheu <holzheu@linux.vnet.ibm.com>
18 #define KMSG_COMPONENT "bpf_jit"
19 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
21 #include <linux/netdevice.h>
22 #include <linux/filter.h>
23 #include <linux/init.h>
24 #include <linux/bpf.h>
25 #include <asm/cacheflush.h>
27 #include <asm/facility.h>
28 #include <asm/nospec-branch.h>
32 u32 seen; /* Flags to remember seen eBPF instructions */
33 u32 seen_reg[16]; /* Array to remember which registers are used */
34 u32 *addrs; /* Array with relative instruction addresses */
35 u8 *prg_buf; /* Start of program */
36 int size; /* Size of program and literal pool */
37 int size_prg; /* Size of program */
38 int prg; /* Current position in program */
39 int lit_start; /* Start of literal pool */
40 int lit; /* Current position in literal pool */
41 int base_ip; /* Base address for literal pool */
42 int ret0_ip; /* Address of return 0 */
43 int exit_ip; /* Address of exit */
44 int r1_thunk_ip; /* Address of expoline thunk for 'br %r1' */
45 int r14_thunk_ip; /* Address of expoline thunk for 'br %r14' */
46 int tail_call_start; /* Tail call start offset */
47 int labels[1]; /* Labels for local jumps */
50 #define BPF_SIZE_MAX 0xffff /* Max size for program (16 bit branches) */
52 #define SEEN_SKB 1 /* skb access */
53 #define SEEN_MEM 2 /* use mem[] for temporary storage */
54 #define SEEN_RET0 4 /* ret0_ip points to a valid return 0 */
55 #define SEEN_LITERAL 8 /* code uses literals */
56 #define SEEN_FUNC 16 /* calls C functions */
57 #define SEEN_TAIL_CALL 32 /* code uses tail calls */
58 #define SEEN_SKB_CHANGE 64 /* code changes skb data */
59 #define SEEN_REG_AX 128 /* code uses constant blinding */
60 #define SEEN_STACK (SEEN_FUNC | SEEN_MEM | SEEN_SKB)
65 #define REG_W0 (MAX_BPF_JIT_REG + 0) /* Work register 1 (even) */
66 #define REG_W1 (MAX_BPF_JIT_REG + 1) /* Work register 2 (odd) */
67 #define REG_SKB_DATA (MAX_BPF_JIT_REG + 2) /* SKB data register */
68 #define REG_L (MAX_BPF_JIT_REG + 3) /* Literal pool register */
69 #define REG_15 (MAX_BPF_JIT_REG + 4) /* Register 15 */
70 #define REG_0 REG_W0 /* Register 0 */
71 #define REG_1 REG_W1 /* Register 1 */
72 #define REG_2 BPF_REG_1 /* Register 2 */
73 #define REG_14 BPF_REG_0 /* Register 14 */
76 * Mapping of BPF registers to s390 registers
78 static const int reg2hex[] = {
81 /* Function parameters */
87 /* Call saved registers */
92 /* BPF stack pointer */
94 /* Register for blinding (shared with REG_SKB_DATA) */
96 /* SKB data pointer */
98 /* Work registers for s390x backend */
105 static inline u32 reg(u32 dst_reg, u32 src_reg)
107 return reg2hex[dst_reg] << 4 | reg2hex[src_reg];
110 static inline u32 reg_high(u32 reg)
112 return reg2hex[reg] << 4;
115 static inline void reg_set_seen(struct bpf_jit *jit, u32 b1)
117 u32 r1 = reg2hex[b1];
119 if (r1 >= 6 && r1 <= 15 && !jit->seen_reg[r1])
120 jit->seen_reg[r1] = 1;
123 #define REG_SET_SEEN(b1) \
125 reg_set_seen(jit, b1); \
128 #define REG_SEEN(b1) jit->seen_reg[reg2hex[(b1)]]
131 * EMIT macros for code generation
137 *(u16 *) (jit->prg_buf + jit->prg) = op; \
141 #define EMIT2(op, b1, b2) \
143 _EMIT2(op | reg(b1, b2)); \
151 *(u32 *) (jit->prg_buf + jit->prg) = op; \
155 #define EMIT4(op, b1, b2) \
157 _EMIT4(op | reg(b1, b2)); \
162 #define EMIT4_RRF(op, b1, b2, b3) \
164 _EMIT4(op | reg_high(b3) << 8 | reg(b1, b2)); \
170 #define _EMIT4_DISP(op, disp) \
172 unsigned int __disp = (disp) & 0xfff; \
173 _EMIT4(op | __disp); \
176 #define EMIT4_DISP(op, b1, b2, disp) \
178 _EMIT4_DISP(op | reg_high(b1) << 16 | \
179 reg_high(b2) << 8, disp); \
184 #define EMIT4_IMM(op, b1, imm) \
186 unsigned int __imm = (imm) & 0xffff; \
187 _EMIT4(op | reg_high(b1) << 16 | __imm); \
191 #define EMIT4_PCREL(op, pcrel) \
193 long __pcrel = ((pcrel) >> 1) & 0xffff; \
194 _EMIT4(op | __pcrel); \
197 #define _EMIT6(op1, op2) \
199 if (jit->prg_buf) { \
200 *(u32 *) (jit->prg_buf + jit->prg) = op1; \
201 *(u16 *) (jit->prg_buf + jit->prg + 4) = op2; \
206 #define _EMIT6_DISP(op1, op2, disp) \
208 unsigned int __disp = (disp) & 0xfff; \
209 _EMIT6(op1 | __disp, op2); \
212 #define _EMIT6_DISP_LH(op1, op2, disp) \
214 u32 _disp = (u32) disp; \
215 unsigned int __disp_h = _disp & 0xff000; \
216 unsigned int __disp_l = _disp & 0x00fff; \
217 _EMIT6(op1 | __disp_l, op2 | __disp_h >> 4); \
220 #define EMIT6_DISP_LH(op1, op2, b1, b2, b3, disp) \
222 _EMIT6_DISP_LH(op1 | reg(b1, b2) << 16 | \
223 reg_high(b3) << 8, op2, disp); \
229 #define EMIT6_PCREL_LABEL(op1, op2, b1, b2, label, mask) \
231 int rel = (jit->labels[label] - jit->prg) >> 1; \
232 _EMIT6(op1 | reg(b1, b2) << 16 | (rel & 0xffff), \
238 #define EMIT6_PCREL_IMM_LABEL(op1, op2, b1, imm, label, mask) \
240 int rel = (jit->labels[label] - jit->prg) >> 1; \
241 _EMIT6(op1 | (reg_high(b1) | mask) << 16 | \
242 (rel & 0xffff), op2 | (imm & 0xff) << 8); \
244 BUILD_BUG_ON(((unsigned long) imm) > 0xff); \
247 #define EMIT6_PCREL(op1, op2, b1, b2, i, off, mask) \
249 /* Branch instruction needs 6 bytes */ \
250 int rel = (addrs[i + off + 1] - (addrs[i + 1] - 6)) / 2;\
251 _EMIT6(op1 | reg(b1, b2) << 16 | (rel & 0xffff), op2 | mask); \
256 #define EMIT6_PCREL_RILB(op, b, target) \
258 int rel = (target - jit->prg) / 2; \
259 _EMIT6(op | reg_high(b) << 16 | rel >> 16, rel & 0xffff); \
263 #define EMIT6_PCREL_RIL(op, target) \
265 int rel = (target - jit->prg) / 2; \
266 _EMIT6(op | rel >> 16, rel & 0xffff); \
269 #define _EMIT6_IMM(op, imm) \
271 unsigned int __imm = (imm); \
272 _EMIT6(op | (__imm >> 16), __imm & 0xffff); \
275 #define EMIT6_IMM(op, b1, imm) \
277 _EMIT6_IMM(op | reg_high(b1) << 16, imm); \
281 #define EMIT_CONST_U32(val) \
284 ret = jit->lit - jit->base_ip; \
285 jit->seen |= SEEN_LITERAL; \
287 *(u32 *) (jit->prg_buf + jit->lit) = (u32) val; \
292 #define EMIT_CONST_U64(val) \
295 ret = jit->lit - jit->base_ip; \
296 jit->seen |= SEEN_LITERAL; \
298 *(u64 *) (jit->prg_buf + jit->lit) = (u64) val; \
303 #define EMIT_ZERO(b1) \
305 /* llgfr %dst,%dst (zero extend to 64 bit) */ \
306 EMIT4(0xb9160000, b1, b1); \
311 * Fill whole space with illegal instructions
313 static void jit_fill_hole(void *area, unsigned int size)
315 memset(area, 0, size);
319 * Save registers from "rs" (register start) to "re" (register end) on stack
321 static void save_regs(struct bpf_jit *jit, u32 rs, u32 re)
323 u32 off = STK_OFF_R6 + (rs - 6) * 8;
326 /* stg %rs,off(%r15) */
327 _EMIT6(0xe300f000 | rs << 20 | off, 0x0024);
329 /* stmg %rs,%re,off(%r15) */
330 _EMIT6_DISP(0xeb00f000 | rs << 20 | re << 16, 0x0024, off);
334 * Restore registers from "rs" (register start) to "re" (register end) on stack
336 static void restore_regs(struct bpf_jit *jit, u32 rs, u32 re)
338 u32 off = STK_OFF_R6 + (rs - 6) * 8;
340 if (jit->seen & SEEN_STACK)
344 /* lg %rs,off(%r15) */
345 _EMIT6(0xe300f000 | rs << 20 | off, 0x0004);
347 /* lmg %rs,%re,off(%r15) */
348 _EMIT6_DISP(0xeb00f000 | rs << 20 | re << 16, 0x0004, off);
352 * Return first seen register (from start)
354 static int get_start(struct bpf_jit *jit, int start)
358 for (i = start; i <= 15; i++) {
359 if (jit->seen_reg[i])
366 * Return last seen register (from start) (gap >= 2)
368 static int get_end(struct bpf_jit *jit, int start)
372 for (i = start; i < 15; i++) {
373 if (!jit->seen_reg[i] && !jit->seen_reg[i + 1])
376 return jit->seen_reg[15] ? 15 : 14;
380 #define REGS_RESTORE 0
382 * Save and restore clobbered registers (6-15) on stack.
383 * We save/restore registers in chunks with gap >= 2 registers.
385 static void save_restore_regs(struct bpf_jit *jit, int op)
391 rs = get_start(jit, re);
394 re = get_end(jit, rs + 1);
396 save_regs(jit, rs, re);
398 restore_regs(jit, rs, re);
404 * For SKB access %b1 contains the SKB pointer. For "bpf_jit.S"
405 * we store the SKB header length on the stack and the SKB data
406 * pointer in REG_SKB_DATA if BPF_REG_AX is not used.
408 static void emit_load_skb_data_hlen(struct bpf_jit *jit)
410 /* Header length: llgf %w1,<len>(%b1) */
411 EMIT6_DISP_LH(0xe3000000, 0x0016, REG_W1, REG_0, BPF_REG_1,
412 offsetof(struct sk_buff, len));
413 /* s %w1,<data_len>(%b1) */
414 EMIT4_DISP(0x5b000000, REG_W1, BPF_REG_1,
415 offsetof(struct sk_buff, data_len));
416 /* stg %w1,ST_OFF_HLEN(%r0,%r15) */
417 EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W1, REG_0, REG_15, STK_OFF_HLEN);
418 if (!(jit->seen & SEEN_REG_AX))
419 /* lg %skb_data,data_off(%b1) */
420 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_SKB_DATA, REG_0,
421 BPF_REG_1, offsetof(struct sk_buff, data));
425 * Emit function prologue
427 * Save registers and create stack frame if necessary.
428 * See stack frame layout desription in "bpf_jit.h"!
430 static void bpf_jit_prologue(struct bpf_jit *jit)
432 if (jit->seen & SEEN_TAIL_CALL) {
433 /* xc STK_OFF_TCCNT(4,%r15),STK_OFF_TCCNT(%r15) */
434 _EMIT6(0xd703f000 | STK_OFF_TCCNT, 0xf000 | STK_OFF_TCCNT);
436 /* j tail_call_start: NOP if no tail calls are used */
437 EMIT4_PCREL(0xa7f40000, 6);
440 /* Tail calls have to skip above initialization */
441 jit->tail_call_start = jit->prg;
443 save_restore_regs(jit, REGS_SAVE);
444 /* Setup literal pool */
445 if (jit->seen & SEEN_LITERAL) {
447 EMIT2(0x0d00, REG_L, REG_0);
448 jit->base_ip = jit->prg;
450 /* Setup stack and backchain */
451 if (jit->seen & SEEN_STACK) {
452 if (jit->seen & SEEN_FUNC)
453 /* lgr %w1,%r15 (backchain) */
454 EMIT4(0xb9040000, REG_W1, REG_15);
455 /* la %bfp,STK_160_UNUSED(%r15) (BPF frame pointer) */
456 EMIT4_DISP(0x41000000, BPF_REG_FP, REG_15, STK_160_UNUSED);
457 /* aghi %r15,-STK_OFF */
458 EMIT4_IMM(0xa70b0000, REG_15, -STK_OFF);
459 if (jit->seen & SEEN_FUNC)
460 /* stg %w1,152(%r15) (backchain) */
461 EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W1, REG_0,
464 if (jit->seen & SEEN_SKB)
465 emit_load_skb_data_hlen(jit);
466 if (jit->seen & SEEN_SKB_CHANGE)
467 /* stg %b1,ST_OFF_SKBP(%r0,%r15) */
468 EMIT6_DISP_LH(0xe3000000, 0x0024, BPF_REG_1, REG_0, REG_15,
475 static void bpf_jit_epilogue(struct bpf_jit *jit)
478 if (jit->seen & SEEN_RET0) {
479 jit->ret0_ip = jit->prg;
481 EMIT4_IMM(0xa7090000, BPF_REG_0, 0);
483 jit->exit_ip = jit->prg;
484 /* Load exit code: lgr %r2,%b0 */
485 EMIT4(0xb9040000, REG_2, BPF_REG_0);
486 /* Restore registers */
487 save_restore_regs(jit, REGS_RESTORE);
488 if (IS_ENABLED(CC_USING_EXPOLINE) && !nospec_disable) {
489 jit->r14_thunk_ip = jit->prg;
490 /* Generate __s390_indirect_jump_r14 thunk */
491 if (test_facility(35)) {
493 EMIT6_PCREL_RIL(0xc6000000, jit->prg + 10);
496 EMIT6_PCREL_RILB(0xc0000000, REG_1, jit->prg + 14);
498 EMIT4_DISP(0x44000000, REG_0, REG_1, 0);
501 EMIT4_PCREL(0xa7f40000, 0);
506 if (IS_ENABLED(CC_USING_EXPOLINE) && !nospec_disable &&
507 (jit->seen & SEEN_FUNC)) {
508 jit->r1_thunk_ip = jit->prg;
509 /* Generate __s390_indirect_jump_r1 thunk */
510 if (test_facility(35)) {
512 EMIT6_PCREL_RIL(0xc6000000, jit->prg + 10);
514 EMIT4_PCREL(0xa7f40000, 0);
518 /* ex 0,S390_lowcore.br_r1_tampoline */
519 EMIT4_DISP(0x44000000, REG_0, REG_0,
520 offsetof(struct lowcore, br_r1_trampoline));
522 EMIT4_PCREL(0xa7f40000, 0);
528 * Compile one eBPF instruction into s390x code
530 * NOTE: Use noinline because for gcov (-fprofile-arcs) gcc allocates a lot of
531 * stack space for the large switch statement.
533 static noinline int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp, int i)
535 struct bpf_insn *insn = &fp->insnsi[i];
536 int jmp_off, last, insn_count = 1;
537 unsigned int func_addr, mask;
538 u32 dst_reg = insn->dst_reg;
539 u32 src_reg = insn->src_reg;
540 u32 *addrs = jit->addrs;
544 if (dst_reg == BPF_REG_AX || src_reg == BPF_REG_AX)
545 jit->seen |= SEEN_REG_AX;
546 switch (insn->code) {
550 case BPF_ALU | BPF_MOV | BPF_X: /* dst = (u32) src */
551 /* llgfr %dst,%src */
552 EMIT4(0xb9160000, dst_reg, src_reg);
554 case BPF_ALU64 | BPF_MOV | BPF_X: /* dst = src */
556 EMIT4(0xb9040000, dst_reg, src_reg);
558 case BPF_ALU | BPF_MOV | BPF_K: /* dst = (u32) imm */
560 EMIT6_IMM(0xc00f0000, dst_reg, imm);
562 case BPF_ALU64 | BPF_MOV | BPF_K: /* dst = imm */
564 EMIT6_IMM(0xc0010000, dst_reg, imm);
569 case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */
571 /* 16 byte instruction that uses two 'struct bpf_insn' */
574 imm64 = (u64)(u32) insn[0].imm | ((u64)(u32) insn[1].imm) << 32;
575 /* lg %dst,<d(imm)>(%l) */
576 EMIT6_DISP_LH(0xe3000000, 0x0004, dst_reg, REG_0, REG_L,
577 EMIT_CONST_U64(imm64));
584 case BPF_ALU | BPF_ADD | BPF_X: /* dst = (u32) dst + (u32) src */
586 EMIT2(0x1a00, dst_reg, src_reg);
589 case BPF_ALU64 | BPF_ADD | BPF_X: /* dst = dst + src */
591 EMIT4(0xb9080000, dst_reg, src_reg);
593 case BPF_ALU | BPF_ADD | BPF_K: /* dst = (u32) dst + (u32) imm */
596 EMIT6_IMM(0xc20b0000, dst_reg, imm);
600 case BPF_ALU64 | BPF_ADD | BPF_K: /* dst = dst + imm */
604 EMIT6_IMM(0xc2080000, dst_reg, imm);
609 case BPF_ALU | BPF_SUB | BPF_X: /* dst = (u32) dst - (u32) src */
611 EMIT2(0x1b00, dst_reg, src_reg);
614 case BPF_ALU64 | BPF_SUB | BPF_X: /* dst = dst - src */
616 EMIT4(0xb9090000, dst_reg, src_reg);
618 case BPF_ALU | BPF_SUB | BPF_K: /* dst = (u32) dst - (u32) imm */
621 EMIT6_IMM(0xc20b0000, dst_reg, -imm);
625 case BPF_ALU64 | BPF_SUB | BPF_K: /* dst = dst - imm */
628 if (imm == -0x80000000) {
629 /* algfi %dst,0x80000000 */
630 EMIT6_IMM(0xc20a0000, dst_reg, 0x80000000);
633 EMIT6_IMM(0xc2080000, dst_reg, -imm);
639 case BPF_ALU | BPF_MUL | BPF_X: /* dst = (u32) dst * (u32) src */
641 EMIT4(0xb2520000, dst_reg, src_reg);
644 case BPF_ALU64 | BPF_MUL | BPF_X: /* dst = dst * src */
646 EMIT4(0xb90c0000, dst_reg, src_reg);
648 case BPF_ALU | BPF_MUL | BPF_K: /* dst = (u32) dst * (u32) imm */
651 EMIT6_IMM(0xc2010000, dst_reg, imm);
655 case BPF_ALU64 | BPF_MUL | BPF_K: /* dst = dst * imm */
659 EMIT6_IMM(0xc2000000, dst_reg, imm);
664 case BPF_ALU | BPF_DIV | BPF_X: /* dst = (u32) dst / (u32) src */
665 case BPF_ALU | BPF_MOD | BPF_X: /* dst = (u32) dst % (u32) src */
667 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
669 jit->seen |= SEEN_RET0;
670 /* ltr %src,%src (if src == 0 goto fail) */
671 EMIT2(0x1200, src_reg, src_reg);
673 EMIT4_PCREL(0xa7840000, jit->ret0_ip - jit->prg);
675 EMIT4_IMM(0xa7080000, REG_W0, 0);
677 EMIT2(0x1800, REG_W1, dst_reg);
679 EMIT4(0xb9970000, REG_W0, src_reg);
681 EMIT4(0xb9160000, dst_reg, rc_reg);
684 case BPF_ALU64 | BPF_DIV | BPF_X: /* dst = dst / src */
685 case BPF_ALU64 | BPF_MOD | BPF_X: /* dst = dst % src */
687 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
689 jit->seen |= SEEN_RET0;
690 /* ltgr %src,%src (if src == 0 goto fail) */
691 EMIT4(0xb9020000, src_reg, src_reg);
693 EMIT4_PCREL(0xa7840000, jit->ret0_ip - jit->prg);
695 EMIT4_IMM(0xa7090000, REG_W0, 0);
697 EMIT4(0xb9040000, REG_W1, dst_reg);
699 EMIT4(0xb9870000, REG_W0, src_reg);
701 EMIT4(0xb9040000, dst_reg, rc_reg);
704 case BPF_ALU | BPF_DIV | BPF_K: /* dst = (u32) dst / (u32) imm */
705 case BPF_ALU | BPF_MOD | BPF_K: /* dst = (u32) dst % (u32) imm */
707 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
710 if (BPF_OP(insn->code) == BPF_MOD)
712 EMIT4_IMM(0xa7090000, dst_reg, 0);
718 EMIT4_IMM(0xa7080000, REG_W0, 0);
720 EMIT2(0x1800, REG_W1, dst_reg);
721 /* dl %w0,<d(imm)>(%l) */
722 EMIT6_DISP_LH(0xe3000000, 0x0097, REG_W0, REG_0, REG_L,
723 EMIT_CONST_U32(imm));
725 EMIT4(0xb9160000, dst_reg, rc_reg);
728 case BPF_ALU64 | BPF_DIV | BPF_K: /* dst = dst / imm */
729 case BPF_ALU64 | BPF_MOD | BPF_K: /* dst = dst % imm */
731 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
734 if (BPF_OP(insn->code) == BPF_MOD)
736 EMIT4_IMM(0xa7090000, dst_reg, 0);
740 EMIT4_IMM(0xa7090000, REG_W0, 0);
742 EMIT4(0xb9040000, REG_W1, dst_reg);
743 /* dlg %w0,<d(imm)>(%l) */
744 EMIT6_DISP_LH(0xe3000000, 0x0087, REG_W0, REG_0, REG_L,
745 EMIT_CONST_U64(imm));
747 EMIT4(0xb9040000, dst_reg, rc_reg);
753 case BPF_ALU | BPF_AND | BPF_X: /* dst = (u32) dst & (u32) src */
755 EMIT2(0x1400, dst_reg, src_reg);
758 case BPF_ALU64 | BPF_AND | BPF_X: /* dst = dst & src */
760 EMIT4(0xb9800000, dst_reg, src_reg);
762 case BPF_ALU | BPF_AND | BPF_K: /* dst = (u32) dst & (u32) imm */
764 EMIT6_IMM(0xc00b0000, dst_reg, imm);
767 case BPF_ALU64 | BPF_AND | BPF_K: /* dst = dst & imm */
768 /* ng %dst,<d(imm)>(%l) */
769 EMIT6_DISP_LH(0xe3000000, 0x0080, dst_reg, REG_0, REG_L,
770 EMIT_CONST_U64(imm));
775 case BPF_ALU | BPF_OR | BPF_X: /* dst = (u32) dst | (u32) src */
777 EMIT2(0x1600, dst_reg, src_reg);
780 case BPF_ALU64 | BPF_OR | BPF_X: /* dst = dst | src */
782 EMIT4(0xb9810000, dst_reg, src_reg);
784 case BPF_ALU | BPF_OR | BPF_K: /* dst = (u32) dst | (u32) imm */
786 EMIT6_IMM(0xc00d0000, dst_reg, imm);
789 case BPF_ALU64 | BPF_OR | BPF_K: /* dst = dst | imm */
790 /* og %dst,<d(imm)>(%l) */
791 EMIT6_DISP_LH(0xe3000000, 0x0081, dst_reg, REG_0, REG_L,
792 EMIT_CONST_U64(imm));
797 case BPF_ALU | BPF_XOR | BPF_X: /* dst = (u32) dst ^ (u32) src */
799 EMIT2(0x1700, dst_reg, src_reg);
802 case BPF_ALU64 | BPF_XOR | BPF_X: /* dst = dst ^ src */
804 EMIT4(0xb9820000, dst_reg, src_reg);
806 case BPF_ALU | BPF_XOR | BPF_K: /* dst = (u32) dst ^ (u32) imm */
809 EMIT6_IMM(0xc0070000, dst_reg, imm);
813 case BPF_ALU64 | BPF_XOR | BPF_K: /* dst = dst ^ imm */
814 /* xg %dst,<d(imm)>(%l) */
815 EMIT6_DISP_LH(0xe3000000, 0x0082, dst_reg, REG_0, REG_L,
816 EMIT_CONST_U64(imm));
821 case BPF_ALU | BPF_LSH | BPF_X: /* dst = (u32) dst << (u32) src */
822 /* sll %dst,0(%src) */
823 EMIT4_DISP(0x89000000, dst_reg, src_reg, 0);
826 case BPF_ALU64 | BPF_LSH | BPF_X: /* dst = dst << src */
827 /* sllg %dst,%dst,0(%src) */
828 EMIT6_DISP_LH(0xeb000000, 0x000d, dst_reg, dst_reg, src_reg, 0);
830 case BPF_ALU | BPF_LSH | BPF_K: /* dst = (u32) dst << (u32) imm */
832 /* sll %dst,imm(%r0) */
833 EMIT4_DISP(0x89000000, dst_reg, REG_0, imm);
837 case BPF_ALU64 | BPF_LSH | BPF_K: /* dst = dst << imm */
840 /* sllg %dst,%dst,imm(%r0) */
841 EMIT6_DISP_LH(0xeb000000, 0x000d, dst_reg, dst_reg, REG_0, imm);
846 case BPF_ALU | BPF_RSH | BPF_X: /* dst = (u32) dst >> (u32) src */
847 /* srl %dst,0(%src) */
848 EMIT4_DISP(0x88000000, dst_reg, src_reg, 0);
851 case BPF_ALU64 | BPF_RSH | BPF_X: /* dst = dst >> src */
852 /* srlg %dst,%dst,0(%src) */
853 EMIT6_DISP_LH(0xeb000000, 0x000c, dst_reg, dst_reg, src_reg, 0);
855 case BPF_ALU | BPF_RSH | BPF_K: /* dst = (u32) dst >> (u32) imm */
857 /* srl %dst,imm(%r0) */
858 EMIT4_DISP(0x88000000, dst_reg, REG_0, imm);
862 case BPF_ALU64 | BPF_RSH | BPF_K: /* dst = dst >> imm */
865 /* srlg %dst,%dst,imm(%r0) */
866 EMIT6_DISP_LH(0xeb000000, 0x000c, dst_reg, dst_reg, REG_0, imm);
871 case BPF_ALU64 | BPF_ARSH | BPF_X: /* ((s64) dst) >>= src */
872 /* srag %dst,%dst,0(%src) */
873 EMIT6_DISP_LH(0xeb000000, 0x000a, dst_reg, dst_reg, src_reg, 0);
875 case BPF_ALU64 | BPF_ARSH | BPF_K: /* ((s64) dst) >>= imm */
878 /* srag %dst,%dst,imm(%r0) */
879 EMIT6_DISP_LH(0xeb000000, 0x000a, dst_reg, dst_reg, REG_0, imm);
884 case BPF_ALU | BPF_NEG: /* dst = (u32) -dst */
886 EMIT2(0x1300, dst_reg, dst_reg);
889 case BPF_ALU64 | BPF_NEG: /* dst = -dst */
891 EMIT4(0xb9030000, dst_reg, dst_reg);
896 case BPF_ALU | BPF_END | BPF_FROM_BE:
897 /* s390 is big endian, therefore only clear high order bytes */
899 case 16: /* dst = (u16) cpu_to_be16(dst) */
900 /* llghr %dst,%dst */
901 EMIT4(0xb9850000, dst_reg, dst_reg);
903 case 32: /* dst = (u32) cpu_to_be32(dst) */
904 /* llgfr %dst,%dst */
905 EMIT4(0xb9160000, dst_reg, dst_reg);
907 case 64: /* dst = (u64) cpu_to_be64(dst) */
911 case BPF_ALU | BPF_END | BPF_FROM_LE:
913 case 16: /* dst = (u16) cpu_to_le16(dst) */
915 EMIT4(0xb91f0000, dst_reg, dst_reg);
916 /* srl %dst,16(%r0) */
917 EMIT4_DISP(0x88000000, dst_reg, REG_0, 16);
918 /* llghr %dst,%dst */
919 EMIT4(0xb9850000, dst_reg, dst_reg);
921 case 32: /* dst = (u32) cpu_to_le32(dst) */
923 EMIT4(0xb91f0000, dst_reg, dst_reg);
924 /* llgfr %dst,%dst */
925 EMIT4(0xb9160000, dst_reg, dst_reg);
927 case 64: /* dst = (u64) cpu_to_le64(dst) */
928 /* lrvgr %dst,%dst */
929 EMIT4(0xb90f0000, dst_reg, dst_reg);
936 case BPF_STX | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = src_reg */
937 /* stcy %src,off(%dst) */
938 EMIT6_DISP_LH(0xe3000000, 0x0072, src_reg, dst_reg, REG_0, off);
939 jit->seen |= SEEN_MEM;
941 case BPF_STX | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = src */
942 /* sthy %src,off(%dst) */
943 EMIT6_DISP_LH(0xe3000000, 0x0070, src_reg, dst_reg, REG_0, off);
944 jit->seen |= SEEN_MEM;
946 case BPF_STX | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = src */
947 /* sty %src,off(%dst) */
948 EMIT6_DISP_LH(0xe3000000, 0x0050, src_reg, dst_reg, REG_0, off);
949 jit->seen |= SEEN_MEM;
951 case BPF_STX | BPF_MEM | BPF_DW: /* (u64 *)(dst + off) = src */
952 /* stg %src,off(%dst) */
953 EMIT6_DISP_LH(0xe3000000, 0x0024, src_reg, dst_reg, REG_0, off);
954 jit->seen |= SEEN_MEM;
956 case BPF_ST | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = imm */
958 EMIT4_IMM(0xa7080000, REG_W0, (u8) imm);
959 /* stcy %w0,off(dst) */
960 EMIT6_DISP_LH(0xe3000000, 0x0072, REG_W0, dst_reg, REG_0, off);
961 jit->seen |= SEEN_MEM;
963 case BPF_ST | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = imm */
965 EMIT4_IMM(0xa7080000, REG_W0, (u16) imm);
966 /* sthy %w0,off(dst) */
967 EMIT6_DISP_LH(0xe3000000, 0x0070, REG_W0, dst_reg, REG_0, off);
968 jit->seen |= SEEN_MEM;
970 case BPF_ST | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = imm */
972 EMIT6_IMM(0xc00f0000, REG_W0, (u32) imm);
973 /* sty %w0,off(%dst) */
974 EMIT6_DISP_LH(0xe3000000, 0x0050, REG_W0, dst_reg, REG_0, off);
975 jit->seen |= SEEN_MEM;
977 case BPF_ST | BPF_MEM | BPF_DW: /* *(u64 *)(dst + off) = imm */
979 EMIT6_IMM(0xc0010000, REG_W0, imm);
980 /* stg %w0,off(%dst) */
981 EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W0, dst_reg, REG_0, off);
982 jit->seen |= SEEN_MEM;
985 * BPF_STX XADD (atomic_add)
987 case BPF_STX | BPF_XADD | BPF_W: /* *(u32 *)(dst + off) += src */
988 /* laal %w0,%src,off(%dst) */
989 EMIT6_DISP_LH(0xeb000000, 0x00fa, REG_W0, src_reg,
991 jit->seen |= SEEN_MEM;
993 case BPF_STX | BPF_XADD | BPF_DW: /* *(u64 *)(dst + off) += src */
994 /* laalg %w0,%src,off(%dst) */
995 EMIT6_DISP_LH(0xeb000000, 0x00ea, REG_W0, src_reg,
997 jit->seen |= SEEN_MEM;
1002 case BPF_LDX | BPF_MEM | BPF_B: /* dst = *(u8 *)(ul) (src + off) */
1003 /* llgc %dst,0(off,%src) */
1004 EMIT6_DISP_LH(0xe3000000, 0x0090, dst_reg, src_reg, REG_0, off);
1005 jit->seen |= SEEN_MEM;
1007 case BPF_LDX | BPF_MEM | BPF_H: /* dst = *(u16 *)(ul) (src + off) */
1008 /* llgh %dst,0(off,%src) */
1009 EMIT6_DISP_LH(0xe3000000, 0x0091, dst_reg, src_reg, REG_0, off);
1010 jit->seen |= SEEN_MEM;
1012 case BPF_LDX | BPF_MEM | BPF_W: /* dst = *(u32 *)(ul) (src + off) */
1013 /* llgf %dst,off(%src) */
1014 jit->seen |= SEEN_MEM;
1015 EMIT6_DISP_LH(0xe3000000, 0x0016, dst_reg, src_reg, REG_0, off);
1017 case BPF_LDX | BPF_MEM | BPF_DW: /* dst = *(u64 *)(ul) (src + off) */
1018 /* lg %dst,0(off,%src) */
1019 jit->seen |= SEEN_MEM;
1020 EMIT6_DISP_LH(0xe3000000, 0x0004, dst_reg, src_reg, REG_0, off);
1025 case BPF_JMP | BPF_CALL:
1028 * b0 = (__bpf_call_base + imm)(b1, b2, b3, b4, b5)
1030 const u64 func = (u64)__bpf_call_base + imm;
1032 REG_SET_SEEN(BPF_REG_5);
1033 jit->seen |= SEEN_FUNC;
1034 /* lg %w1,<d(imm)>(%l) */
1035 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_W1, REG_0, REG_L,
1036 EMIT_CONST_U64(func));
1037 if (IS_ENABLED(CC_USING_EXPOLINE) && !nospec_disable) {
1038 /* brasl %r14,__s390_indirect_jump_r1 */
1039 EMIT6_PCREL_RILB(0xc0050000, REG_14, jit->r1_thunk_ip);
1042 EMIT2(0x0d00, REG_14, REG_W1);
1044 /* lgr %b0,%r2: load return value into %b0 */
1045 EMIT4(0xb9040000, BPF_REG_0, REG_2);
1046 if (bpf_helper_changes_skb_data((void *)func)) {
1047 jit->seen |= SEEN_SKB_CHANGE;
1048 /* lg %b1,ST_OFF_SKBP(%r15) */
1049 EMIT6_DISP_LH(0xe3000000, 0x0004, BPF_REG_1, REG_0,
1050 REG_15, STK_OFF_SKBP);
1051 emit_load_skb_data_hlen(jit);
1055 case BPF_JMP | BPF_CALL | BPF_X:
1058 * B1: pointer to ctx
1059 * B2: pointer to bpf_array
1060 * B3: index in bpf_array
1062 jit->seen |= SEEN_TAIL_CALL;
1065 * if (index >= array->map.max_entries)
1069 /* llgf %w1,map.max_entries(%b2) */
1070 EMIT6_DISP_LH(0xe3000000, 0x0016, REG_W1, REG_0, BPF_REG_2,
1071 offsetof(struct bpf_array, map.max_entries));
1072 /* clrj %b3,%w1,0xa,label0: if (u32)%b3 >= (u32)%w1 goto out */
1073 EMIT6_PCREL_LABEL(0xec000000, 0x0077, BPF_REG_3,
1077 * if (tail_call_cnt++ > MAX_TAIL_CALL_CNT)
1081 if (jit->seen & SEEN_STACK)
1082 off = STK_OFF_TCCNT + STK_OFF;
1084 off = STK_OFF_TCCNT;
1086 EMIT4_IMM(0xa7080000, REG_W0, 1);
1087 /* laal %w1,%w0,off(%r15) */
1088 EMIT6_DISP_LH(0xeb000000, 0x00fa, REG_W1, REG_W0, REG_15, off);
1089 /* clij %w1,MAX_TAIL_CALL_CNT,0x2,label0 */
1090 EMIT6_PCREL_IMM_LABEL(0xec000000, 0x007f, REG_W1,
1091 MAX_TAIL_CALL_CNT, 0, 0x2);
1094 * prog = array->ptrs[index];
1099 /* llgfr %r1,%b3: %r1 = (u32) index */
1100 EMIT4(0xb9160000, REG_1, BPF_REG_3);
1101 /* sllg %r1,%r1,3: %r1 *= 8 */
1102 EMIT6_DISP_LH(0xeb000000, 0x000d, REG_1, REG_1, REG_0, 3);
1103 /* lg %r1,prog(%b2,%r1) */
1104 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_1, BPF_REG_2,
1105 REG_1, offsetof(struct bpf_array, ptrs));
1106 /* clgij %r1,0,0x8,label0 */
1107 EMIT6_PCREL_IMM_LABEL(0xec000000, 0x007d, REG_1, 0, 0, 0x8);
1110 * Restore registers before calling function
1112 save_restore_regs(jit, REGS_RESTORE);
1115 * goto *(prog->bpf_func + tail_call_start);
1118 /* lg %r1,bpf_func(%r1) */
1119 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_1, REG_1, REG_0,
1120 offsetof(struct bpf_prog, bpf_func));
1121 /* bc 0xf,tail_call_start(%r1) */
1122 _EMIT4(0x47f01000 + jit->tail_call_start);
1124 jit->labels[0] = jit->prg;
1126 case BPF_JMP | BPF_EXIT: /* return b0 */
1127 last = (i == fp->len - 1) ? 1 : 0;
1128 if (last && !(jit->seen & SEEN_RET0))
1131 EMIT4_PCREL(0xa7f40000, jit->exit_ip - jit->prg);
1134 * Branch relative (number of skipped instructions) to offset on
1137 * Condition code to mask mapping:
1139 * CC | Description | Mask
1140 * ------------------------------
1141 * 0 | Operands equal | 8
1142 * 1 | First operand low | 4
1143 * 2 | First operand high | 2
1146 * For s390x relative branches: ip = ip + off_bytes
1147 * For BPF relative branches: insn = insn + off_insns + 1
1149 * For example for s390x with offset 0 we jump to the branch
1150 * instruction itself (loop) and for BPF with offset 0 we
1151 * branch to the instruction behind the branch.
1153 case BPF_JMP | BPF_JA: /* if (true) */
1154 mask = 0xf000; /* j */
1156 case BPF_JMP | BPF_JSGT | BPF_K: /* ((s64) dst > (s64) imm) */
1157 mask = 0x2000; /* jh */
1159 case BPF_JMP | BPF_JSGE | BPF_K: /* ((s64) dst >= (s64) imm) */
1160 mask = 0xa000; /* jhe */
1162 case BPF_JMP | BPF_JGT | BPF_K: /* (dst_reg > imm) */
1163 mask = 0x2000; /* jh */
1165 case BPF_JMP | BPF_JGE | BPF_K: /* (dst_reg >= imm) */
1166 mask = 0xa000; /* jhe */
1168 case BPF_JMP | BPF_JNE | BPF_K: /* (dst_reg != imm) */
1169 mask = 0x7000; /* jne */
1171 case BPF_JMP | BPF_JEQ | BPF_K: /* (dst_reg == imm) */
1172 mask = 0x8000; /* je */
1174 case BPF_JMP | BPF_JSET | BPF_K: /* (dst_reg & imm) */
1175 mask = 0x7000; /* jnz */
1176 /* lgfi %w1,imm (load sign extend imm) */
1177 EMIT6_IMM(0xc0010000, REG_W1, imm);
1179 EMIT4(0xb9800000, REG_W1, dst_reg);
1182 case BPF_JMP | BPF_JSGT | BPF_X: /* ((s64) dst > (s64) src) */
1183 mask = 0x2000; /* jh */
1185 case BPF_JMP | BPF_JSGE | BPF_X: /* ((s64) dst >= (s64) src) */
1186 mask = 0xa000; /* jhe */
1188 case BPF_JMP | BPF_JGT | BPF_X: /* (dst > src) */
1189 mask = 0x2000; /* jh */
1191 case BPF_JMP | BPF_JGE | BPF_X: /* (dst >= src) */
1192 mask = 0xa000; /* jhe */
1194 case BPF_JMP | BPF_JNE | BPF_X: /* (dst != src) */
1195 mask = 0x7000; /* jne */
1197 case BPF_JMP | BPF_JEQ | BPF_X: /* (dst == src) */
1198 mask = 0x8000; /* je */
1200 case BPF_JMP | BPF_JSET | BPF_X: /* (dst & src) */
1201 mask = 0x7000; /* jnz */
1202 /* ngrk %w1,%dst,%src */
1203 EMIT4_RRF(0xb9e40000, REG_W1, dst_reg, src_reg);
1206 /* lgfi %w1,imm (load sign extend imm) */
1207 EMIT6_IMM(0xc0010000, REG_W1, imm);
1208 /* cgrj %dst,%w1,mask,off */
1209 EMIT6_PCREL(0xec000000, 0x0064, dst_reg, REG_W1, i, off, mask);
1212 /* lgfi %w1,imm (load sign extend imm) */
1213 EMIT6_IMM(0xc0010000, REG_W1, imm);
1214 /* clgrj %dst,%w1,mask,off */
1215 EMIT6_PCREL(0xec000000, 0x0065, dst_reg, REG_W1, i, off, mask);
1218 /* cgrj %dst,%src,mask,off */
1219 EMIT6_PCREL(0xec000000, 0x0064, dst_reg, src_reg, i, off, mask);
1222 /* clgrj %dst,%src,mask,off */
1223 EMIT6_PCREL(0xec000000, 0x0065, dst_reg, src_reg, i, off, mask);
1226 /* brc mask,jmp_off (branch instruction needs 4 bytes) */
1227 jmp_off = addrs[i + off + 1] - (addrs[i + 1] - 4);
1228 EMIT4_PCREL(0xa7040000 | mask << 8, jmp_off);
1233 case BPF_LD | BPF_ABS | BPF_B: /* b0 = *(u8 *) (skb->data+imm) */
1234 case BPF_LD | BPF_IND | BPF_B: /* b0 = *(u8 *) (skb->data+imm+src) */
1235 if ((BPF_MODE(insn->code) == BPF_ABS) && (imm >= 0))
1236 func_addr = __pa(sk_load_byte_pos);
1238 func_addr = __pa(sk_load_byte);
1240 case BPF_LD | BPF_ABS | BPF_H: /* b0 = *(u16 *) (skb->data+imm) */
1241 case BPF_LD | BPF_IND | BPF_H: /* b0 = *(u16 *) (skb->data+imm+src) */
1242 if ((BPF_MODE(insn->code) == BPF_ABS) && (imm >= 0))
1243 func_addr = __pa(sk_load_half_pos);
1245 func_addr = __pa(sk_load_half);
1247 case BPF_LD | BPF_ABS | BPF_W: /* b0 = *(u32 *) (skb->data+imm) */
1248 case BPF_LD | BPF_IND | BPF_W: /* b0 = *(u32 *) (skb->data+imm+src) */
1249 if ((BPF_MODE(insn->code) == BPF_ABS) && (imm >= 0))
1250 func_addr = __pa(sk_load_word_pos);
1252 func_addr = __pa(sk_load_word);
1255 jit->seen |= SEEN_SKB | SEEN_RET0 | SEEN_FUNC;
1256 REG_SET_SEEN(REG_14); /* Return address of possible func call */
1260 * BPF_REG_6 (R7) : skb pointer
1261 * REG_SKB_DATA (R12): skb data pointer (if no BPF_REG_AX)
1264 * BPF_REG_2 (R3) : offset of byte(s) to fetch in skb
1265 * BPF_REG_5 (R6) : return address
1268 * BPF_REG_0 (R14): data read from skb
1270 * Scratch registers (BPF_REG_1-5)
1273 /* Call function: llilf %w1,func_addr */
1274 EMIT6_IMM(0xc00f0000, REG_W1, func_addr);
1276 /* Offset: lgfi %b2,imm */
1277 EMIT6_IMM(0xc0010000, BPF_REG_2, imm);
1278 if (BPF_MODE(insn->code) == BPF_IND)
1279 /* agfr %b2,%src (%src is s32 here) */
1280 EMIT4(0xb9180000, BPF_REG_2, src_reg);
1282 /* Reload REG_SKB_DATA if BPF_REG_AX is used */
1283 if (jit->seen & SEEN_REG_AX)
1284 /* lg %skb_data,data_off(%b6) */
1285 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_SKB_DATA, REG_0,
1286 BPF_REG_6, offsetof(struct sk_buff, data));
1287 /* basr %b5,%w1 (%b5 is call saved) */
1288 EMIT2(0x0d00, BPF_REG_5, REG_W1);
1291 * Note: For fast access we jump directly after the
1292 * jnz instruction from bpf_jit.S
1295 EMIT4_PCREL(0xa7740000, jit->ret0_ip - jit->prg);
1297 default: /* too complex, give up */
1298 pr_err("Unknown opcode %02x\n", insn->code);
1305 * Compile eBPF program into s390x code
1307 static int bpf_jit_prog(struct bpf_jit *jit, struct bpf_prog *fp)
1311 jit->lit = jit->lit_start;
1314 bpf_jit_prologue(jit);
1315 for (i = 0; i < fp->len; i += insn_count) {
1316 insn_count = bpf_jit_insn(jit, fp, i);
1319 /* Next instruction address */
1320 jit->addrs[i + insn_count] = jit->prg;
1322 bpf_jit_epilogue(jit);
1324 jit->lit_start = jit->prg;
1325 jit->size = jit->lit;
1326 jit->size_prg = jit->prg;
1331 * Classic BPF function stub. BPF programs will be converted into
1332 * eBPF and then bpf_int_jit_compile() will be called.
1334 void bpf_jit_compile(struct bpf_prog *fp)
1339 * Compile eBPF program "fp"
1341 struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *fp)
1343 struct bpf_prog *tmp, *orig_fp = fp;
1344 struct bpf_binary_header *header;
1345 bool tmp_blinded = false;
1349 if (!bpf_jit_enable)
1352 tmp = bpf_jit_blind_constants(fp);
1354 * If blinding was requested and we failed during blinding,
1355 * we must fall back to the interpreter.
1364 memset(&jit, 0, sizeof(jit));
1365 jit.addrs = kcalloc(fp->len + 1, sizeof(*jit.addrs), GFP_KERNEL);
1366 if (jit.addrs == NULL) {
1371 * Three initial passes:
1372 * - 1/2: Determine clobbered registers
1373 * - 3: Calculate program size and addrs arrray
1375 for (pass = 1; pass <= 3; pass++) {
1376 if (bpf_jit_prog(&jit, fp)) {
1382 * Final pass: Allocate and generate program
1384 if (jit.size >= BPF_SIZE_MAX) {
1388 header = bpf_jit_binary_alloc(jit.size, &jit.prg_buf, 2, jit_fill_hole);
1393 if (bpf_jit_prog(&jit, fp)) {
1394 bpf_jit_binary_free(header);
1398 if (bpf_jit_enable > 1) {
1399 bpf_jit_dump(fp->len, jit.size, pass, jit.prg_buf);
1401 print_fn_code(jit.prg_buf, jit.size_prg);
1404 set_memory_ro((unsigned long)header, header->pages);
1405 fp->bpf_func = (void *) jit.prg_buf;
1412 bpf_jit_prog_release_other(fp, fp == orig_fp ?
1420 void bpf_jit_free(struct bpf_prog *fp)
1422 unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK;
1423 struct bpf_binary_header *header = (void *)addr;
1428 set_memory_rw(addr, header->pages);
1429 bpf_jit_binary_free(header);
1432 bpf_prog_unlock_free(fp);