1 /* SPDX-License-Identifier: GPL-2.0 */
6 * TLB flushing on s390 is complicated. The following requirement
7 * from the principles of operation is the most arduous:
9 * "A valid table entry must not be changed while it is attached
10 * to any CPU and may be used for translation by that CPU except to
11 * (1) invalidate the entry by using INVALIDATE PAGE TABLE ENTRY,
12 * or INVALIDATE DAT TABLE ENTRY, (2) alter bits 56-63 of a page
13 * table entry, or (3) make a change by means of a COMPARE AND SWAP
14 * AND PURGE instruction that purges the TLB."
16 * The modification of a pte of an active mm struct therefore is
17 * a two step process: i) invalidate the pte, ii) store the new pte.
18 * This is true for the page protection bit as well.
19 * The only possible optimization is to flush at the beginning of
20 * a tlb_gather_mmu cycle if the mm_struct is currently not in use.
22 * Pages used for the page tables is a different story. FIXME: more
26 #include <linux/pagemap.h>
27 #include <linux/swap.h>
28 #include <asm/processor.h>
29 #include <asm/pgalloc.h>
30 #include <asm/tlbflush.h>
34 struct mmu_table_batch *batch;
36 unsigned long start, end;
39 struct mmu_table_batch {
45 #define MAX_TABLE_BATCH \
46 ((PAGE_SIZE - sizeof(struct mmu_table_batch)) / sizeof(void *))
48 extern void tlb_table_flush(struct mmu_gather *tlb);
49 extern void tlb_remove_table(struct mmu_gather *tlb, void *table);
52 arch_tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm,
53 unsigned long start, unsigned long end)
58 tlb->fullmm = !(start | (end+1));
62 static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
64 __tlb_flush_mm_lazy(tlb->mm);
67 static inline void tlb_flush_mmu_free(struct mmu_gather *tlb)
73 static inline void tlb_flush_mmu(struct mmu_gather *tlb)
75 tlb_flush_mmu_tlbonly(tlb);
76 tlb_flush_mmu_free(tlb);
80 arch_tlb_finish_mmu(struct mmu_gather *tlb,
81 unsigned long start, unsigned long end, bool force)
92 * Release the page cache reference for a pte removed by
93 * tlb_ptep_clear_flush. In both flush modes the tlb for a page cache page
94 * has already been freed, so just do free_page_and_swap_cache.
96 static inline bool __tlb_remove_page(struct mmu_gather *tlb, struct page *page)
98 free_page_and_swap_cache(page);
99 return false; /* avoid calling tlb_flush_mmu */
102 static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
104 free_page_and_swap_cache(page);
107 static inline bool __tlb_remove_page_size(struct mmu_gather *tlb,
108 struct page *page, int page_size)
110 return __tlb_remove_page(tlb, page);
113 static inline void tlb_remove_page_size(struct mmu_gather *tlb,
114 struct page *page, int page_size)
116 return tlb_remove_page(tlb, page);
119 static inline void tlb_flush_pmd_range(struct mmu_gather *tlb,
120 unsigned long address, unsigned long size)
123 * the range might exceed the original range that was provided to
124 * tlb_gather_mmu(), so we need to update it despite the fact it is
125 * usually not updated.
127 if (tlb->start > address)
128 tlb->start = address;
129 if (tlb->end < address + size)
130 tlb->end = address + size;
134 * pte_free_tlb frees a pte table and clears the CRSTE for the
135 * page table from the tlb.
137 static inline void pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
138 unsigned long address)
140 page_table_free_rcu(tlb, (unsigned long *) pte, address);
144 * pmd_free_tlb frees a pmd table and clears the CRSTE for the
145 * segment table entry from the tlb.
146 * If the mm uses a two level page table the single pmd is freed
147 * as the pgd. pmd_free_tlb checks the asce_limit against 2GB
148 * to avoid the double free of the pmd in this case.
150 static inline void pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd,
151 unsigned long address)
153 if (tlb->mm->context.asce_limit <= _REGION3_SIZE)
155 pgtable_pmd_page_dtor(virt_to_page(pmd));
156 tlb_remove_table(tlb, pmd);
160 * p4d_free_tlb frees a pud table and clears the CRSTE for the
161 * region second table entry from the tlb.
162 * If the mm uses a four level page table the single p4d is freed
163 * as the pgd. p4d_free_tlb checks the asce_limit against 8PB
164 * to avoid the double free of the p4d in this case.
166 static inline void p4d_free_tlb(struct mmu_gather *tlb, p4d_t *p4d,
167 unsigned long address)
169 if (tlb->mm->context.asce_limit <= _REGION1_SIZE)
171 tlb_remove_table(tlb, p4d);
175 * pud_free_tlb frees a pud table and clears the CRSTE for the
176 * region third table entry from the tlb.
177 * If the mm uses a three level page table the single pud is freed
178 * as the pgd. pud_free_tlb checks the asce_limit against 4TB
179 * to avoid the double free of the pud in this case.
181 static inline void pud_free_tlb(struct mmu_gather *tlb, pud_t *pud,
182 unsigned long address)
184 if (tlb->mm->context.asce_limit <= _REGION2_SIZE)
186 tlb_remove_table(tlb, pud);
189 #define tlb_start_vma(tlb, vma) do { } while (0)
190 #define tlb_end_vma(tlb, vma) do { } while (0)
191 #define tlb_remove_tlb_entry(tlb, ptep, addr) do { } while (0)
192 #define tlb_remove_pmd_tlb_entry(tlb, pmdp, addr) do { } while (0)
193 #define tlb_migrate_finish(mm) do { } while (0)
194 #define tlb_remove_huge_tlb_entry(h, tlb, ptep, address) \
195 tlb_remove_tlb_entry(tlb, ptep, address)
197 #define tlb_remove_check_page_size_change tlb_remove_check_page_size_change
198 static inline void tlb_remove_check_page_size_change(struct mmu_gather *tlb,
199 unsigned int page_size)
203 #endif /* _S390_TLB_H */