arch/s390/include/asm/nospec-insn.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 #ifndef _ASM_S390_NOSPEC_ASM_H
   3 #define _ASM_S390_NOSPEC_ASM_H
   4
   5 #include <asm/alternative-asm.h>
   6 #include <asm/asm-offsets.h>
   7
   8 #ifdef __ASSEMBLY__
   9
  10 #ifdef CONFIG_EXPOLINE
  11
  12 _LC_BR_R1 = __LC_BR_R1
  13
  14 /*
  15  * The expoline macros are used to create thunks in the same format
  16  * as gcc generates them. The 'comdat' section flag makes sure that
  17  * the various thunks are merged into a single copy.
  18  */
  19         .macro __THUNK_PROLOG_NAME name
  20         .pushsection .text.\name,"axG",@progbits,\name,comdat
  21         .globl \name
  22         .hidden \name
  23         .type \name,@function
  24 \name:
  25         .cfi_startproc
  26         .endm
  27
  28         .macro __THUNK_EPILOG
  29         .cfi_endproc
  30         .popsection
  31         .endm
  32
  33         .macro __THUNK_PROLOG_BR r1,r2
  34         __THUNK_PROLOG_NAME __s390x_indirect_jump_r\r2\()use_r\r1
  35         .endm
  36
  37         .macro __THUNK_PROLOG_BC d0,r1,r2
  38         __THUNK_PROLOG_NAME __s390x_indirect_branch_\d0\()_\r2\()use_\r1
  39         .endm
  40
  41         .macro __THUNK_BR r1,r2
  42         jg      __s390x_indirect_jump_r\r2\()use_r\r1
  43         .endm
  44
  45         .macro __THUNK_BC d0,r1,r2
  46         jg      __s390x_indirect_branch_\d0\()_\r2\()use_\r1
  47         .endm
  48
  49         .macro __THUNK_BRASL r1,r2,r3
  50         brasl   \r1,__s390x_indirect_jump_r\r3\()use_r\r2
  51         .endm
  52
  53         .macro  __DECODE_RR expand,reg,ruse
  54         .set __decode_fail,1
  55         .irp r1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
  56         .ifc \reg,%r\r1
  57         .irp r2,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
  58         .ifc \ruse,%r\r2
  59         \expand \r1,\r2
  60         .set __decode_fail,0
  61         .endif
  62         .endr
  63         .endif
  64         .endr
  65         .if __decode_fail == 1
  66         .error "__DECODE_RR failed"
  67         .endif
  68         .endm
  69
  70         .macro  __DECODE_RRR expand,rsave,rtarget,ruse
  71         .set __decode_fail,1
  72         .irp r1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
  73         .ifc \rsave,%r\r1
  74         .irp r2,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
  75         .ifc \rtarget,%r\r2
  76         .irp r3,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
  77         .ifc \ruse,%r\r3
  78         \expand \r1,\r2,\r3
  79         .set __decode_fail,0
  80         .endif
  81         .endr
  82         .endif
  83         .endr
  84         .endif
  85         .endr
  86         .if __decode_fail == 1
  87         .error "__DECODE_RRR failed"
  88         .endif
  89         .endm
  90
  91         .macro  __DECODE_DRR expand,disp,reg,ruse
  92         .set __decode_fail,1
  93         .irp r1,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
  94         .ifc \reg,%r\r1
  95         .irp r2,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
  96         .ifc \ruse,%r\r2
  97         \expand \disp,\r1,\r2
  98         .set __decode_fail,0
  99         .endif
 100         .endr
 101         .endif
 102         .endr
 103         .if __decode_fail == 1
 104         .error "__DECODE_DRR failed"
 105         .endif
 106         .endm
 107
 108         .macro __THUNK_EX_BR reg,ruse
 109         # Be very careful when adding instructions to this macro!
 110         # The ALTERNATIVE replacement code has a .+10 which targets
 111         # the "br \reg" after the code has been patched.
 112 #ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
 113         exrl    0,555f
 114         j       .
 115 #else
 116         .ifc \reg,%r1
 117         ALTERNATIVE "ex %r0,_LC_BR_R1", ".insn ril,0xc60000000000,0,.+10", 35
 118         j       .
 119         .else
 120         larl    \ruse,555f
 121         ex      0,0(\ruse)
 122         j       .
 123         .endif
 124 #endif
 125 555:    br      \reg
 126         .endm
 127
 128         .macro __THUNK_EX_BC disp,reg,ruse
 129 #ifdef CONFIG_HAVE_MARCH_Z10_FEATURES
 130         exrl    0,556f
 131         j       .
 132 #else
 133         larl    \ruse,556f
 134         ex      0,0(\ruse)
 135         j       .
 136 #endif
 137 556:    b       \disp(\reg)
 138         .endm
 139
 140         .macro GEN_BR_THUNK reg,ruse=%r1
 141         __DECODE_RR __THUNK_PROLOG_BR,\reg,\ruse
 142         __THUNK_EX_BR \reg,\ruse
 143         __THUNK_EPILOG
 144         .endm
 145
 146         .macro GEN_B_THUNK disp,reg,ruse=%r1
 147         __DECODE_DRR __THUNK_PROLOG_BC,\disp,\reg,\ruse
 148         __THUNK_EX_BC \disp,\reg,\ruse
 149         __THUNK_EPILOG
 150         .endm
 151
 152         .macro BR_EX reg,ruse=%r1
 153 557:    __DECODE_RR __THUNK_BR,\reg,\ruse
 154         .pushsection .s390_indirect_branches,"a",@progbits
 155         .long   557b-.
 156         .popsection
 157         .endm
 158
 159          .macro B_EX disp,reg,ruse=%r1
 160 558:    __DECODE_DRR __THUNK_BC,\disp,\reg,\ruse
 161         .pushsection .s390_indirect_branches,"a",@progbits
 162         .long   558b-.
 163         .popsection
 164         .endm
 165
 166         .macro BASR_EX rsave,rtarget,ruse=%r1
 167 559:    __DECODE_RRR __THUNK_BRASL,\rsave,\rtarget,\ruse
 168         .pushsection .s390_indirect_branches,"a",@progbits
 169         .long   559b-.
 170         .popsection
 171         .endm
 172
 173 #else
 174         .macro GEN_BR_THUNK reg,ruse=%r1
 175         .endm
 176
 177         .macro GEN_B_THUNK disp,reg,ruse=%r1
 178         .endm
 179
 180          .macro BR_EX reg,ruse=%r1
 181         br      \reg
 182         .endm
 183
 184          .macro B_EX disp,reg,ruse=%r1
 185         b       \disp(\reg)
 186         .endm
 187
 188         .macro BASR_EX rsave,rtarget,ruse=%r1
 189         basr    \rsave,\rtarget
 190         .endm
 191 #endif
 192
 193 #endif /* __ASSEMBLY__ */
 194
 195 #endif /* _ASM_S390_NOSPEC_ASM_H */