1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Low level function for atomic operations
5 * Copyright IBM Corp. 1999, 2016
8 #ifndef __ARCH_S390_ATOMIC_OPS__
9 #define __ARCH_S390_ATOMIC_OPS__
11 #ifdef CONFIG_HAVE_MARCH_Z196_FEATURES
13 #define __ATOMIC_OP(op_name, op_type, op_string, op_barrier) \
14 static inline op_type op_name(op_type val, op_type *ptr) \
19 op_string " %[old],%[val],%[ptr]\n" \
21 : [old] "=d" (old), [ptr] "+Q" (*ptr) \
22 : [val] "d" (val) : "cc", "memory"); \
26 #define __ATOMIC_OPS(op_name, op_type, op_string) \
27 __ATOMIC_OP(op_name, op_type, op_string, "\n") \
28 __ATOMIC_OP(op_name##_barrier, op_type, op_string, "bcr 14,0\n")
30 __ATOMIC_OPS(__atomic_add, int, "laa")
31 __ATOMIC_OPS(__atomic_and, int, "lan")
32 __ATOMIC_OPS(__atomic_or, int, "lao")
33 __ATOMIC_OPS(__atomic_xor, int, "lax")
35 __ATOMIC_OPS(__atomic64_add, long, "laag")
36 __ATOMIC_OPS(__atomic64_and, long, "lang")
37 __ATOMIC_OPS(__atomic64_or, long, "laog")
38 __ATOMIC_OPS(__atomic64_xor, long, "laxg")
43 #define __ATOMIC_CONST_OP(op_name, op_type, op_string, op_barrier) \
44 static inline void op_name(op_type val, op_type *ptr) \
47 op_string " %[ptr],%[val]\n" \
49 : [ptr] "+Q" (*ptr) : [val] "i" (val) : "cc", "memory");\
52 #define __ATOMIC_CONST_OPS(op_name, op_type, op_string) \
53 __ATOMIC_CONST_OP(op_name, op_type, op_string, "\n") \
54 __ATOMIC_CONST_OP(op_name##_barrier, op_type, op_string, "bcr 14,0\n")
56 __ATOMIC_CONST_OPS(__atomic_add_const, int, "asi")
57 __ATOMIC_CONST_OPS(__atomic64_add_const, long, "agsi")
59 #undef __ATOMIC_CONST_OPS
60 #undef __ATOMIC_CONST_OP
62 #else /* CONFIG_HAVE_MARCH_Z196_FEATURES */
64 #define __ATOMIC_OP(op_name, op_string) \
65 static inline int op_name(int val, int *ptr) \
70 "0: lr %[new],%[old]\n" \
71 op_string " %[new],%[val]\n" \
72 " cs %[old],%[new],%[ptr]\n" \
74 : [old] "=d" (old), [new] "=&d" (new), [ptr] "+Q" (*ptr)\
75 : [val] "d" (val), "0" (*ptr) : "cc", "memory"); \
79 #define __ATOMIC_OPS(op_name, op_string) \
80 __ATOMIC_OP(op_name, op_string) \
81 __ATOMIC_OP(op_name##_barrier, op_string)
83 __ATOMIC_OPS(__atomic_add, "ar")
84 __ATOMIC_OPS(__atomic_and, "nr")
85 __ATOMIC_OPS(__atomic_or, "or")
86 __ATOMIC_OPS(__atomic_xor, "xr")
90 #define __ATOMIC64_OP(op_name, op_string) \
91 static inline long op_name(long val, long *ptr) \
96 "0: lgr %[new],%[old]\n" \
97 op_string " %[new],%[val]\n" \
98 " csg %[old],%[new],%[ptr]\n" \
100 : [old] "=d" (old), [new] "=&d" (new), [ptr] "+Q" (*ptr)\
101 : [val] "d" (val), "0" (*ptr) : "cc", "memory"); \
105 #define __ATOMIC64_OPS(op_name, op_string) \
106 __ATOMIC64_OP(op_name, op_string) \
107 __ATOMIC64_OP(op_name##_barrier, op_string)
109 __ATOMIC64_OPS(__atomic64_add, "agr")
110 __ATOMIC64_OPS(__atomic64_and, "ngr")
111 __ATOMIC64_OPS(__atomic64_or, "ogr")
112 __ATOMIC64_OPS(__atomic64_xor, "xgr")
114 #undef __ATOMIC64_OPS
116 #define __atomic_add_const(val, ptr) __atomic_add(val, ptr)
117 #define __atomic_add_const_barrier(val, ptr) __atomic_add(val, ptr)
118 #define __atomic64_add_const(val, ptr) __atomic64_add(val, ptr)
119 #define __atomic64_add_const_barrier(val, ptr) __atomic64_add(val, ptr)
121 #endif /* CONFIG_HAVE_MARCH_Z196_FEATURES */
123 static inline int __atomic_cmpxchg(int *ptr, int old, int new)
125 return __sync_val_compare_and_swap(ptr, old, new);
128 static inline int __atomic_cmpxchg_bool(int *ptr, int old, int new)
130 return __sync_bool_compare_and_swap(ptr, old, new);
133 static inline long __atomic64_cmpxchg(long *ptr, long old, long new)
135 return __sync_val_compare_and_swap(ptr, old, new);
138 static inline long __atomic64_cmpxchg_bool(long *ptr, long old, long new)
140 return __sync_bool_compare_and_swap(ptr, old, new);
143 #endif /* __ARCH_S390_ATOMIC_OPS__ */