1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Adjunct processor (AP) interfaces
5 * Copyright IBM Corp. 2017
7 * Author(s): Tony Krowiak <akrowia@linux.vnet.ibm.com>
8 * Martin Schwidefsky <schwidefsky@de.ibm.com>
9 * Harald Freudenberger <freude@de.ibm.com>
12 #ifndef _ASM_S390_AP_H_
13 #define _ASM_S390_AP_H_
16 * The ap_qid_t identifier of an ap queue.
17 * If the AP facilities test (APFT) facility is available,
18 * card and queue index are 8 bit values, otherwise
19 * card index is 6 bit and queue index a 4 bit value.
21 typedef unsigned int ap_qid_t;
23 #define AP_MKQID(_card, _queue) (((_card) & 0xff) << 8 | ((_queue) & 0xff))
24 #define AP_QID_CARD(_qid) (((_qid) >> 8) & 0xff)
25 #define AP_QID_QUEUE(_qid) ((_qid) & 0xff)
28 * struct ap_queue_status - Holds the AP queue status.
29 * @queue_empty: Shows if queue is empty
30 * @replies_waiting: Waiting replies
31 * @queue_full: Is 1 if the queue is full
32 * @irq_enabled: Shows if interrupts are enabled for the AP
33 * @response_code: Holds the 8 bit response code
35 * The ap queue status word is returned by all three AP functions
36 * (PQAP, NQAP and DQAP). There's a set of flags in the first
37 * byte, followed by a 1 byte response code.
39 struct ap_queue_status {
40 unsigned int queue_empty : 1;
41 unsigned int replies_waiting : 1;
42 unsigned int queue_full : 1;
43 unsigned int _pad1 : 4;
44 unsigned int irq_enabled : 1;
45 unsigned int response_code : 8;
46 unsigned int _pad2 : 16;
50 * ap_intructions_available() - Test if AP instructions are available.
52 * Returns true if the AP instructions are installed, otherwise false.
54 static inline bool ap_instructions_available(void)
56 unsigned long reg0 = AP_MKQID(0, 0);
57 unsigned long reg1 = 0;
60 " lgr 0,%[reg0]\n" /* qid into gr0 */
61 " lghi 1,0\n" /* 0 into gr1 */
62 " lghi 2,0\n" /* 0 into gr2 */
63 " .long 0xb2af0000\n" /* PQAP(TAPQ) */
64 "0: la %[reg1],1\n" /* 1 into reg1 */
69 : "cc", "0", "1", "2");
74 * ap_tapq(): Test adjunct processor queue.
75 * @qid: The AP queue number
76 * @info: Pointer to queue descriptor
78 * Returns AP queue status structure.
80 static inline struct ap_queue_status ap_tapq(ap_qid_t qid, unsigned long *info)
82 struct ap_queue_status reg1;
86 " lgr 0,%[qid]\n" /* qid into gr0 */
87 " lghi 2,0\n" /* 0 into gr2 */
88 " .long 0xb2af0000\n" /* PQAP(TAPQ) */
89 " lgr %[reg1],1\n" /* gr1 (status) into reg1 */
90 " lgr %[reg2],2\n" /* gr2 into reg2 */
91 : [reg1] "=&d" (reg1), [reg2] "=&d" (reg2)
93 : "cc", "0", "1", "2");
100 * ap_test_queue(): Test adjunct processor queue.
101 * @qid: The AP queue number
102 * @tbit: Test facilities bit
103 * @info: Pointer to queue descriptor
105 * Returns AP queue status structure.
107 static inline struct ap_queue_status ap_test_queue(ap_qid_t qid,
112 qid |= 1UL << 23; /* set T bit*/
113 return ap_tapq(qid, info);
117 * ap_pqap_rapq(): Reset adjunct processor queue.
118 * @qid: The AP queue number
120 * Returns AP queue status structure.
122 static inline struct ap_queue_status ap_rapq(ap_qid_t qid)
124 unsigned long reg0 = qid | (1UL << 24); /* fc 1UL is RAPQ */
125 struct ap_queue_status reg1;
128 " lgr 0,%[reg0]\n" /* qid arg into gr0 */
129 " .long 0xb2af0000\n" /* PQAP(RAPQ) */
130 " lgr %[reg1],1\n" /* gr1 (status) into reg1 */
131 : [reg1] "=&d" (reg1)
138 * ap_pqap_zapq(): Reset and zeroize adjunct processor queue.
139 * @qid: The AP queue number
141 * Returns AP queue status structure.
143 static inline struct ap_queue_status ap_zapq(ap_qid_t qid)
145 unsigned long reg0 = qid | (2UL << 24); /* fc 2UL is ZAPQ */
146 struct ap_queue_status reg1;
149 " lgr 0,%[reg0]\n" /* qid arg into gr0 */
150 " .long 0xb2af0000\n" /* PQAP(ZAPQ) */
151 " lgr %[reg1],1\n" /* gr1 (status) into reg1 */
152 : [reg1] "=&d" (reg1)
159 * struct ap_config_info - convenience struct for AP crypto
160 * config info as returned by the ap_qci() function.
162 struct ap_config_info {
163 unsigned int apsc : 1; /* S bit */
164 unsigned int apxa : 1; /* N bit */
165 unsigned int qact : 1; /* C bit */
166 unsigned int rc8a : 1; /* R bit */
167 unsigned char _reserved1 : 4;
168 unsigned char _reserved2[3];
169 unsigned char Na; /* max # of APs - 1 */
170 unsigned char Nd; /* max # of Domains - 1 */
171 unsigned char _reserved3[10];
172 unsigned int apm[8]; /* AP ID mask */
173 unsigned int aqm[8]; /* AP (usage) queue mask */
174 unsigned int adm[8]; /* AP (control) domain mask */
175 unsigned char _reserved4[16];
179 * ap_qci(): Get AP configuration data
181 * Returns 0 on success, or -EOPNOTSUPP.
183 static inline int ap_qci(struct ap_config_info *config)
185 unsigned long reg0 = 4UL << 24; /* fc 4UL is QCI */
186 unsigned long reg1 = -EOPNOTSUPP;
187 struct ap_config_info *reg2 = config;
190 " lgr 0,%[reg0]\n" /* QCI fc into gr0 */
191 " lgr 2,%[reg2]\n" /* ptr to config into gr2 */
192 " .long 0xb2af0000\n" /* PQAP(QCI) */
193 "0: la %[reg1],0\n" /* good case, QCI fc available */
196 : [reg1] "+&d" (reg1)
197 : [reg0] "d" (reg0), [reg2] "d" (reg2)
198 : "cc", "memory", "0", "2");
204 * struct ap_qirq_ctrl - convenient struct for easy invocation
205 * of the ap_aqic() function. This struct is passed as GR1
206 * parameter to the PQAP(AQIC) instruction. For details please
207 * see the AR documentation.
209 struct ap_qirq_ctrl {
210 unsigned int _res1 : 8;
211 unsigned int zone : 8; /* zone info */
212 unsigned int ir : 1; /* ir flag: enable (1) or disable (0) irq */
213 unsigned int _res2 : 4;
214 unsigned int gisc : 3; /* guest isc field */
215 unsigned int _res3 : 6;
216 unsigned int gf : 2; /* gisa format */
217 unsigned int _res4 : 1;
218 unsigned int gisa : 27; /* gisa origin */
219 unsigned int _res5 : 1;
220 unsigned int isc : 3; /* irq sub class */
224 * ap_aqic(): Control interruption for a specific AP.
225 * @qid: The AP queue number
226 * @qirqctrl: struct ap_qirq_ctrl (64 bit value)
227 * @ind: The notification indicator byte
229 * Returns AP queue status.
231 static inline struct ap_queue_status ap_aqic(ap_qid_t qid,
232 struct ap_qirq_ctrl qirqctrl,
235 unsigned long reg0 = qid | (3UL << 24); /* fc 3UL is AQIC */
238 struct ap_qirq_ctrl qirqctrl;
241 struct ap_queue_status status;
246 reg1.qirqctrl = qirqctrl;
249 " lgr 0,%[reg0]\n" /* qid param into gr0 */
250 " lgr 1,%[reg1]\n" /* irq ctrl into gr1 */
251 " lgr 2,%[reg2]\n" /* ni addr into gr2 */
252 " .long 0xb2af0000\n" /* PQAP(AQIC) */
253 " lgr %[reg1],1\n" /* gr1 (status) into reg1 */
254 : [reg1] "+&d" (reg1)
255 : [reg0] "d" (reg0), [reg2] "d" (reg2)
256 : "cc", "memory", "0", "1", "2");
262 * union ap_qact_ap_info - used together with the
263 * ap_aqic() function to provide a convenient way
264 * to handle the ap info needed by the qact function.
266 union ap_qact_ap_info {
270 unsigned int mode : 3;
272 unsigned int cat : 8;
274 unsigned char ver[2];
279 * ap_qact(): Query AP combatibility type.
280 * @qid: The AP queue number
281 * @apinfo: On input the info about the AP queue. On output the
282 * alternate AP queue info provided by the qact function
283 * in GR2 is stored in.
285 * Returns AP queue status. Check response_code field for failures.
287 static inline struct ap_queue_status ap_qact(ap_qid_t qid, int ifbit,
288 union ap_qact_ap_info *apinfo)
290 unsigned long reg0 = qid | (5UL << 24) | ((ifbit & 0x01) << 22);
295 struct ap_queue_status status;
300 reg1.value = apinfo->val;
303 " lgr 0,%[reg0]\n" /* qid param into gr0 */
304 " lgr 1,%[reg1]\n" /* qact in info into gr1 */
305 " .long 0xb2af0000\n" /* PQAP(QACT) */
306 " lgr %[reg1],1\n" /* gr1 (status) into reg1 */
307 " lgr %[reg2],2\n" /* qact out info into reg2 */
308 : [reg1] "+&d" (reg1), [reg2] "=&d" (reg2)
310 : "cc", "0", "1", "2");
316 * ap_nqap(): Send message to adjunct processor queue.
317 * @qid: The AP queue number
318 * @psmid: The program supplied message identifier
319 * @msg: The message text
320 * @length: The message length
322 * Returns AP queue status structure.
323 * Condition code 1 on NQAP can't happen because the L bit is 1.
324 * Condition code 2 on NQAP also means the send is incomplete,
325 * because a segment boundary was reached. The NQAP is repeated.
327 static inline struct ap_queue_status ap_nqap(ap_qid_t qid,
328 unsigned long long psmid,
329 void *msg, size_t length)
331 unsigned long reg0 = qid | 0x40000000UL; /* 0x4... is last msg part */
332 union register_pair nqap_r1, nqap_r2;
333 struct ap_queue_status reg1;
335 nqap_r1.even = (unsigned int)(psmid >> 32);
336 nqap_r1.odd = psmid & 0xffffffff;
337 nqap_r2.even = (unsigned long)msg;
338 nqap_r2.odd = (unsigned long)length;
341 " lgr 0,%[reg0]\n" /* qid param in gr0 */
342 "0: .insn rre,0xb2ad0000,%[nqap_r1],%[nqap_r2]\n"
343 " brc 2,0b\n" /* handle partial completion */
344 " lgr %[reg1],1\n" /* gr1 (status) into reg1 */
345 : [reg0] "+&d" (reg0), [reg1] "=&d" (reg1),
346 [nqap_r2] "+&d" (nqap_r2.pair)
347 : [nqap_r1] "d" (nqap_r1.pair)
348 : "cc", "memory", "0", "1");
353 * ap_dqap(): Receive message from adjunct processor queue.
354 * @qid: The AP queue number
355 * @psmid: Pointer to program supplied message identifier
356 * @msg: The message text
357 * @length: The message length
358 * @reslength: Resitual length on return
359 * @resgr0: input: gr0 value (only used if != 0), output: resitual gr0 content
361 * Returns AP queue status structure.
362 * Condition code 1 on DQAP means the receive has taken place
363 * but only partially. The response is incomplete, hence the
365 * Condition code 2 on DQAP also means the receive is incomplete,
366 * this time because a segment boundary was reached. Again, the
368 * Note that gpr2 is used by the DQAP instruction to keep track of
369 * any 'residual' length, in case the instruction gets interrupted.
370 * Hence it gets zeroed before the instruction.
371 * If the message does not fit into the buffer, this function will
372 * return with a truncated message and the reply in the firmware queue
373 * is not removed. This is indicated to the caller with an
374 * ap_queue_status response_code value of all bits on (0xFF) and (if
375 * the reslength ptr is given) the remaining length is stored in
376 * *reslength and (if the resgr0 ptr is given) the updated gr0 value
377 * for further processing of this msg entry is stored in *resgr0. The
378 * caller needs to detect this situation and should invoke ap_dqap
379 * with a valid resgr0 ptr and a value in there != 0 to indicate that
380 * *resgr0 is to be used instead of qid to further process this entry.
382 static inline struct ap_queue_status ap_dqap(ap_qid_t qid,
383 unsigned long long *psmid,
384 void *msg, size_t length,
386 unsigned long *resgr0)
388 unsigned long reg0 = resgr0 && *resgr0 ? *resgr0 : qid | 0x80000000UL;
389 struct ap_queue_status reg1;
391 union register_pair rp1, rp2;
395 rp2.even = (unsigned long)msg;
396 rp2.odd = (unsigned long)length;
399 " lgr 0,%[reg0]\n" /* qid param into gr0 */
400 " lghi 2,0\n" /* 0 into gr2 (res length) */
401 "0: ltgr %N[rp2],%N[rp2]\n" /* check buf len */
402 " jz 2f\n" /* go out if buf len is 0 */
403 "1: .insn rre,0xb2ae0000,%[rp1],%[rp2]\n"
404 " brc 6,0b\n" /* handle partial complete */
405 "2: lgr %[reg0],0\n" /* gr0 (qid + info) into reg0 */
406 " lgr %[reg1],1\n" /* gr1 (status) into reg1 */
407 " lgr %[reg2],2\n" /* gr2 (res length) into reg2 */
408 : [reg0] "+&d" (reg0), [reg1] "=&d" (reg1), [reg2] "=&d" (reg2),
409 [rp1] "+&d" (rp1.pair), [rp2] "+&d" (rp2.pair)
411 : "cc", "memory", "0", "1", "2");
415 if (reg2 != 0 && rp2.odd == 0) {
417 * Partially complete, status in gr1 is not set.
418 * Signal the caller that this dqap is only partially received
419 * with a special status response code 0xFF and *resgr0 updated
421 reg1.response_code = 0xFF;
425 *psmid = (((unsigned long long)rp1.even) << 32) + rp1.odd;
434 * Interface to tell the AP bus code that a configuration
435 * change has happened. The bus code should at least do
436 * an ap bus resource rescan.
438 #if IS_ENABLED(CONFIG_ZCRYPT)
439 void ap_bus_cfg_chg(void);
441 static inline void ap_bus_cfg_chg(void){}
444 #endif /* _ASM_S390_AP_H_ */