1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2021 Western Digital Corporation or its affiliates.
6 * Atish Patra <atish.patra@wdc.com>
9 #include <linux/errno.h>
10 #include <linux/err.h>
11 #include <linux/kvm_host.h>
13 #include <asm/kvm_vcpu_timer.h>
14 #include <asm/kvm_vcpu_sbi.h>
16 static int kvm_sbi_ext_v01_handler(struct kvm_vcpu *vcpu, struct kvm_run *run,
17 struct kvm_vcpu_sbi_return *retdata)
22 struct kvm_vcpu *rvcpu;
23 struct kvm *kvm = vcpu->kvm;
24 struct kvm_cpu_context *cp = &vcpu->arch.guest_context;
25 struct kvm_cpu_trap *utrap = retdata->utrap;
28 case SBI_EXT_0_1_CONSOLE_GETCHAR:
29 case SBI_EXT_0_1_CONSOLE_PUTCHAR:
31 * The CONSOLE_GETCHAR/CONSOLE_PUTCHAR SBI calls cannot be
32 * handled in kernel so we forward these to user-space
34 kvm_riscv_vcpu_sbi_forward(vcpu, run);
35 retdata->uexit = true;
37 case SBI_EXT_0_1_SET_TIMER:
38 #if __riscv_xlen == 32
39 next_cycle = ((u64)cp->a1 << 32) | (u64)cp->a0;
41 next_cycle = (u64)cp->a0;
43 ret = kvm_riscv_vcpu_timer_next_event(vcpu, next_cycle);
45 case SBI_EXT_0_1_CLEAR_IPI:
46 ret = kvm_riscv_vcpu_unset_interrupt(vcpu, IRQ_VS_SOFT);
48 case SBI_EXT_0_1_SEND_IPI:
50 hmask = kvm_riscv_vcpu_unpriv_read(vcpu, false, cp->a0, utrap);
52 hmask = (1UL << atomic_read(&kvm->online_vcpus)) - 1;
56 for_each_set_bit(i, &hmask, BITS_PER_LONG) {
57 rvcpu = kvm_get_vcpu_by_id(vcpu->kvm, i);
58 ret = kvm_riscv_vcpu_set_interrupt(rvcpu, IRQ_VS_SOFT);
63 case SBI_EXT_0_1_SHUTDOWN:
64 kvm_riscv_vcpu_sbi_system_reset(vcpu, run,
65 KVM_SYSTEM_EVENT_SHUTDOWN, 0);
66 retdata->uexit = true;
68 case SBI_EXT_0_1_REMOTE_FENCE_I:
69 case SBI_EXT_0_1_REMOTE_SFENCE_VMA:
70 case SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID:
72 hmask = kvm_riscv_vcpu_unpriv_read(vcpu, false, cp->a0, utrap);
74 hmask = (1UL << atomic_read(&kvm->online_vcpus)) - 1;
78 if (cp->a7 == SBI_EXT_0_1_REMOTE_FENCE_I)
79 kvm_riscv_fence_i(vcpu->kvm, 0, hmask);
80 else if (cp->a7 == SBI_EXT_0_1_REMOTE_SFENCE_VMA) {
81 if (cp->a1 == 0 && cp->a2 == 0)
82 kvm_riscv_hfence_vvma_all(vcpu->kvm,
85 kvm_riscv_hfence_vvma_gva(vcpu->kvm,
90 if (cp->a1 == 0 && cp->a2 == 0)
91 kvm_riscv_hfence_vvma_asid_all(vcpu->kvm,
95 kvm_riscv_hfence_vvma_asid_gva(vcpu->kvm,
103 retdata->err_val = SBI_ERR_NOT_SUPPORTED;
110 const struct kvm_vcpu_sbi_extension vcpu_sbi_ext_v01 = {
111 .extid_start = SBI_EXT_0_1_SET_TIMER,
112 .extid_end = SBI_EXT_0_1_SHUTDOWN,
113 .handler = kvm_sbi_ext_v01_handler,