1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2019 Western Digital Corporation or its affiliates.
6 * Anup Patel <anup.patel@wdc.com>
9 #include <linux/errno.h>
10 #include <linux/err.h>
11 #include <linux/module.h>
12 #include <linux/kvm_host.h>
14 #include <asm/hwcap.h>
17 long kvm_arch_dev_ioctl(struct file *filp,
18 unsigned int ioctl, unsigned long arg)
23 int kvm_arch_check_processor_compat(void *opaque)
28 int kvm_arch_hardware_setup(void *opaque)
33 int kvm_arch_hardware_enable(void)
35 unsigned long hideleg, hedeleg;
38 hedeleg |= (1UL << EXC_INST_MISALIGNED);
39 hedeleg |= (1UL << EXC_BREAKPOINT);
40 hedeleg |= (1UL << EXC_SYSCALL);
41 hedeleg |= (1UL << EXC_INST_PAGE_FAULT);
42 hedeleg |= (1UL << EXC_LOAD_PAGE_FAULT);
43 hedeleg |= (1UL << EXC_STORE_PAGE_FAULT);
44 csr_write(CSR_HEDELEG, hedeleg);
47 hideleg |= (1UL << IRQ_VS_SOFT);
48 hideleg |= (1UL << IRQ_VS_TIMER);
49 hideleg |= (1UL << IRQ_VS_EXT);
50 csr_write(CSR_HIDELEG, hideleg);
52 csr_write(CSR_HCOUNTEREN, -1UL);
54 csr_write(CSR_HVIP, 0);
59 void kvm_arch_hardware_disable(void)
62 * After clearing the hideleg CSR, the host kernel will receive
63 * spurious interrupts if hvip CSR has pending interrupts and the
64 * corresponding enable bits in vsie CSR are asserted. To avoid it,
65 * hvip CSR and vsie CSR must be cleared before clearing hideleg CSR.
67 csr_write(CSR_VSIE, 0);
68 csr_write(CSR_HVIP, 0);
69 csr_write(CSR_HEDELEG, 0);
70 csr_write(CSR_HIDELEG, 0);
73 int kvm_arch_init(void *opaque)
77 if (!riscv_isa_extension_available(NULL, h)) {
78 kvm_info("hypervisor extension not available\n");
82 if (sbi_spec_is_0_1()) {
83 kvm_info("require SBI v0.2 or higher\n");
87 if (!sbi_probe_extension(SBI_EXT_RFENCE)) {
88 kvm_info("require SBI RFENCE extension\n");
92 kvm_riscv_gstage_mode_detect();
94 kvm_riscv_gstage_vmid_detect();
96 kvm_info("hypervisor extension available\n");
98 switch (kvm_riscv_gstage_mode()) {
99 case HGATP_MODE_SV32X4:
102 case HGATP_MODE_SV39X4:
105 case HGATP_MODE_SV48X4:
108 case HGATP_MODE_SV57X4:
114 kvm_info("using %s G-stage page table format\n", str);
116 kvm_info("VMID %ld bits available\n", kvm_riscv_gstage_vmid_bits());
121 void kvm_arch_exit(void)
125 static int __init riscv_kvm_init(void)
127 return kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE);
129 module_init(riscv_kvm_init);