1 // SPDX-License-Identifier: GPL-2.0-only
3 * The hwprobe interface, for allowing userspace to probe to see which features
4 * are supported by the hardware. See Documentation/arch/riscv/hwprobe.rst for
7 #include <linux/syscalls.h>
8 #include <asm/cacheflush.h>
9 #include <asm/cpufeature.h>
10 #include <asm/hwprobe.h>
12 #include <asm/switch_to.h>
13 #include <asm/uaccess.h>
14 #include <asm/unistd.h>
15 #include <asm/vector.h>
16 #include <vdso/vsyscall.h>
19 static void hwprobe_arch_id(struct riscv_hwprobe *pair,
20 const struct cpumask *cpus)
26 for_each_cpu(cpu, cpus) {
30 case RISCV_HWPROBE_KEY_MVENDORID:
31 cpu_id = riscv_cached_mvendorid(cpu);
33 case RISCV_HWPROBE_KEY_MIMPID:
34 cpu_id = riscv_cached_mimpid(cpu);
36 case RISCV_HWPROBE_KEY_MARCHID:
37 cpu_id = riscv_cached_marchid(cpu);
47 * If there's a mismatch for the given set, return -1 in the
59 static void hwprobe_isa_ext0(struct riscv_hwprobe *pair,
60 const struct cpumask *cpus)
67 pair->value |= RISCV_HWPROBE_IMA_FD;
69 if (riscv_isa_extension_available(NULL, c))
70 pair->value |= RISCV_HWPROBE_IMA_C;
73 pair->value |= RISCV_HWPROBE_IMA_V;
76 * Loop through and record extensions that 1) anyone has, and 2) anyone
79 for_each_cpu(cpu, cpus) {
80 struct riscv_isainfo *isainfo = &hart_isa[cpu];
82 #define EXT_KEY(ext) \
84 if (__riscv_isa_extension_available(isainfo->isa, RISCV_ISA_EXT_##ext)) \
85 pair->value |= RISCV_HWPROBE_EXT_##ext; \
87 missing |= RISCV_HWPROBE_EXT_##ext; \
91 * Only use EXT_KEY() for extensions which can be exposed to userspace,
92 * regardless of the kernel's configuration, as no other checks, besides
93 * presence in the hart_isa bitmap, are made.
138 /* Now turn off reporting features if any CPU is missing it. */
139 pair->value &= ~missing;
142 static bool hwprobe_ext0_has(const struct cpumask *cpus, unsigned long ext)
144 struct riscv_hwprobe pair;
146 hwprobe_isa_ext0(&pair, cpus);
147 return (pair.value & ext);
150 static u64 hwprobe_misaligned(const struct cpumask *cpus)
155 for_each_cpu(cpu, cpus) {
156 int this_perf = per_cpu(misaligned_access_speed, cpu);
161 if (perf != this_perf) {
162 perf = RISCV_HWPROBE_MISALIGNED_UNKNOWN;
168 return RISCV_HWPROBE_MISALIGNED_UNKNOWN;
173 static void hwprobe_one_pair(struct riscv_hwprobe *pair,
174 const struct cpumask *cpus)
177 case RISCV_HWPROBE_KEY_MVENDORID:
178 case RISCV_HWPROBE_KEY_MARCHID:
179 case RISCV_HWPROBE_KEY_MIMPID:
180 hwprobe_arch_id(pair, cpus);
183 * The kernel already assumes that the base single-letter ISA
184 * extensions are supported on all harts, and only supports the
185 * IMA base, so just cheat a bit here and tell that to
188 case RISCV_HWPROBE_KEY_BASE_BEHAVIOR:
189 pair->value = RISCV_HWPROBE_BASE_BEHAVIOR_IMA;
192 case RISCV_HWPROBE_KEY_IMA_EXT_0:
193 hwprobe_isa_ext0(pair, cpus);
196 case RISCV_HWPROBE_KEY_CPUPERF_0:
197 pair->value = hwprobe_misaligned(cpus);
200 case RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE:
202 if (hwprobe_ext0_has(cpus, RISCV_HWPROBE_EXT_ZICBOZ))
203 pair->value = riscv_cboz_block_size;
207 * For forward compatibility, unknown keys don't fail the whole
208 * call, but get their element key set to -1 and value set to 0
209 * indicating they're unrecognized.
218 static int hwprobe_get_values(struct riscv_hwprobe __user *pairs,
219 size_t pair_count, size_t cpusetsize,
220 unsigned long __user *cpus_user,
227 /* Check the reserved flags. */
232 * The interface supports taking in a CPU mask, and returns values that
233 * are consistent across that mask. Allow userspace to specify NULL and
234 * 0 as a shortcut to all online CPUs.
236 cpumask_clear(&cpus);
237 if (!cpusetsize && !cpus_user) {
238 cpumask_copy(&cpus, cpu_online_mask);
240 if (cpusetsize > cpumask_size())
241 cpusetsize = cpumask_size();
243 ret = copy_from_user(&cpus, cpus_user, cpusetsize);
248 * Userspace must provide at least one online CPU, without that
249 * there's no way to define what is supported.
251 cpumask_and(&cpus, &cpus, cpu_online_mask);
252 if (cpumask_empty(&cpus))
256 for (out = 0; out < pair_count; out++, pairs++) {
257 struct riscv_hwprobe pair;
259 if (get_user(pair.key, &pairs->key))
263 hwprobe_one_pair(&pair, &cpus);
264 ret = put_user(pair.key, &pairs->key);
266 ret = put_user(pair.value, &pairs->value);
275 static int hwprobe_get_cpus(struct riscv_hwprobe __user *pairs,
276 size_t pair_count, size_t cpusetsize,
277 unsigned long __user *cpus_user,
280 cpumask_t cpus, one_cpu;
281 bool clear_all = false;
285 if (flags != RISCV_HWPROBE_WHICH_CPUS)
288 if (!cpusetsize || !cpus_user)
291 if (cpusetsize > cpumask_size())
292 cpusetsize = cpumask_size();
294 ret = copy_from_user(&cpus, cpus_user, cpusetsize);
298 if (cpumask_empty(&cpus))
299 cpumask_copy(&cpus, cpu_online_mask);
301 cpumask_and(&cpus, &cpus, cpu_online_mask);
303 cpumask_clear(&one_cpu);
305 for (i = 0; i < pair_count; i++) {
306 struct riscv_hwprobe pair, tmp;
309 ret = copy_from_user(&pair, &pairs[i], sizeof(pair));
313 if (!riscv_hwprobe_key_is_valid(pair.key)) {
315 pair = (struct riscv_hwprobe){ .key = -1, };
316 ret = copy_to_user(&pairs[i], &pair, sizeof(pair));
324 tmp = (struct riscv_hwprobe){ .key = pair.key, };
326 for_each_cpu(cpu, &cpus) {
327 cpumask_set_cpu(cpu, &one_cpu);
329 hwprobe_one_pair(&tmp, &one_cpu);
331 if (!riscv_hwprobe_pair_cmp(&tmp, &pair))
332 cpumask_clear_cpu(cpu, &cpus);
334 cpumask_clear_cpu(cpu, &one_cpu);
339 cpumask_clear(&cpus);
341 ret = copy_to_user(cpus_user, &cpus, cpusetsize);
348 static int do_riscv_hwprobe(struct riscv_hwprobe __user *pairs,
349 size_t pair_count, size_t cpusetsize,
350 unsigned long __user *cpus_user,
353 if (flags & RISCV_HWPROBE_WHICH_CPUS)
354 return hwprobe_get_cpus(pairs, pair_count, cpusetsize,
357 return hwprobe_get_values(pairs, pair_count, cpusetsize,
363 static int __init init_hwprobe_vdso_data(void)
365 struct vdso_data *vd = __arch_get_k_vdso_data();
366 struct arch_vdso_data *avd = &vd->arch_data;
368 struct riscv_hwprobe pair;
372 * Initialize vDSO data with the answers for the "all CPUs" case, to
373 * save a syscall in the common case.
375 for (key = 0; key <= RISCV_HWPROBE_MAX_KEY; key++) {
377 hwprobe_one_pair(&pair, cpu_online_mask);
379 WARN_ON_ONCE(pair.key < 0);
381 avd->all_cpu_hwprobe_values[key] = pair.value;
383 * Smash together the vendor, arch, and impl IDs to see if
384 * they're all 0 or any negative.
386 if (key <= RISCV_HWPROBE_KEY_MIMPID)
387 id_bitsmash |= pair.value;
391 * If the arch, vendor, and implementation ID are all the same across
392 * all harts, then assume all CPUs are the same, and allow the vDSO to
393 * answer queries for arbitrary masks. However if all values are 0 (not
394 * populated) or any value returns -1 (varies across CPUs), then the
395 * vDSO should defer to the kernel for exotic cpu masks.
397 avd->homogeneous_cpus = id_bitsmash != 0 && id_bitsmash != -1;
401 arch_initcall_sync(init_hwprobe_vdso_data);
403 #endif /* CONFIG_MMU */
405 SYSCALL_DEFINE5(riscv_hwprobe, struct riscv_hwprobe __user *, pairs,
406 size_t, pair_count, size_t, cpusetsize, unsigned long __user *,
407 cpus, unsigned int, flags)
409 return do_riscv_hwprobe(pairs, pair_count, cpusetsize,