1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2012 Regents of the University of California
6 #include <asm/asm-offsets.h>
8 #include <linux/init.h>
9 #include <linux/linkage.h>
10 #include <asm/thread_info.h>
12 #include <asm/pgtable.h>
14 #include <asm/cpu_ops_sbi.h>
15 #include <asm/hwcap.h>
16 #include <asm/image.h>
17 #include <asm/xip_fixup.h>
18 #include "efi-header.S"
23 * Image header expected by Linux boot-loaders. The image header data
24 * structure is described in asm/image.h.
25 * Do not modify it without modifying the structure and all bootloaders
26 * that expects this header format!!
30 * This instruction decodes to "MZ" ASCII required by UEFI.
35 /* jump to start kernel */
41 #ifdef CONFIG_RISCV_M_MODE
42 /* Image load offset (0MB) from start of RAM for M-mode */
45 #if __riscv_xlen == 64
46 /* Image load offset(2MB) from start of RAM */
49 /* Image load offset(4MB) from start of RAM */
53 /* Effective size of kernel image */
56 .word RISCV_HEADER_VERSION
59 .ascii RISCV_IMAGE_MAGIC
61 .ascii RISCV_IMAGE_MAGIC2
63 .word pe_head_start - _start
73 .global relocate_enable_mmu
75 /* Relocate return address */
78 REG_L a1, KERNEL_MAP_VIRT_ADDR(a1)
83 /* Point stvec to virtual address of intruction after satp write */
88 /* Compute satp for kernel page tables, but don't load it yet */
89 srl a2, a0, PAGE_SHIFT
95 * Load trampoline page directory, which will cause us to trap to
96 * stvec if VA != PA, or simply fall through if VA == PA. We need a
97 * full fence here because setup_vm() just wrote these PTEs and we need
98 * to ensure the new translations are in use.
100 la a0, trampoline_pg_dir
102 srl a0, a0, PAGE_SHIFT
108 /* Set trap vector to spin forever to help debug */
109 la a0, .Lsecondary_park
112 /* Reload the global pointer */
115 la gp, __global_pointer$
119 * Switch to kernel page tables. A full fence is necessary in order to
120 * avoid using the trampoline translations, which are only correct for
121 * the first superpage. Fetching the fence is guaranteed to work
122 * because that first superpage is translated the same way.
128 #endif /* CONFIG_MMU */
130 .global secondary_start_sbi
132 /* Mask all interrupts */
136 /* Load the global pointer */
139 la gp, __global_pointer$
143 * Disable FPU to detect illegal usage of
144 * floating point in kernel space
149 /* Set trap vector to spin forever to help debug */
150 la a3, .Lsecondary_park
153 /* a0 contains the hartid & a1 contains boot data */
154 li a2, SBI_HART_BOOT_TASK_PTR_OFFSET
158 li a3, SBI_HART_BOOT_STACK_PTR_OFFSET
163 .Lsecondary_start_common:
166 /* Enable virtual memory and relocate to virtual address */
167 la a0, swapper_pg_dir
169 call relocate_enable_mmu
171 call setup_trap_vector
173 #endif /* CONFIG_SMP */
177 /* Set trap vector to exception handler */
178 la a0, handle_exception
182 * Set sup0 scratch register to 0, indicating to exception vector that
183 * we are presently executing in kernel.
185 csrw CSR_SCRATCH, zero
190 /* We lack SMP support or have too many harts, so park this hart */
197 /* Mask all interrupts */
201 #ifdef CONFIG_RISCV_M_MODE
202 /* flush the instruction cache */
205 /* Reset all registers except ra, a0, a1 */
209 * Setup a PMP to permit access to all of memory. Some machines may
210 * not implement PMPs, so we set up a quick trap handler to just skip
211 * touching the PMPs on any trap.
217 csrw CSR_PMPADDR0, a0
218 li a0, (PMP_A_NAPOT | PMP_R | PMP_W | PMP_X)
224 * The hartid in a0 is expected later on, and we have no firmware
228 #endif /* CONFIG_RISCV_M_MODE */
230 /* Load the global pointer */
233 la gp, __global_pointer$
237 * Disable FPU to detect illegal usage of
238 * floating point in kernel space
243 #ifdef CONFIG_RISCV_BOOT_SPINWAIT
244 li t0, CONFIG_NR_CPUS
245 blt a0, t0, .Lgood_cores
246 tail .Lsecondary_park
249 /* The lottery system is only required for spinwait booting method */
250 #ifndef CONFIG_XIP_KERNEL
251 /* Pick one hart to run the main boot sequence */
254 amoadd.w a3, a2, (a3)
255 bnez a3, .Lsecondary_start
258 /* hart_lottery in flash contains a magic number */
262 XIP_FIXUP_FLASH_OFFSET a3
264 amoswap.w t0, t1, (a2)
265 /* first time here if hart_lottery in RAM is not set */
266 beq t0, t1, .Lsecondary_start
268 #endif /* CONFIG_XIP */
269 #endif /* CONFIG_RISCV_BOOT_SPINWAIT */
271 #ifdef CONFIG_XIP_KERNEL
272 la sp, _end + THREAD_SIZE
277 /* Restore a0 copy */
281 #ifndef CONFIG_XIP_KERNEL
282 /* Clear BSS for flat non-ELF images */
285 ble a4, a3, clear_bss_done
288 add a3, a3, RISCV_SZPTR
289 blt a3, a4, clear_bss
292 /* Save hart ID and DTB physical address */
296 la a2, boot_cpu_hartid
300 /* Initialize page tables and relocate to virtual addresses */
302 la sp, init_thread_union + THREAD_SIZE
304 #ifdef CONFIG_BUILTIN_DTB
309 #endif /* CONFIG_BUILTIN_DTB */
314 call relocate_enable_mmu
315 #endif /* CONFIG_MMU */
317 call setup_trap_vector
318 /* Restore C environment */
320 la sp, init_thread_union + THREAD_SIZE
323 call kasan_early_init
325 /* Start the kernel */
329 #if CONFIG_RISCV_BOOT_SPINWAIT
331 /* Set trap vector to spin forever to help debug */
332 la a3, .Lsecondary_park
336 la a1, __cpu_spinwait_stack_pointer
338 la a2, __cpu_spinwait_task_pointer
344 * This hart didn't win the lottery, so we wait for the winning hart to
345 * get far enough along the boot process that it should continue.
348 /* FIXME: We should WFI to save some energy here. */
351 beqz sp, .Lwait_for_cpu_up
352 beqz tp, .Lwait_for_cpu_up
355 tail .Lsecondary_start_common
356 #endif /* CONFIG_RISCV_BOOT_SPINWAIT */
360 #ifdef CONFIG_RISCV_M_MODE
394 andi t0, t0, (COMPAT_HWCAP_ISA_F | COMPAT_HWCAP_ISA_D)
395 beqz t0, .Lreset_regs_done
432 /* note that the caller must clear SR_FS */
433 #endif /* CONFIG_FPU */
437 #endif /* CONFIG_RISCV_M_MODE */