1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Regents of the University of California
6 #include <linux/init.h>
7 #include <linux/seq_file.h>
12 * Returns the hart ID of the given device tree node, or -ENODEV if the node
13 * isn't an enabled and valid RISC-V hart node.
15 int riscv_of_processor_hartid(struct device_node *node)
20 if (!of_device_is_compatible(node, "riscv")) {
21 pr_warn("Found incompatible CPU\n");
25 if (of_property_read_u32(node, "reg", &hart)) {
26 pr_warn("Found CPU without hart ID\n");
30 if (!of_device_is_available(node)) {
31 pr_info("CPU with hartid=%d is not available\n", hart);
35 if (of_property_read_string(node, "riscv,isa", &isa)) {
36 pr_warn("CPU with hartid=%d has no \"riscv,isa\" property\n", hart);
39 if (isa[0] != 'r' || isa[1] != 'v') {
40 pr_warn("CPU with hartid=%d has an invalid ISA of \"%s\"\n", hart, isa);
49 static void print_isa(struct seq_file *f, const char *orig_isa)
51 static const char *ext = "mafdcsu";
52 const char *isa = orig_isa;
56 * Linux doesn't support rv32e or rv128i, and we only support booting
57 * kernels on harts with the same ISA that the kernel is compiled for.
59 #if defined(CONFIG_32BIT)
60 if (strncmp(isa, "rv32i", 5) != 0)
62 #elif defined(CONFIG_64BIT)
63 if (strncmp(isa, "rv64i", 5) != 0)
67 /* Print the base ISA, as we already know it's legal. */
68 seq_puts(f, "isa\t\t: ");
73 * Check the rest of the ISA string for valid extensions, printing those
74 * we find. RISC-V ISA strings define an order, so we only print the
75 * extension bits when they're in order. Hide the supervisor (S)
76 * extension from userspace as it's not accessible from there.
78 for (e = ext; *e != '\0'; ++e) {
89 * If we were given an unsupported ISA in the device tree then print
90 * a bit of info describing what went wrong.
93 pr_info("unsupported ISA \"%s\" in device tree\n", orig_isa);
96 static void print_mmu(struct seq_file *f, const char *mmu_type)
98 #if defined(CONFIG_32BIT)
99 if (strcmp(mmu_type, "riscv,sv32") != 0)
101 #elif defined(CONFIG_64BIT)
102 if (strcmp(mmu_type, "riscv,sv39") != 0 &&
103 strcmp(mmu_type, "riscv,sv48") != 0)
107 seq_printf(f, "mmu\t\t: %s\n", mmu_type+6);
110 static void *c_start(struct seq_file *m, loff_t *pos)
112 *pos = cpumask_next(*pos - 1, cpu_online_mask);
113 if ((*pos) < nr_cpu_ids)
114 return (void *)(uintptr_t)(1 + *pos);
118 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
121 return c_start(m, pos);
124 static void c_stop(struct seq_file *m, void *v)
128 static int c_show(struct seq_file *m, void *v)
130 unsigned long cpu_id = (unsigned long)v - 1;
131 struct device_node *node = of_get_cpu_node(cpu_id, NULL);
132 const char *compat, *isa, *mmu;
134 seq_printf(m, "processor\t: %lu\n", cpu_id);
135 seq_printf(m, "hart\t\t: %lu\n", cpuid_to_hartid_map(cpu_id));
136 if (!of_property_read_string(node, "riscv,isa", &isa))
138 if (!of_property_read_string(node, "mmu-type", &mmu))
140 if (!of_property_read_string(node, "compatible", &compat)
141 && strcmp(compat, "riscv"))
142 seq_printf(m, "uarch\t\t: %s\n", compat);
149 const struct seq_operations cpuinfo_op = {
156 #endif /* CONFIG_PROC_FS */