arch/powerpc/sysdev/xics/ics-native.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * ICS backend for OPAL managed interrupts.
   4  *
   5  * Copyright 2011 IBM Corp.
   6  */
   7
   8 //#define DEBUG
   9
  10 #include <linux/types.h>
  11 #include <linux/kernel.h>
  12 #include <linux/irq.h>
  13 #include <linux/smp.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/init.h>
  16 #include <linux/cpu.h>
  17 #include <linux/of.h>
  18 #include <linux/of_address.h>
  19 #include <linux/spinlock.h>
  20 #include <linux/msi.h>
  21 #include <linux/list.h>
  22
  23 #include <asm/smp.h>
  24 #include <asm/machdep.h>
  25 #include <asm/irq.h>
  26 #include <asm/errno.h>
  27 #include <asm/xics.h>
  28 #include <asm/opal.h>
  29 #include <asm/firmware.h>
  30
  31 struct ics_native {
  32         struct ics              ics;
  33         struct device_node      *node;
  34         void __iomem            *base;
  35         u32                     ibase;
  36         u32                     icount;
  37 };
  38 #define to_ics_native(_ics)     container_of(_ics, struct ics_native, ics)
  39
  40 static void __iomem *ics_native_xive(struct ics_native *in, unsigned int vec)
  41 {
  42         return in->base + 0x800 + ((vec - in->ibase) << 2);
  43 }
  44
  45 static void ics_native_unmask_irq(struct irq_data *d)
  46 {
  47         unsigned int vec = (unsigned int)irqd_to_hwirq(d);
  48         struct ics *ics = irq_data_get_irq_chip_data(d);
  49         struct ics_native *in = to_ics_native(ics);
  50         unsigned int server;
  51
  52         pr_devel("ics-native: unmask virq %d [hw 0x%x]\n", d->irq, vec);
  53
  54         if (vec < in->ibase || vec >= (in->ibase + in->icount))
  55                 return;
  56
  57         server = xics_get_irq_server(d->irq, irq_data_get_affinity_mask(d), 0);
  58         out_be32(ics_native_xive(in, vec), (server << 8) | DEFAULT_PRIORITY);
  59 }
  60
  61 static unsigned int ics_native_startup(struct irq_data *d)
  62 {
  63 #ifdef CONFIG_PCI_MSI
  64         /*
  65          * The generic MSI code returns with the interrupt disabled on the
  66          * card, using the MSI mask bits. Firmware doesn't appear to unmask
  67          * at that level, so we do it here by hand.
  68          */
  69         if (irq_data_get_msi_desc(d))
  70                 pci_msi_unmask_irq(d);
  71 #endif
  72
  73         /* unmask it */
  74         ics_native_unmask_irq(d);
  75         return 0;
  76 }
  77
  78 static void ics_native_do_mask(struct ics_native *in, unsigned int vec)
  79 {
  80         out_be32(ics_native_xive(in, vec), 0xff);
  81 }
  82
  83 static void ics_native_mask_irq(struct irq_data *d)
  84 {
  85         unsigned int vec = (unsigned int)irqd_to_hwirq(d);
  86         struct ics *ics = irq_data_get_irq_chip_data(d);
  87         struct ics_native *in = to_ics_native(ics);
  88
  89         pr_devel("ics-native: mask virq %d [hw 0x%x]\n", d->irq, vec);
  90
  91         if (vec < in->ibase || vec >= (in->ibase + in->icount))
  92                 return;
  93         ics_native_do_mask(in, vec);
  94 }
  95
  96 static int ics_native_set_affinity(struct irq_data *d,
  97                                    const struct cpumask *cpumask,
  98                                    bool force)
  99 {
 100         unsigned int vec = (unsigned int)irqd_to_hwirq(d);
 101         struct ics *ics = irq_data_get_irq_chip_data(d);
 102         struct ics_native *in = to_ics_native(ics);
 103         int server;
 104         u32 xive;
 105
 106         if (vec < in->ibase || vec >= (in->ibase + in->icount))
 107                 return -EINVAL;
 108
 109         server = xics_get_irq_server(d->irq, cpumask, 1);
 110         if (server == -1) {
 111                 pr_warn("%s: No online cpus in the mask %*pb for irq %d\n",
 112                         __func__, cpumask_pr_args(cpumask), d->irq);
 113                 return -1;
 114         }
 115
 116         xive = in_be32(ics_native_xive(in, vec));
 117         xive = (xive & 0xff) | (server << 8);
 118         out_be32(ics_native_xive(in, vec), xive);
 119
 120         return IRQ_SET_MASK_OK;
 121 }
 122
 123 static struct irq_chip ics_native_irq_chip = {
 124         .name = "ICS",
 125         .irq_startup            = ics_native_startup,
 126         .irq_mask               = ics_native_mask_irq,
 127         .irq_unmask             = ics_native_unmask_irq,
 128         .irq_eoi                = NULL, /* Patched at init time */
 129         .irq_set_affinity       = ics_native_set_affinity,
 130         .irq_set_type           = xics_set_irq_type,
 131         .irq_retrigger          = xics_retrigger,
 132 };
 133
 134 static int ics_native_check(struct ics *ics, unsigned int hw_irq)
 135 {
 136         struct ics_native *in = to_ics_native(ics);
 137
 138         pr_devel("%s: hw_irq=0x%x\n", __func__, hw_irq);
 139
 140         if (hw_irq < in->ibase || hw_irq >= (in->ibase + in->icount))
 141                 return -EINVAL;
 142
 143         return 0;
 144 }
 145
 146 static void ics_native_mask_unknown(struct ics *ics, unsigned long vec)
 147 {
 148         struct ics_native *in = to_ics_native(ics);
 149
 150         if (vec < in->ibase || vec >= (in->ibase + in->icount))
 151                 return;
 152
 153         ics_native_do_mask(in, vec);
 154 }
 155
 156 static long ics_native_get_server(struct ics *ics, unsigned long vec)
 157 {
 158         struct ics_native *in = to_ics_native(ics);
 159         u32 xive;
 160
 161         if (vec < in->ibase || vec >= (in->ibase + in->icount))
 162                 return -EINVAL;
 163
 164         xive = in_be32(ics_native_xive(in, vec));
 165         return (xive >> 8) & 0xfff;
 166 }
 167
 168 static int ics_native_host_match(struct ics *ics, struct device_node *node)
 169 {
 170         struct ics_native *in = to_ics_native(ics);
 171
 172         return in->node == node;
 173 }
 174
 175 static struct ics ics_native_template = {
 176         .check          = ics_native_check,
 177         .mask_unknown   = ics_native_mask_unknown,
 178         .get_server     = ics_native_get_server,
 179         .host_match     = ics_native_host_match,
 180         .chip = &ics_native_irq_chip,
 181 };
 182
 183 static int __init ics_native_add_one(struct device_node *np)
 184 {
 185         struct ics_native *ics;
 186         u32 ranges[2];
 187         int rc, count;
 188
 189         ics = kzalloc(sizeof(struct ics_native), GFP_KERNEL);
 190         if (!ics)
 191                 return -ENOMEM;
 192         ics->node = of_node_get(np);
 193         memcpy(&ics->ics, &ics_native_template, sizeof(struct ics));
 194
 195         ics->base = of_iomap(np, 0);
 196         if (!ics->base) {
 197                 pr_err("Failed to map %pOFP\n", np);
 198                 rc = -ENOMEM;
 199                 goto fail;
 200         }
 201
 202         count = of_property_count_u32_elems(np, "interrupt-ranges");
 203         if (count < 2 || count & 1) {
 204                 pr_err("Failed to read interrupt-ranges of %pOFP\n", np);
 205                 rc = -EINVAL;
 206                 goto fail;
 207         }
 208         if (count > 2) {
 209                 pr_warn("ICS %pOFP has %d ranges, only one supported\n",
 210                         np, count >> 1);
 211         }
 212         rc = of_property_read_u32_array(np, "interrupt-ranges",
 213                                         ranges, 2);
 214         if (rc) {
 215                 pr_err("Failed to read interrupt-ranges of %pOFP\n", np);
 216                 goto fail;
 217         }
 218         ics->ibase = ranges[0];
 219         ics->icount = ranges[1];
 220
 221         pr_info("ICS native initialized for sources %d..%d\n",
 222                 ics->ibase, ics->ibase + ics->icount - 1);
 223
 224         /* Register ourselves */
 225         xics_register_ics(&ics->ics);
 226
 227         return 0;
 228 fail:
 229         of_node_put(ics->node);
 230         kfree(ics);
 231         return rc;
 232 }
 233
 234 int __init ics_native_init(void)
 235 {
 236         struct device_node *ics;
 237         bool found_one = false;
 238
 239         /* We need to patch our irq chip's EOI to point to the
 240          * right ICP
 241          */
 242         ics_native_irq_chip.irq_eoi = icp_ops->eoi;
 243
 244         /* Find native ICS in the device-tree */
 245         for_each_compatible_node(ics, NULL, "openpower,xics-sources") {
 246                 if (ics_native_add_one(ics) == 0)
 247                         found_one = true;
 248         }
 249
 250         if (found_one)
 251                 pr_info("ICS native backend registered\n");
 252
 253         return found_one ? 0 : -ENODEV;
 254 }