arch/powerpc/platforms/pseries/setup.c

   1 /*
   2  *  64-bit pSeries and RS/6000 setup code.
   3  *
   4  *  Copyright (C) 1995  Linus Torvalds
   5  *  Adapted from 'alpha' version by Gary Thomas
   6  *  Modified by Cort Dougan (cort@cs.nmt.edu)
   7  *  Modified by PPC64 Team, IBM Corp
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License
  11  * as published by the Free Software Foundation; either version
  12  * 2 of the License, or (at your option) any later version.
  13  */
  14
  15 /*
  16  * bootup setup stuff..
  17  */
  18
  19 #include <linux/cpu.h>
  20 #include <linux/errno.h>
  21 #include <linux/sched.h>
  22 #include <linux/kernel.h>
  23 #include <linux/mm.h>
  24 #include <linux/stddef.h>
  25 #include <linux/unistd.h>
  26 #include <linux/user.h>
  27 #include <linux/tty.h>
  28 #include <linux/major.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/reboot.h>
  31 #include <linux/init.h>
  32 #include <linux/ioport.h>
  33 #include <linux/console.h>
  34 #include <linux/pci.h>
  35 #include <linux/utsname.h>
  36 #include <linux/adb.h>
  37 #include <linux/export.h>
  38 #include <linux/delay.h>
  39 #include <linux/irq.h>
  40 #include <linux/seq_file.h>
  41 #include <linux/root_dev.h>
  42 #include <linux/of.h>
  43 #include <linux/of_pci.h>
  44 #include <linux/memblock.h>
  45
  46 #include <asm/mmu.h>
  47 #include <asm/processor.h>
  48 #include <asm/io.h>
  49 #include <asm/pgtable.h>
  50 #include <asm/prom.h>
  51 #include <asm/rtas.h>
  52 #include <asm/pci-bridge.h>
  53 #include <asm/iommu.h>
  54 #include <asm/dma.h>
  55 #include <asm/machdep.h>
  56 #include <asm/irq.h>
  57 #include <asm/time.h>
  58 #include <asm/nvram.h>
  59 #include <asm/pmc.h>
  60 #include <asm/xics.h>
  61 #include <asm/xive.h>
  62 #include <asm/ppc-pci.h>
  63 #include <asm/i8259.h>
  64 #include <asm/udbg.h>
  65 #include <asm/smp.h>
  66 #include <asm/firmware.h>
  67 #include <asm/eeh.h>
  68 #include <asm/reg.h>
  69 #include <asm/plpar_wrappers.h>
  70 #include <asm/kexec.h>
  71 #include <asm/isa-bridge.h>
  72 #include <asm/security_features.h>
  73 #include <asm/asm-const.h>
  74
  75 #include "pseries.h"
  76 #include "../../../../drivers/pci/pci.h"
  77
  78 DEFINE_STATIC_KEY_FALSE(shared_processor);
  79 EXPORT_SYMBOL(shared_processor);
  80
  81 int CMO_PrPSP = -1;
  82 int CMO_SecPSP = -1;
  83 unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K);
  84 EXPORT_SYMBOL(CMO_PageSize);
  85
  86 int fwnmi_active;  /* TRUE if an FWNMI handler is present */
  87
  88 static void pSeries_show_cpuinfo(struct seq_file *m)
  89 {
  90         struct device_node *root;
  91         const char *model = "";
  92
  93         root = of_find_node_by_path("/");
  94         if (root)
  95                 model = of_get_property(root, "model", NULL);
  96         seq_printf(m, "machine\t\t: CHRP %s\n", model);
  97         of_node_put(root);
  98         if (radix_enabled())
  99                 seq_printf(m, "MMU\t\t: Radix\n");
 100         else
 101                 seq_printf(m, "MMU\t\t: Hash\n");
 102 }
 103
 104 /* Initialize firmware assisted non-maskable interrupts if
 105  * the firmware supports this feature.
 106  */
 107 static void __init fwnmi_init(void)
 108 {
 109         unsigned long system_reset_addr, machine_check_addr;
 110         u8 *mce_data_buf;
 111         unsigned int i;
 112         int nr_cpus = num_possible_cpus();
 113
 114         int ibm_nmi_register = rtas_token("ibm,nmi-register");
 115         if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
 116                 return;
 117
 118         /* If the kernel's not linked at zero we point the firmware at low
 119          * addresses anyway, and use a trampoline to get to the real code. */
 120         system_reset_addr  = __pa(system_reset_fwnmi) - PHYSICAL_START;
 121         machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START;
 122
 123         if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr,
 124                                 machine_check_addr))
 125                 fwnmi_active = 1;
 126
 127         /*
 128          * Allocate a chunk for per cpu buffer to hold rtas errorlog.
 129          * It will be used in real mode mce handler, hence it needs to be
 130          * below RMA.
 131          */
 132         mce_data_buf = __va(memblock_alloc_base(RTAS_ERROR_LOG_MAX * nr_cpus,
 133                                         RTAS_ERROR_LOG_MAX, ppc64_rma_size));
 134         for_each_possible_cpu(i) {
 135                 paca_ptrs[i]->mce_data_buf = mce_data_buf +
 136                                                 (RTAS_ERROR_LOG_MAX * i);
 137         }
 138 }
 139
 140 static void pseries_8259_cascade(struct irq_desc *desc)
 141 {
 142         struct irq_chip *chip = irq_desc_get_chip(desc);
 143         unsigned int cascade_irq = i8259_irq();
 144
 145         if (cascade_irq)
 146                 generic_handle_irq(cascade_irq);
 147
 148         chip->irq_eoi(&desc->irq_data);
 149 }
 150
 151 static void __init pseries_setup_i8259_cascade(void)
 152 {
 153         struct device_node *np, *old, *found = NULL;
 154         unsigned int cascade;
 155         const u32 *addrp;
 156         unsigned long intack = 0;
 157         int naddr;
 158
 159         for_each_node_by_type(np, "interrupt-controller") {
 160                 if (of_device_is_compatible(np, "chrp,iic")) {
 161                         found = np;
 162                         break;
 163                 }
 164         }
 165
 166         if (found == NULL) {
 167                 printk(KERN_DEBUG "pic: no ISA interrupt controller\n");
 168                 return;
 169         }
 170
 171         cascade = irq_of_parse_and_map(found, 0);
 172         if (!cascade) {
 173                 printk(KERN_ERR "pic: failed to map cascade interrupt");
 174                 return;
 175         }
 176         pr_debug("pic: cascade mapped to irq %d\n", cascade);
 177
 178         for (old = of_node_get(found); old != NULL ; old = np) {
 179                 np = of_get_parent(old);
 180                 of_node_put(old);
 181                 if (np == NULL)
 182                         break;
 183                 if (strcmp(np->name, "pci") != 0)
 184                         continue;
 185                 addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL);
 186                 if (addrp == NULL)
 187                         continue;
 188                 naddr = of_n_addr_cells(np);
 189                 intack = addrp[naddr-1];
 190                 if (naddr > 1)
 191                         intack |= ((unsigned long)addrp[naddr-2]) << 32;
 192         }
 193         if (intack)
 194                 printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack);
 195         i8259_init(found, intack);
 196         of_node_put(found);
 197         irq_set_chained_handler(cascade, pseries_8259_cascade);
 198 }
 199
 200 static void __init pseries_init_irq(void)
 201 {
 202         /* Try using a XIVE if available, otherwise use a XICS */
 203         if (!xive_spapr_init()) {
 204                 xics_init();
 205                 pseries_setup_i8259_cascade();
 206         }
 207 }
 208
 209 static void pseries_lpar_enable_pmcs(void)
 210 {
 211         unsigned long set, reset;
 212
 213         set = 1UL << 63;
 214         reset = 0;
 215         plpar_hcall_norets(H_PERFMON, set, reset);
 216 }
 217
 218 static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *data)
 219 {
 220         struct of_reconfig_data *rd = data;
 221         struct device_node *parent, *np = rd->dn;
 222         struct pci_dn *pdn;
 223         int err = NOTIFY_OK;
 224
 225         switch (action) {
 226         case OF_RECONFIG_ATTACH_NODE:
 227                 parent = of_get_parent(np);
 228                 pdn = parent ? PCI_DN(parent) : NULL;
 229                 if (pdn)
 230                         pci_add_device_node_info(pdn->phb, np);
 231
 232                 of_node_put(parent);
 233                 break;
 234         case OF_RECONFIG_DETACH_NODE:
 235                 pdn = PCI_DN(np);
 236                 if (pdn)
 237                         list_del(&pdn->list);
 238                 break;
 239         default:
 240                 err = NOTIFY_DONE;
 241                 break;
 242         }
 243         return err;
 244 }
 245
 246 static struct notifier_block pci_dn_reconfig_nb = {
 247         .notifier_call = pci_dn_reconfig_notifier,
 248 };
 249
 250 struct kmem_cache *dtl_cache;
 251
 252 #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
 253 /*
 254  * Allocate space for the dispatch trace log for all possible cpus
 255  * and register the buffers with the hypervisor.  This is used for
 256  * computing time stolen by the hypervisor.
 257  */
 258 static int alloc_dispatch_logs(void)
 259 {
 260         int cpu, ret;
 261         struct paca_struct *pp;
 262         struct dtl_entry *dtl;
 263
 264         if (!firmware_has_feature(FW_FEATURE_SPLPAR))
 265                 return 0;
 266
 267         if (!dtl_cache)
 268                 return 0;
 269
 270         for_each_possible_cpu(cpu) {
 271                 pp = paca_ptrs[cpu];
 272                 dtl = kmem_cache_alloc(dtl_cache, GFP_KERNEL);
 273                 if (!dtl) {
 274                         pr_warn("Failed to allocate dispatch trace log for cpu %d\n",
 275                                 cpu);
 276                         pr_warn("Stolen time statistics will be unreliable\n");
 277                         break;
 278                 }
 279
 280                 pp->dtl_ridx = 0;
 281                 pp->dispatch_log = dtl;
 282                 pp->dispatch_log_end = dtl + N_DISPATCH_LOG;
 283                 pp->dtl_curr = dtl;
 284         }
 285
 286         /* Register the DTL for the current (boot) cpu */
 287         dtl = get_paca()->dispatch_log;
 288         get_paca()->dtl_ridx = 0;
 289         get_paca()->dtl_curr = dtl;
 290         get_paca()->lppaca_ptr->dtl_idx = 0;
 291
 292         /* hypervisor reads buffer length from this field */
 293         dtl->enqueue_to_dispatch_time = cpu_to_be32(DISPATCH_LOG_BYTES);
 294         ret = register_dtl(hard_smp_processor_id(), __pa(dtl));
 295         if (ret)
 296                 pr_err("WARNING: DTL registration of cpu %d (hw %d) failed "
 297                        "with %d\n", smp_processor_id(),
 298                        hard_smp_processor_id(), ret);
 299         get_paca()->lppaca_ptr->dtl_enable_mask = 2;
 300
 301         return 0;
 302 }
 303 #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
 304 static inline int alloc_dispatch_logs(void)
 305 {
 306         return 0;
 307 }
 308 #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
 309
 310 static int alloc_dispatch_log_kmem_cache(void)
 311 {
 312         dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES,
 313                                                 DISPATCH_LOG_BYTES, 0, NULL);
 314         if (!dtl_cache) {
 315                 pr_warn("Failed to create dispatch trace log buffer cache\n");
 316                 pr_warn("Stolen time statistics will be unreliable\n");
 317                 return 0;
 318         }
 319
 320         return alloc_dispatch_logs();
 321 }
 322 machine_early_initcall(pseries, alloc_dispatch_log_kmem_cache);
 323
 324 static void pseries_lpar_idle(void)
 325 {
 326         /*
 327          * Default handler to go into low thread priority and possibly
 328          * low power mode by ceding processor to hypervisor
 329          */
 330
 331         if (!prep_irq_for_idle())
 332                 return;
 333
 334         /* Indicate to hypervisor that we are idle. */
 335         get_lppaca()->idle = 1;
 336
 337         /*
 338          * Yield the processor to the hypervisor.  We return if
 339          * an external interrupt occurs (which are driven prior
 340          * to returning here) or if a prod occurs from another
 341          * processor. When returning here, external interrupts
 342          * are enabled.
 343          */
 344         cede_processor();
 345
 346         get_lppaca()->idle = 0;
 347 }
 348
 349 /*
 350  * Enable relocation on during exceptions. This has partition wide scope and
 351  * may take a while to complete, if it takes longer than one second we will
 352  * just give up rather than wasting any more time on this - if that turns out
 353  * to ever be a problem in practice we can move this into a kernel thread to
 354  * finish off the process later in boot.
 355  */
 356 void pseries_enable_reloc_on_exc(void)
 357 {
 358         long rc;
 359         unsigned int delay, total_delay = 0;
 360
 361         while (1) {
 362                 rc = enable_reloc_on_exceptions();
 363                 if (!H_IS_LONG_BUSY(rc)) {
 364                         if (rc == H_P2) {
 365                                 pr_info("Relocation on exceptions not"
 366                                         " supported\n");
 367                         } else if (rc != H_SUCCESS) {
 368                                 pr_warn("Unable to enable relocation"
 369                                         " on exceptions: %ld\n", rc);
 370                         }
 371                         break;
 372                 }
 373
 374                 delay = get_longbusy_msecs(rc);
 375                 total_delay += delay;
 376                 if (total_delay > 1000) {
 377                         pr_warn("Warning: Giving up waiting to enable "
 378                                 "relocation on exceptions (%u msec)!\n",
 379                                 total_delay);
 380                         return;
 381                 }
 382
 383                 mdelay(delay);
 384         }
 385 }
 386 EXPORT_SYMBOL(pseries_enable_reloc_on_exc);
 387
 388 void pseries_disable_reloc_on_exc(void)
 389 {
 390         long rc;
 391
 392         while (1) {
 393                 rc = disable_reloc_on_exceptions();
 394                 if (!H_IS_LONG_BUSY(rc))
 395                         break;
 396                 mdelay(get_longbusy_msecs(rc));
 397         }
 398         if (rc != H_SUCCESS)
 399                 pr_warn("Warning: Failed to disable relocation on exceptions: %ld\n",
 400                         rc);
 401 }
 402 EXPORT_SYMBOL(pseries_disable_reloc_on_exc);
 403
 404 #ifdef CONFIG_KEXEC_CORE
 405 static void pSeries_machine_kexec(struct kimage *image)
 406 {
 407         if (firmware_has_feature(FW_FEATURE_SET_MODE))
 408                 pseries_disable_reloc_on_exc();
 409
 410         default_machine_kexec(image);
 411 }
 412 #endif
 413
 414 #ifdef __LITTLE_ENDIAN__
 415 void pseries_big_endian_exceptions(void)
 416 {
 417         long rc;
 418
 419         while (1) {
 420                 rc = enable_big_endian_exceptions();
 421                 if (!H_IS_LONG_BUSY(rc))
 422                         break;
 423                 mdelay(get_longbusy_msecs(rc));
 424         }
 425
 426         /*
 427          * At this point it is unlikely panic() will get anything
 428          * out to the user, since this is called very late in kexec
 429          * but at least this will stop us from continuing on further
 430          * and creating an even more difficult to debug situation.
 431          *
 432          * There is a known problem when kdump'ing, if cpus are offline
 433          * the above call will fail. Rather than panicking again, keep
 434          * going and hope the kdump kernel is also little endian, which
 435          * it usually is.
 436          */
 437         if (rc && !kdump_in_progress())
 438                 panic("Could not enable big endian exceptions");
 439 }
 440
 441 void pseries_little_endian_exceptions(void)
 442 {
 443         long rc;
 444
 445         while (1) {
 446                 rc = enable_little_endian_exceptions();
 447                 if (!H_IS_LONG_BUSY(rc))
 448                         break;
 449                 mdelay(get_longbusy_msecs(rc));
 450         }
 451         if (rc) {
 452                 ppc_md.progress("H_SET_MODE LE exception fail", 0);
 453                 panic("Could not enable little endian exceptions");
 454         }
 455 }
 456 #endif
 457
 458 static void __init find_and_init_phbs(void)
 459 {
 460         struct device_node *node;
 461         struct pci_controller *phb;
 462         struct device_node *root = of_find_node_by_path("/");
 463
 464         for_each_child_of_node(root, node) {
 465                 if (node->type == NULL || (strcmp(node->type, "pci") != 0 &&
 466                                            strcmp(node->type, "pciex") != 0))
 467                         continue;
 468
 469                 phb = pcibios_alloc_controller(node);
 470                 if (!phb)
 471                         continue;
 472                 rtas_setup_phb(phb);
 473                 pci_process_bridge_OF_ranges(phb, node, 0);
 474                 isa_bridge_find_early(phb);
 475                 phb->controller_ops = pseries_pci_controller_ops;
 476         }
 477
 478         of_node_put(root);
 479
 480         /*
 481          * PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS can be set via properties
 482          * in chosen.
 483          */
 484         of_pci_check_probe_only();
 485 }
 486
 487 static void init_cpu_char_feature_flags(struct h_cpu_char_result *result)
 488 {
 489         /*
 490          * The features below are disabled by default, so we instead look to see
 491          * if firmware has *enabled* them, and set them if so.
 492          */
 493         if (result->character & H_CPU_CHAR_SPEC_BAR_ORI31)
 494                 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
 495
 496         if (result->character & H_CPU_CHAR_BCCTRL_SERIALISED)
 497                 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
 498
 499         if (result->character & H_CPU_CHAR_L1D_FLUSH_ORI30)
 500                 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
 501
 502         if (result->character & H_CPU_CHAR_L1D_FLUSH_TRIG2)
 503                 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
 504
 505         if (result->character & H_CPU_CHAR_L1D_THREAD_PRIV)
 506                 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
 507
 508         if (result->character & H_CPU_CHAR_COUNT_CACHE_DISABLED)
 509                 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
 510
 511         if (result->character & H_CPU_CHAR_BCCTR_FLUSH_ASSIST)
 512                 security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST);
 513
 514         if (result->behaviour & H_CPU_BEHAV_FLUSH_COUNT_CACHE)
 515                 security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE);
 516
 517         /*
 518          * The features below are enabled by default, so we instead look to see
 519          * if firmware has *disabled* them, and clear them if so.
 520          */
 521         if (!(result->behaviour & H_CPU_BEHAV_FAVOUR_SECURITY))
 522                 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
 523
 524         if (!(result->behaviour & H_CPU_BEHAV_L1D_FLUSH_PR))
 525                 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
 526
 527         if (!(result->behaviour & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR))
 528                 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
 529 }
 530
 531 void pseries_setup_rfi_flush(void)
 532 {
 533         struct h_cpu_char_result result;
 534         enum l1d_flush_type types;
 535         bool enable;
 536         long rc;
 537
 538         /*
 539          * Set features to the defaults assumed by init_cpu_char_feature_flags()
 540          * so it can set/clear again any features that might have changed after
 541          * migration, and in case the hypercall fails and it is not even called.
 542          */
 543         powerpc_security_features = SEC_FTR_DEFAULT;
 544
 545         rc = plpar_get_cpu_characteristics(&result);
 546         if (rc == H_SUCCESS)
 547                 init_cpu_char_feature_flags(&result);
 548
 549         /*
 550          * We're the guest so this doesn't apply to us, clear it to simplify
 551          * handling of it elsewhere.
 552          */
 553         security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
 554
 555         types = L1D_FLUSH_FALLBACK;
 556
 557         if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2))
 558                 types |= L1D_FLUSH_MTTRIG;
 559
 560         if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30))
 561                 types |= L1D_FLUSH_ORI;
 562
 563         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \
 564                  security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR);
 565
 566         setup_rfi_flush(types, enable);
 567         setup_count_cache_flush();
 568
 569         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
 570                  security_ftr_enabled(SEC_FTR_L1D_FLUSH_ENTRY);
 571         setup_entry_flush(enable);
 572
 573         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
 574                  security_ftr_enabled(SEC_FTR_L1D_FLUSH_UACCESS);
 575         setup_uaccess_flush(enable);
 576 }
 577
 578 #ifdef CONFIG_PCI_IOV
 579 enum rtas_iov_fw_value_map {
 580         NUM_RES_PROPERTY  = 0, /* Number of Resources */
 581         LOW_INT           = 1, /* Lowest 32 bits of Address */
 582         START_OF_ENTRIES  = 2, /* Always start of entry */
 583         APERTURE_PROPERTY = 2, /* Start of entry+ to  Aperture Size */
 584         WDW_SIZE_PROPERTY = 4, /* Start of entry+ to Window Size */
 585         NEXT_ENTRY        = 7  /* Go to next entry on array */
 586 };
 587
 588 enum get_iov_fw_value_index {
 589         BAR_ADDRS     = 1,    /*  Get Bar Address */
 590         APERTURE_SIZE = 2,    /*  Get Aperture Size */
 591         WDW_SIZE      = 3     /*  Get Window Size */
 592 };
 593
 594 resource_size_t pseries_get_iov_fw_value(struct pci_dev *dev, int resno,
 595                                          enum get_iov_fw_value_index value)
 596 {
 597         const int *indexes;
 598         struct device_node *dn = pci_device_to_OF_node(dev);
 599         int i, num_res, ret = 0;
 600
 601         indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
 602         if (!indexes)
 603                 return  0;
 604
 605         /*
 606          * First element in the array is the number of Bars
 607          * returned.  Search through the list to find the matching
 608          * bar
 609          */
 610         num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
 611         if (resno >= num_res)
 612                 return 0; /* or an errror */
 613
 614         i = START_OF_ENTRIES + NEXT_ENTRY * resno;
 615         switch (value) {
 616         case BAR_ADDRS:
 617                 ret = of_read_number(&indexes[i], 2);
 618                 break;
 619         case APERTURE_SIZE:
 620                 ret = of_read_number(&indexes[i + APERTURE_PROPERTY], 2);
 621                 break;
 622         case WDW_SIZE:
 623                 ret = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2);
 624                 break;
 625         }
 626
 627         return ret;
 628 }
 629
 630 void of_pci_set_vf_bar_size(struct pci_dev *dev, const int *indexes)
 631 {
 632         struct resource *res;
 633         resource_size_t base, size;
 634         int i, r, num_res;
 635
 636         num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
 637         num_res = min_t(int, num_res, PCI_SRIOV_NUM_BARS);
 638         for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS;
 639              i += NEXT_ENTRY, r++) {
 640                 res = &dev->resource[r + PCI_IOV_RESOURCES];
 641                 base = of_read_number(&indexes[i], 2);
 642                 size = of_read_number(&indexes[i + APERTURE_PROPERTY], 2);
 643                 res->flags = pci_parse_of_flags(of_read_number
 644                                                 (&indexes[i + LOW_INT], 1), 0);
 645                 res->flags |= (IORESOURCE_MEM_64 | IORESOURCE_PCI_FIXED);
 646                 res->name = pci_name(dev);
 647                 res->start = base;
 648                 res->end = base + size - 1;
 649         }
 650 }
 651
 652 void of_pci_parse_iov_addrs(struct pci_dev *dev, const int *indexes)
 653 {
 654         struct resource *res, *root, *conflict;
 655         resource_size_t base, size;
 656         int i, r, num_res;
 657
 658         /*
 659          * First element in the array is the number of Bars
 660          * returned.  Search through the list to find the matching
 661          * bars assign them from firmware into resources structure.
 662          */
 663         num_res = of_read_number(&indexes[NUM_RES_PROPERTY], 1);
 664         for (i = START_OF_ENTRIES, r = 0; r < num_res && r < PCI_SRIOV_NUM_BARS;
 665              i += NEXT_ENTRY, r++) {
 666                 res = &dev->resource[r + PCI_IOV_RESOURCES];
 667                 base = of_read_number(&indexes[i], 2);
 668                 size = of_read_number(&indexes[i + WDW_SIZE_PROPERTY], 2);
 669                 res->name = pci_name(dev);
 670                 res->start = base;
 671                 res->end = base + size - 1;
 672                 root = &iomem_resource;
 673                 dev_dbg(&dev->dev,
 674                         "pSeries IOV BAR %d: trying firmware assignment %pR\n",
 675                          r + PCI_IOV_RESOURCES, res);
 676                 conflict = request_resource_conflict(root, res);
 677                 if (conflict) {
 678                         dev_info(&dev->dev,
 679                                  "BAR %d: %pR conflicts with %s %pR\n",
 680                                  r + PCI_IOV_RESOURCES, res,
 681                                  conflict->name, conflict);
 682                         res->flags |= IORESOURCE_UNSET;
 683                 }
 684         }
 685 }
 686
 687 static void pseries_disable_sriov_resources(struct pci_dev *pdev)
 688 {
 689         int i;
 690
 691         pci_warn(pdev, "No hypervisor support for SR-IOV on this device, IOV BARs disabled.\n");
 692         for (i = 0; i < PCI_SRIOV_NUM_BARS; i++)
 693                 pdev->resource[i + PCI_IOV_RESOURCES].flags = 0;
 694 }
 695
 696 static void pseries_pci_fixup_resources(struct pci_dev *pdev)
 697 {
 698         const int *indexes;
 699         struct device_node *dn = pci_device_to_OF_node(pdev);
 700
 701         /*Firmware must support open sriov otherwise dont configure*/
 702         indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
 703         if (indexes)
 704                 of_pci_set_vf_bar_size(pdev, indexes);
 705         else
 706                 pseries_disable_sriov_resources(pdev);
 707 }
 708
 709 static void pseries_pci_fixup_iov_resources(struct pci_dev *pdev)
 710 {
 711         const int *indexes;
 712         struct device_node *dn = pci_device_to_OF_node(pdev);
 713
 714         if (!pdev->is_physfn || pci_dev_is_added(pdev))
 715                 return;
 716         /*Firmware must support open sriov otherwise dont configure*/
 717         indexes = of_get_property(dn, "ibm,open-sriov-vf-bar-info", NULL);
 718         if (indexes)
 719                 of_pci_parse_iov_addrs(pdev, indexes);
 720         else
 721                 pseries_disable_sriov_resources(pdev);
 722 }
 723
 724 static resource_size_t pseries_pci_iov_resource_alignment(struct pci_dev *pdev,
 725                                                           int resno)
 726 {
 727         const __be32 *reg;
 728         struct device_node *dn = pci_device_to_OF_node(pdev);
 729
 730         /*Firmware must support open sriov otherwise report regular alignment*/
 731         reg = of_get_property(dn, "ibm,is-open-sriov-pf", NULL);
 732         if (!reg)
 733                 return pci_iov_resource_size(pdev, resno);
 734
 735         if (!pdev->is_physfn)
 736                 return 0;
 737         return pseries_get_iov_fw_value(pdev,
 738                                         resno - PCI_IOV_RESOURCES,
 739                                         APERTURE_SIZE);
 740 }
 741 #endif
 742
 743 static void __init pSeries_setup_arch(void)
 744 {
 745         set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
 746
 747         /* Discover PIC type and setup ppc_md accordingly */
 748         smp_init_pseries();
 749
 750
 751         /* openpic global configuration register (64-bit format). */
 752         /* openpic Interrupt Source Unit pointer (64-bit format). */
 753         /* python0 facility area (mmio) (64-bit format) REAL address. */
 754
 755         /* init to some ~sane value until calibrate_delay() runs */
 756         loops_per_jiffy = 50000000;
 757
 758         fwnmi_init();
 759
 760         pseries_setup_rfi_flush();
 761         setup_stf_barrier();
 762
 763         /* By default, only probe PCI (can be overridden by rtas_pci) */
 764         pci_add_flags(PCI_PROBE_ONLY);
 765
 766         /* Find and initialize PCI host bridges */
 767         init_pci_config_tokens();
 768         find_and_init_phbs();
 769         of_reconfig_notifier_register(&pci_dn_reconfig_nb);
 770
 771         pSeries_nvram_init();
 772
 773         if (firmware_has_feature(FW_FEATURE_LPAR)) {
 774                 vpa_init(boot_cpuid);
 775
 776                 if (lppaca_shared_proc(get_lppaca()))
 777                         static_branch_enable(&shared_processor);
 778
 779                 ppc_md.power_save = pseries_lpar_idle;
 780                 ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
 781 #ifdef CONFIG_PCI_IOV
 782                 ppc_md.pcibios_fixup_resources =
 783                         pseries_pci_fixup_resources;
 784                 ppc_md.pcibios_fixup_sriov =
 785                         pseries_pci_fixup_iov_resources;
 786                 ppc_md.pcibios_iov_resource_alignment =
 787                         pseries_pci_iov_resource_alignment;
 788 #endif
 789         } else {
 790                 /* No special idle routine */
 791                 ppc_md.enable_pmcs = power4_enable_pmcs;
 792         }
 793
 794         ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare;
 795 }
 796
 797 static void pseries_panic(char *str)
 798 {
 799         panic_flush_kmsg_end();
 800         rtas_os_term(str);
 801 }
 802
 803 static int __init pSeries_init_panel(void)
 804 {
 805         /* Manually leave the kernel version on the panel. */
 806 #ifdef __BIG_ENDIAN__
 807         ppc_md.progress("Linux ppc64\n", 0);
 808 #else
 809         ppc_md.progress("Linux ppc64le\n", 0);
 810 #endif
 811         ppc_md.progress(init_utsname()->version, 0);
 812
 813         return 0;
 814 }
 815 machine_arch_initcall(pseries, pSeries_init_panel);
 816
 817 static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx)
 818 {
 819         return plpar_hcall_norets(H_SET_DABR, dabr);
 820 }
 821
 822 static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx)
 823 {
 824         /* Have to set at least one bit in the DABRX according to PAPR */
 825         if (dabrx == 0 && dabr == 0)
 826                 dabrx = DABRX_USER;
 827         /* PAPR says we can only set kernel and user bits */
 828         dabrx &= DABRX_KERNEL | DABRX_USER;
 829
 830         return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx);
 831 }
 832
 833 static int pseries_set_dawr(unsigned long dawr, unsigned long dawrx)
 834 {
 835         /* PAPR says we can't set HYP */
 836         dawrx &= ~DAWRX_HYP;
 837
 838         return  plpar_set_watchpoint0(dawr, dawrx);
 839 }
 840
 841 #define CMO_CHARACTERISTICS_TOKEN 44
 842 #define CMO_MAXLENGTH 1026
 843
 844 void pSeries_coalesce_init(void)
 845 {
 846         struct hvcall_mpp_x_data mpp_x_data;
 847
 848         if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data))
 849                 powerpc_firmware_features |= FW_FEATURE_XCMO;
 850         else
 851                 powerpc_firmware_features &= ~FW_FEATURE_XCMO;
 852 }
 853
 854 /**
 855  * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions,
 856  * handle that here. (Stolen from parse_system_parameter_string)
 857  */
 858 static void pSeries_cmo_feature_init(void)
 859 {
 860         char *ptr, *key, *value, *end;
 861         int call_status;
 862         int page_order = IOMMU_PAGE_SHIFT_4K;
 863
 864         pr_debug(" -> fw_cmo_feature_init()\n");
 865         spin_lock(&rtas_data_buf_lock);
 866         memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE);
 867         call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1,
 868                                 NULL,
 869                                 CMO_CHARACTERISTICS_TOKEN,
 870                                 __pa(rtas_data_buf),
 871                                 RTAS_DATA_BUF_SIZE);
 872
 873         if (call_status != 0) {
 874                 spin_unlock(&rtas_data_buf_lock);
 875                 pr_debug("CMO not available\n");
 876                 pr_debug(" <- fw_cmo_feature_init()\n");
 877                 return;
 878         }
 879
 880         end = rtas_data_buf + CMO_MAXLENGTH - 2;
 881         ptr = rtas_data_buf + 2;        /* step over strlen value */
 882         key = value = ptr;
 883
 884         while (*ptr && (ptr <= end)) {
 885                 /* Separate the key and value by replacing '=' with '\0' and
 886                  * point the value at the string after the '='
 887                  */
 888                 if (ptr[0] == '=') {
 889                         ptr[0] = '\0';
 890                         value = ptr + 1;
 891                 } else if (ptr[0] == '\0' || ptr[0] == ',') {
 892                         /* Terminate the string containing the key/value pair */
 893                         ptr[0] = '\0';
 894
 895                         if (key == value) {
 896                                 pr_debug("Malformed key/value pair\n");
 897                                 /* Never found a '=', end processing */
 898                                 break;
 899                         }
 900
 901                         if (0 == strcmp(key, "CMOPageSize"))
 902                                 page_order = simple_strtol(value, NULL, 10);
 903                         else if (0 == strcmp(key, "PrPSP"))
 904                                 CMO_PrPSP = simple_strtol(value, NULL, 10);
 905                         else if (0 == strcmp(key, "SecPSP"))
 906                                 CMO_SecPSP = simple_strtol(value, NULL, 10);
 907                         value = key = ptr + 1;
 908                 }
 909                 ptr++;
 910         }
 911
 912         /* Page size is returned as the power of 2 of the page size,
 913          * convert to the page size in bytes before returning
 914          */
 915         CMO_PageSize = 1 << page_order;
 916         pr_debug("CMO_PageSize = %lu\n", CMO_PageSize);
 917
 918         if (CMO_PrPSP != -1 || CMO_SecPSP != -1) {
 919                 pr_info("CMO enabled\n");
 920                 pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
 921                          CMO_SecPSP);
 922                 powerpc_firmware_features |= FW_FEATURE_CMO;
 923                 pSeries_coalesce_init();
 924         } else
 925                 pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
 926                          CMO_SecPSP);
 927         spin_unlock(&rtas_data_buf_lock);
 928         pr_debug(" <- fw_cmo_feature_init()\n");
 929 }
 930
 931 /*
 932  * Early initialization.  Relocation is on but do not reference unbolted pages
 933  */
 934 static void __init pseries_init(void)
 935 {
 936         pr_debug(" -> pseries_init()\n");
 937
 938 #ifdef CONFIG_HVC_CONSOLE
 939         if (firmware_has_feature(FW_FEATURE_LPAR))
 940                 hvc_vio_init_early();
 941 #endif
 942         if (firmware_has_feature(FW_FEATURE_XDABR))
 943                 ppc_md.set_dabr = pseries_set_xdabr;
 944         else if (firmware_has_feature(FW_FEATURE_DABR))
 945                 ppc_md.set_dabr = pseries_set_dabr;
 946
 947         if (firmware_has_feature(FW_FEATURE_SET_MODE))
 948                 ppc_md.set_dawr = pseries_set_dawr;
 949
 950         pSeries_cmo_feature_init();
 951         iommu_init_early_pSeries();
 952
 953         pr_debug(" <- pseries_init()\n");
 954 }
 955
 956 /**
 957  * pseries_power_off - tell firmware about how to power off the system.
 958  *
 959  * This function calls either the power-off rtas token in normal cases
 960  * or the ibm,power-off-ups token (if present & requested) in case of
 961  * a power failure. If power-off token is used, power on will only be
 962  * possible with power button press. If ibm,power-off-ups token is used
 963  * it will allow auto poweron after power is restored.
 964  */
 965 static void pseries_power_off(void)
 966 {
 967         int rc;
 968         int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups");
 969
 970         if (rtas_flash_term_hook)
 971                 rtas_flash_term_hook(SYS_POWER_OFF);
 972
 973         if (rtas_poweron_auto == 0 ||
 974                 rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) {
 975                 rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1);
 976                 printk(KERN_INFO "RTAS power-off returned %d\n", rc);
 977         } else {
 978                 rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL);
 979                 printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc);
 980         }
 981         for (;;);
 982 }
 983
 984 static int __init pSeries_probe(void)
 985 {
 986         const char *dtype = of_get_property(of_root, "device_type", NULL);
 987
 988         if (dtype == NULL)
 989                 return 0;
 990         if (strcmp(dtype, "chrp"))
 991                 return 0;
 992
 993         /* Cell blades firmware claims to be chrp while it's not. Until this
 994          * is fixed, we need to avoid those here.
 995          */
 996         if (of_machine_is_compatible("IBM,CPBW-1.0") ||
 997             of_machine_is_compatible("IBM,CBEA"))
 998                 return 0;
 999
1000         pm_power_off = pseries_power_off;
1001
1002         pr_debug("Machine is%s LPAR !\n",
1003                  (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not");
1004
1005         pseries_init();
1006
1007         return 1;
1008 }
1009
1010 static int pSeries_pci_probe_mode(struct pci_bus *bus)
1011 {
1012         if (firmware_has_feature(FW_FEATURE_LPAR))
1013                 return PCI_PROBE_DEVTREE;
1014         return PCI_PROBE_NORMAL;
1015 }
1016
1017 struct pci_controller_ops pseries_pci_controller_ops = {
1018         .probe_mode             = pSeries_pci_probe_mode,
1019 };
1020
1021 define_machine(pseries) {
1022         .name                   = "pSeries",
1023         .probe                  = pSeries_probe,
1024         .setup_arch             = pSeries_setup_arch,
1025         .init_IRQ               = pseries_init_irq,
1026         .show_cpuinfo           = pSeries_show_cpuinfo,
1027         .log_error              = pSeries_log_error,
1028         .pcibios_fixup          = pSeries_final_fixup,
1029         .restart                = rtas_restart,
1030         .halt                   = rtas_halt,
1031         .panic                  = pseries_panic,
1032         .get_boot_time          = rtas_get_boot_time,
1033         .get_rtc_time           = rtas_get_rtc_time,
1034         .set_rtc_time           = rtas_set_rtc_time,
1035         .calibrate_decr         = generic_calibrate_decr,
1036         .progress               = rtas_progress,
1037         .system_reset_exception = pSeries_system_reset_exception,
1038         .machine_check_exception = pSeries_machine_check_exception,
1039 #ifdef CONFIG_KEXEC_CORE
1040         .machine_kexec          = pSeries_machine_kexec,
1041         .kexec_cpu_down         = pseries_kexec_cpu_down,
1042 #endif
1043 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
1044         .memory_block_size      = pseries_memory_block_size,
1045 #endif
1046 };