GNU Linux-libre 4.14.295-gnu1
[releases.git] / arch / powerpc / platforms / powernv / smp.c
1 /*
2  * SMP support for PowerNV machines.
3  *
4  * Copyright 2011 IBM Corp.
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License
8  * as published by the Free Software Foundation; either version
9  * 2 of the License, or (at your option) any later version.
10  */
11
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/sched.h>
15 #include <linux/sched/hotplug.h>
16 #include <linux/smp.h>
17 #include <linux/interrupt.h>
18 #include <linux/delay.h>
19 #include <linux/init.h>
20 #include <linux/spinlock.h>
21 #include <linux/cpu.h>
22
23 #include <asm/irq.h>
24 #include <asm/smp.h>
25 #include <asm/paca.h>
26 #include <asm/machdep.h>
27 #include <asm/cputable.h>
28 #include <asm/firmware.h>
29 #include <asm/vdso_datapage.h>
30 #include <asm/cputhreads.h>
31 #include <asm/xics.h>
32 #include <asm/xive.h>
33 #include <asm/opal.h>
34 #include <asm/runlatch.h>
35 #include <asm/code-patching.h>
36 #include <asm/dbell.h>
37 #include <asm/kvm_ppc.h>
38 #include <asm/ppc-opcode.h>
39 #include <asm/cpuidle.h>
40
41 #include "powernv.h"
42
43 #ifdef DEBUG
44 #include <asm/udbg.h>
45 #define DBG(fmt...) udbg_printf(fmt)
46 #else
47 #define DBG(fmt...) do { } while (0)
48 #endif
49
50 static void pnv_smp_setup_cpu(int cpu)
51 {
52         if (xive_enabled())
53                 xive_smp_setup_cpu();
54         else if (cpu != boot_cpuid)
55                 xics_setup_cpu();
56 }
57
58 static int pnv_smp_kick_cpu(int nr)
59 {
60         unsigned int pcpu;
61         unsigned long start_here =
62                         __pa(ppc_function_entry(generic_secondary_smp_init));
63         long rc;
64         uint8_t status;
65
66         if (nr < 0 || nr >= nr_cpu_ids)
67                 return -EINVAL;
68
69         pcpu = get_hard_smp_processor_id(nr);
70         /*
71          * If we already started or OPAL is not supported, we just
72          * kick the CPU via the PACA
73          */
74         if (paca[nr].cpu_start || !firmware_has_feature(FW_FEATURE_OPAL))
75                 goto kick;
76
77         /*
78          * At this point, the CPU can either be spinning on the way in
79          * from kexec or be inside OPAL waiting to be started for the
80          * first time. OPAL v3 allows us to query OPAL to know if it
81          * has the CPUs, so we do that
82          */
83         rc = opal_query_cpu_status(pcpu, &status);
84         if (rc != OPAL_SUCCESS) {
85                 pr_warn("OPAL Error %ld querying CPU %d state\n", rc, nr);
86                 return -ENODEV;
87         }
88
89         /*
90          * Already started, just kick it, probably coming from
91          * kexec and spinning
92          */
93         if (status == OPAL_THREAD_STARTED)
94                 goto kick;
95
96         /*
97          * Available/inactive, let's kick it
98          */
99         if (status == OPAL_THREAD_INACTIVE) {
100                 pr_devel("OPAL: Starting CPU %d (HW 0x%x)...\n", nr, pcpu);
101                 rc = opal_start_cpu(pcpu, start_here);
102                 if (rc != OPAL_SUCCESS) {
103                         pr_warn("OPAL Error %ld starting CPU %d\n", rc, nr);
104                         return -ENODEV;
105                 }
106         } else {
107                 /*
108                  * An unavailable CPU (or any other unknown status)
109                  * shouldn't be started. It should also
110                  * not be in the possible map but currently it can
111                  * happen
112                  */
113                 pr_devel("OPAL: CPU %d (HW 0x%x) is unavailable"
114                          " (status %d)...\n", nr, pcpu, status);
115                 return -ENODEV;
116         }
117
118 kick:
119         return smp_generic_kick_cpu(nr);
120 }
121
122 #ifdef CONFIG_HOTPLUG_CPU
123
124 static int pnv_smp_cpu_disable(void)
125 {
126         int cpu = smp_processor_id();
127
128         /* This is identical to pSeries... might consolidate by
129          * moving migrate_irqs_away to a ppc_md with default to
130          * the generic fixup_irqs. --BenH.
131          */
132         set_cpu_online(cpu, false);
133         vdso_data->processorCount--;
134         if (cpu == boot_cpuid)
135                 boot_cpuid = cpumask_any(cpu_online_mask);
136         if (xive_enabled())
137                 xive_smp_disable_cpu();
138         else
139                 xics_migrate_irqs_away();
140         return 0;
141 }
142
143 static void pnv_smp_cpu_kill_self(void)
144 {
145         unsigned int cpu;
146         unsigned long srr1, wmask;
147
148         /* Standard hot unplug procedure */
149         /*
150          * This hard disables local interurpts, ensuring we have no lazy
151          * irqs pending.
152          */
153         WARN_ON(irqs_disabled());
154         hard_irq_disable();
155         WARN_ON(lazy_irq_pending());
156
157         idle_task_exit();
158         current->active_mm = NULL; /* for sanity */
159         cpu = smp_processor_id();
160         DBG("CPU%d offline\n", cpu);
161         generic_set_cpu_dead(cpu);
162         smp_wmb();
163
164         wmask = SRR1_WAKEMASK;
165         if (cpu_has_feature(CPU_FTR_ARCH_207S))
166                 wmask = SRR1_WAKEMASK_P8;
167
168         while (!generic_check_cpu_restart(cpu)) {
169                 /*
170                  * Clear IPI flag, since we don't handle IPIs while
171                  * offline, except for those when changing micro-threading
172                  * mode, which are handled explicitly below, and those
173                  * for coming online, which are handled via
174                  * generic_check_cpu_restart() calls.
175                  */
176                 kvmppc_set_host_ipi(cpu, 0);
177
178                 srr1 = pnv_cpu_offline(cpu);
179
180                 WARN_ON(lazy_irq_pending());
181
182                 /*
183                  * If the SRR1 value indicates that we woke up due to
184                  * an external interrupt, then clear the interrupt.
185                  * We clear the interrupt before checking for the
186                  * reason, so as to avoid a race where we wake up for
187                  * some other reason, find nothing and clear the interrupt
188                  * just as some other cpu is sending us an interrupt.
189                  * If we returned from power7_nap as a result of
190                  * having finished executing in a KVM guest, then srr1
191                  * contains 0.
192                  */
193                 if (((srr1 & wmask) == SRR1_WAKEEE) ||
194                     ((srr1 & wmask) == SRR1_WAKEHVI)) {
195                         if (cpu_has_feature(CPU_FTR_ARCH_300)) {
196                                 if (xive_enabled())
197                                         xive_flush_interrupt();
198                                 else
199                                         icp_opal_flush_interrupt();
200                         } else
201                                 icp_native_flush_interrupt();
202                 } else if ((srr1 & wmask) == SRR1_WAKEHDBELL) {
203                         unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER);
204                         asm volatile(PPC_MSGCLR(%0) : : "r" (msg));
205                 }
206                 smp_mb();
207
208                 if (cpu_core_split_required())
209                         continue;
210
211                 if (srr1 && !generic_check_cpu_restart(cpu))
212                         DBG("CPU%d Unexpected exit while offline srr1=%lx!\n",
213                                         cpu, srr1);
214
215         }
216
217         DBG("CPU%d coming online...\n", cpu);
218 }
219
220 #endif /* CONFIG_HOTPLUG_CPU */
221
222 static int pnv_cpu_bootable(unsigned int nr)
223 {
224         /*
225          * Starting with POWER8, the subcore logic relies on all threads of a
226          * core being booted so that they can participate in split mode
227          * switches. So on those machines we ignore the smt_enabled_at_boot
228          * setting (smt-enabled on the kernel command line).
229          */
230         if (cpu_has_feature(CPU_FTR_ARCH_207S))
231                 return 1;
232
233         return smp_generic_cpu_bootable(nr);
234 }
235
236 static int pnv_smp_prepare_cpu(int cpu)
237 {
238         if (xive_enabled())
239                 return xive_smp_prepare_cpu(cpu);
240         return 0;
241 }
242
243 /* Cause IPI as setup by the interrupt controller (xics or xive) */
244 static void (*ic_cause_ipi)(int cpu);
245
246 static void pnv_cause_ipi(int cpu)
247 {
248         if (doorbell_try_core_ipi(cpu))
249                 return;
250
251         ic_cause_ipi(cpu);
252 }
253
254 static void pnv_p9_dd1_cause_ipi(int cpu)
255 {
256         int this_cpu = get_cpu();
257
258         /*
259          * POWER9 DD1 has a global addressed msgsnd, but for now we restrict
260          * IPIs to same core, because it requires additional synchronization
261          * for inter-core doorbells which we do not implement.
262          */
263         if (cpumask_test_cpu(cpu, cpu_sibling_mask(this_cpu)))
264                 doorbell_global_ipi(cpu);
265         else
266                 ic_cause_ipi(cpu);
267
268         put_cpu();
269 }
270
271 static void __init pnv_smp_probe(void)
272 {
273         if (xive_enabled())
274                 xive_smp_probe();
275         else
276                 xics_smp_probe();
277
278         if (cpu_has_feature(CPU_FTR_DBELL)) {
279                 ic_cause_ipi = smp_ops->cause_ipi;
280                 WARN_ON(!ic_cause_ipi);
281
282                 if (cpu_has_feature(CPU_FTR_ARCH_300)) {
283                         if (cpu_has_feature(CPU_FTR_POWER9_DD1))
284                                 smp_ops->cause_ipi = pnv_p9_dd1_cause_ipi;
285                         else
286                                 smp_ops->cause_ipi = doorbell_global_ipi;
287                 } else {
288                         smp_ops->cause_ipi = pnv_cause_ipi;
289                 }
290         }
291 }
292
293 static struct smp_ops_t pnv_smp_ops = {
294         .message_pass   = NULL, /* Use smp_muxed_ipi_message_pass */
295         .cause_ipi      = NULL, /* Filled at runtime by pnv_smp_probe() */
296         .cause_nmi_ipi  = NULL,
297         .probe          = pnv_smp_probe,
298         .prepare_cpu    = pnv_smp_prepare_cpu,
299         .kick_cpu       = pnv_smp_kick_cpu,
300         .setup_cpu      = pnv_smp_setup_cpu,
301         .cpu_bootable   = pnv_cpu_bootable,
302 #ifdef CONFIG_HOTPLUG_CPU
303         .cpu_disable    = pnv_smp_cpu_disable,
304         .cpu_die        = generic_cpu_die,
305 #endif /* CONFIG_HOTPLUG_CPU */
306 };
307
308 /* This is called very early during platform setup_arch */
309 void __init pnv_smp_init(void)
310 {
311         smp_ops = &pnv_smp_ops;
312
313 #ifdef CONFIG_HOTPLUG_CPU
314         ppc_md.cpu_die  = pnv_smp_cpu_kill_self;
315 #endif
316 }