arch/powerpc/platforms/powernv/setup.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * PowerNV setup code.
   4  *
   5  * Copyright 2011 IBM Corp.
   6  */
   7
   8 #undef DEBUG
   9
  10 #include <linux/cpu.h>
  11 #include <linux/errno.h>
  12 #include <linux/sched.h>
  13 #include <linux/kernel.h>
  14 #include <linux/tty.h>
  15 #include <linux/reboot.h>
  16 #include <linux/init.h>
  17 #include <linux/console.h>
  18 #include <linux/delay.h>
  19 #include <linux/irq.h>
  20 #include <linux/seq_file.h>
  21 #include <linux/of.h>
  22 #include <linux/of_fdt.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/bug.h>
  25 #include <linux/pci.h>
  26 #include <linux/cpufreq.h>
  27 #include <linux/memblock.h>
  28
  29 #include <asm/machdep.h>
  30 #include <asm/firmware.h>
  31 #include <asm/xics.h>
  32 #include <asm/xive.h>
  33 #include <asm/opal.h>
  34 #include <asm/kexec.h>
  35 #include <asm/smp.h>
  36 #include <asm/tm.h>
  37 #include <asm/setup.h>
  38 #include <asm/security_features.h>
  39
  40 #include "powernv.h"
  41
  42
  43 static bool fw_feature_is(const char *state, const char *name,
  44                           struct device_node *fw_features)
  45 {
  46         struct device_node *np;
  47         bool rc = false;
  48
  49         np = of_get_child_by_name(fw_features, name);
  50         if (np) {
  51                 rc = of_property_read_bool(np, state);
  52                 of_node_put(np);
  53         }
  54
  55         return rc;
  56 }
  57
  58 static void init_fw_feat_flags(struct device_node *np)
  59 {
  60         if (fw_feature_is("enabled", "inst-spec-barrier-ori31,31,0", np))
  61                 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
  62
  63         if (fw_feature_is("enabled", "fw-bcctrl-serialized", np))
  64                 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
  65
  66         if (fw_feature_is("enabled", "inst-l1d-flush-ori30,30,0", np))
  67                 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
  68
  69         if (fw_feature_is("enabled", "inst-l1d-flush-trig2", np))
  70                 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
  71
  72         if (fw_feature_is("enabled", "fw-l1d-thread-split", np))
  73                 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
  74
  75         if (fw_feature_is("enabled", "fw-count-cache-disabled", np))
  76                 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
  77
  78         if (fw_feature_is("enabled", "fw-count-cache-flush-bcctr2,0,0", np))
  79                 security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST);
  80
  81         if (fw_feature_is("enabled", "needs-count-cache-flush-on-context-switch", np))
  82                 security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE);
  83
  84         /*
  85          * The features below are enabled by default, so we instead look to see
  86          * if firmware has *disabled* them, and clear them if so.
  87          */
  88         if (fw_feature_is("disabled", "speculation-policy-favor-security", np))
  89                 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
  90
  91         if (fw_feature_is("disabled", "needs-l1d-flush-msr-pr-0-to-1", np))
  92                 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
  93
  94         if (fw_feature_is("disabled", "needs-l1d-flush-msr-hv-1-to-0", np))
  95                 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
  96
  97         if (fw_feature_is("disabled", "needs-spec-barrier-for-bound-checks", np))
  98                 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
  99 }
 100
 101 static void pnv_setup_rfi_flush(void)
 102 {
 103         struct device_node *np, *fw_features;
 104         enum l1d_flush_type type;
 105         bool enable;
 106
 107         /* Default to fallback in case fw-features are not available */
 108         type = L1D_FLUSH_FALLBACK;
 109
 110         np = of_find_node_by_name(NULL, "ibm,opal");
 111         fw_features = of_get_child_by_name(np, "fw-features");
 112         of_node_put(np);
 113
 114         if (fw_features) {
 115                 init_fw_feat_flags(fw_features);
 116                 of_node_put(fw_features);
 117
 118                 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2))
 119                         type = L1D_FLUSH_MTTRIG;
 120
 121                 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30))
 122                         type = L1D_FLUSH_ORI;
 123         }
 124
 125         /*
 126          * If we are non-Power9 bare metal, we don't need to flush on kernel
 127          * entry or after user access: they fix a P9 specific vulnerability.
 128          */
 129         if (!pvr_version_is(PVR_POWER9)) {
 130                 security_ftr_clear(SEC_FTR_L1D_FLUSH_ENTRY);
 131                 security_ftr_clear(SEC_FTR_L1D_FLUSH_UACCESS);
 132         }
 133
 134         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \
 135                  (security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR)   || \
 136                   security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV));
 137
 138         setup_rfi_flush(type, enable);
 139         setup_count_cache_flush();
 140
 141         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
 142                  security_ftr_enabled(SEC_FTR_L1D_FLUSH_ENTRY);
 143         setup_entry_flush(enable);
 144
 145         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
 146                  security_ftr_enabled(SEC_FTR_L1D_FLUSH_UACCESS);
 147         setup_uaccess_flush(enable);
 148 }
 149
 150 static void __init pnv_setup_arch(void)
 151 {
 152         set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
 153
 154         pnv_setup_rfi_flush();
 155         setup_stf_barrier();
 156
 157         /* Initialize SMP */
 158         pnv_smp_init();
 159
 160         /* Setup PCI */
 161         pnv_pci_init();
 162
 163         /* Setup RTC and NVRAM callbacks */
 164         if (firmware_has_feature(FW_FEATURE_OPAL))
 165                 opal_nvram_init();
 166
 167         /* Enable NAP mode */
 168         powersave_nap = 1;
 169
 170         /* XXX PMCS */
 171
 172         pnv_rng_init();
 173 }
 174
 175 static void __init pnv_init(void)
 176 {
 177         /*
 178          * Initialize the LPC bus now so that legacy serial
 179          * ports can be found on it
 180          */
 181         opal_lpc_init();
 182
 183 #ifdef CONFIG_HVC_OPAL
 184         if (firmware_has_feature(FW_FEATURE_OPAL))
 185                 hvc_opal_init_early();
 186         else
 187 #endif
 188                 add_preferred_console("hvc", 0, NULL);
 189
 190         if (!radix_enabled()) {
 191                 size_t size = sizeof(struct slb_entry) * mmu_slb_size;
 192                 int i;
 193
 194                 /* Allocate per cpu area to save old slb contents during MCE */
 195                 for_each_possible_cpu(i) {
 196                         paca_ptrs[i]->mce_faulty_slbs =
 197                                         memblock_alloc_node(size,
 198                                                 __alignof__(struct slb_entry),
 199                                                 cpu_to_node(i));
 200                 }
 201         }
 202 }
 203
 204 static void __init pnv_init_IRQ(void)
 205 {
 206         /* Try using a XIVE if available, otherwise use a XICS */
 207         if (!xive_native_init())
 208                 xics_init();
 209
 210         WARN_ON(!ppc_md.get_irq);
 211 }
 212
 213 static void pnv_show_cpuinfo(struct seq_file *m)
 214 {
 215         struct device_node *root;
 216         const char *model = "";
 217
 218         root = of_find_node_by_path("/");
 219         if (root)
 220                 model = of_get_property(root, "model", NULL);
 221         seq_printf(m, "machine\t\t: PowerNV %s\n", model);
 222         if (firmware_has_feature(FW_FEATURE_OPAL))
 223                 seq_printf(m, "firmware\t: OPAL\n");
 224         else
 225                 seq_printf(m, "firmware\t: BML\n");
 226         of_node_put(root);
 227         if (radix_enabled())
 228                 seq_printf(m, "MMU\t\t: Radix\n");
 229         else
 230                 seq_printf(m, "MMU\t\t: Hash\n");
 231 }
 232
 233 static void pnv_prepare_going_down(void)
 234 {
 235         /*
 236          * Disable all notifiers from OPAL, we can't
 237          * service interrupts anymore anyway
 238          */
 239         opal_event_shutdown();
 240
 241         /* Print flash update message if one is scheduled. */
 242         opal_flash_update_print_message();
 243
 244         smp_send_stop();
 245
 246         hard_irq_disable();
 247 }
 248
 249 static void  __noreturn pnv_restart(char *cmd)
 250 {
 251         long rc;
 252
 253         pnv_prepare_going_down();
 254
 255         do {
 256                 if (!cmd)
 257                         rc = opal_cec_reboot();
 258                 else if (strcmp(cmd, "full") == 0)
 259                         rc = opal_cec_reboot2(OPAL_REBOOT_FULL_IPL, NULL);
 260                 else
 261                         rc = OPAL_UNSUPPORTED;
 262
 263                 if (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 264                         /* Opal is busy wait for some time and retry */
 265                         opal_poll_events(NULL);
 266                         mdelay(10);
 267
 268                 } else  if (cmd && rc) {
 269                         /* Unknown error while issuing reboot */
 270                         if (rc == OPAL_UNSUPPORTED)
 271                                 pr_err("Unsupported '%s' reboot.\n", cmd);
 272                         else
 273                                 pr_err("Unable to issue '%s' reboot. Err=%ld\n",
 274                                        cmd, rc);
 275                         pr_info("Forcing a cec-reboot\n");
 276                         cmd = NULL;
 277                         rc = OPAL_BUSY;
 278
 279                 } else if (rc != OPAL_SUCCESS) {
 280                         /* Unknown error while issuing cec-reboot */
 281                         pr_err("Unable to reboot. Err=%ld\n", rc);
 282                 }
 283
 284         } while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT);
 285
 286         for (;;)
 287                 opal_poll_events(NULL);
 288 }
 289
 290 static void __noreturn pnv_power_off(void)
 291 {
 292         long rc = OPAL_BUSY;
 293
 294         pnv_prepare_going_down();
 295
 296         while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 297                 rc = opal_cec_power_down(0);
 298                 if (rc == OPAL_BUSY_EVENT)
 299                         opal_poll_events(NULL);
 300                 else
 301                         mdelay(10);
 302         }
 303         for (;;)
 304                 opal_poll_events(NULL);
 305 }
 306
 307 static void __noreturn pnv_halt(void)
 308 {
 309         pnv_power_off();
 310 }
 311
 312 static void pnv_progress(char *s, unsigned short hex)
 313 {
 314 }
 315
 316 static void pnv_shutdown(void)
 317 {
 318         /* Let the PCI code clear up IODA tables */
 319         pnv_pci_shutdown();
 320
 321         /*
 322          * Stop OPAL activity: Unregister all OPAL interrupts so they
 323          * don't fire up while we kexec and make sure all potentially
 324          * DMA'ing ops are complete (such as dump retrieval).
 325          */
 326         opal_shutdown();
 327 }
 328
 329 #ifdef CONFIG_KEXEC_CORE
 330 static void pnv_kexec_wait_secondaries_down(void)
 331 {
 332         int my_cpu, i, notified = -1;
 333
 334         my_cpu = get_cpu();
 335
 336         for_each_online_cpu(i) {
 337                 uint8_t status;
 338                 int64_t rc, timeout = 1000;
 339
 340                 if (i == my_cpu)
 341                         continue;
 342
 343                 for (;;) {
 344                         rc = opal_query_cpu_status(get_hard_smp_processor_id(i),
 345                                                    &status);
 346                         if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED)
 347                                 break;
 348                         barrier();
 349                         if (i != notified) {
 350                                 printk(KERN_INFO "kexec: waiting for cpu %d "
 351                                        "(physical %d) to enter OPAL\n",
 352                                        i, paca_ptrs[i]->hw_cpu_id);
 353                                 notified = i;
 354                         }
 355
 356                         /*
 357                          * On crash secondaries might be unreachable or hung,
 358                          * so timeout if we've waited too long
 359                          * */
 360                         mdelay(1);
 361                         if (timeout-- == 0) {
 362                                 printk(KERN_ERR "kexec: timed out waiting for "
 363                                        "cpu %d (physical %d) to enter OPAL\n",
 364                                        i, paca_ptrs[i]->hw_cpu_id);
 365                                 break;
 366                         }
 367                 }
 368         }
 369 }
 370
 371 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
 372 {
 373         u64 reinit_flags;
 374
 375         if (xive_enabled())
 376                 xive_teardown_cpu();
 377         else
 378                 xics_kexec_teardown_cpu(secondary);
 379
 380         /* On OPAL, we return all CPUs to firmware */
 381         if (!firmware_has_feature(FW_FEATURE_OPAL))
 382                 return;
 383
 384         if (secondary) {
 385                 /* Return secondary CPUs to firmware on OPAL v3 */
 386                 mb();
 387                 get_paca()->kexec_state = KEXEC_STATE_REAL_MODE;
 388                 mb();
 389
 390                 /* Return the CPU to OPAL */
 391                 opal_return_cpu();
 392         } else {
 393                 /* Primary waits for the secondaries to have reached OPAL */
 394                 pnv_kexec_wait_secondaries_down();
 395
 396                 /* Switch XIVE back to emulation mode */
 397                 if (xive_enabled())
 398                         xive_shutdown();
 399
 400                 /*
 401                  * We might be running as little-endian - now that interrupts
 402                  * are disabled, reset the HILE bit to big-endian so we don't
 403                  * take interrupts in the wrong endian later
 404                  *
 405                  * We reinit to enable both radix and hash on P9 to ensure
 406                  * the mode used by the next kernel is always supported.
 407                  */
 408                 reinit_flags = OPAL_REINIT_CPUS_HILE_BE;
 409                 if (cpu_has_feature(CPU_FTR_ARCH_300))
 410                         reinit_flags |= OPAL_REINIT_CPUS_MMU_RADIX |
 411                                 OPAL_REINIT_CPUS_MMU_HASH;
 412                 opal_reinit_cpus(reinit_flags);
 413         }
 414 }
 415 #endif /* CONFIG_KEXEC_CORE */
 416
 417 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 418 static unsigned long pnv_memory_block_size(void)
 419 {
 420         return 256UL * 1024 * 1024;
 421 }
 422 #endif
 423
 424 static void __init pnv_setup_machdep_opal(void)
 425 {
 426         ppc_md.get_boot_time = opal_get_boot_time;
 427         ppc_md.restart = pnv_restart;
 428         pm_power_off = pnv_power_off;
 429         ppc_md.halt = pnv_halt;
 430         /* ppc_md.system_reset_exception gets filled in by pnv_smp_init() */
 431         ppc_md.machine_check_exception = opal_machine_check;
 432         ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery;
 433         if (opal_check_token(OPAL_HANDLE_HMI2))
 434                 ppc_md.hmi_exception_early = opal_hmi_exception_early2;
 435         else
 436                 ppc_md.hmi_exception_early = opal_hmi_exception_early;
 437         ppc_md.handle_hmi_exception = opal_handle_hmi_exception;
 438 }
 439
 440 static int __init pnv_probe(void)
 441 {
 442         if (!of_machine_is_compatible("ibm,powernv"))
 443                 return 0;
 444
 445         if (firmware_has_feature(FW_FEATURE_OPAL))
 446                 pnv_setup_machdep_opal();
 447
 448         pr_debug("PowerNV detected !\n");
 449
 450         pnv_init();
 451
 452         return 1;
 453 }
 454
 455 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 456 void __init pnv_tm_init(void)
 457 {
 458         if (!firmware_has_feature(FW_FEATURE_OPAL) ||
 459             !pvr_version_is(PVR_POWER9) ||
 460             early_cpu_has_feature(CPU_FTR_TM))
 461                 return;
 462
 463         if (opal_reinit_cpus(OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED) != OPAL_SUCCESS)
 464                 return;
 465
 466         pr_info("Enabling TM (Transactional Memory) with Suspend Disabled\n");
 467         cur_cpu_spec->cpu_features |= CPU_FTR_TM;
 468         /* Make sure "normal" HTM is off (it should be) */
 469         cur_cpu_spec->cpu_user_features2 &= ~PPC_FEATURE2_HTM;
 470         /* Turn on no suspend mode, and HTM no SC */
 471         cur_cpu_spec->cpu_user_features2 |= PPC_FEATURE2_HTM_NO_SUSPEND | \
 472                                             PPC_FEATURE2_HTM_NOSC;
 473         tm_suspend_disabled = true;
 474 }
 475 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
 476
 477 /*
 478  * Returns the cpu frequency for 'cpu' in Hz. This is used by
 479  * /proc/cpuinfo
 480  */
 481 static unsigned long pnv_get_proc_freq(unsigned int cpu)
 482 {
 483         unsigned long ret_freq;
 484
 485         ret_freq = cpufreq_get(cpu) * 1000ul;
 486
 487         /*
 488          * If the backend cpufreq driver does not exist,
 489          * then fallback to old way of reporting the clockrate.
 490          */
 491         if (!ret_freq)
 492                 ret_freq = ppc_proc_freq;
 493         return ret_freq;
 494 }
 495
 496 static long pnv_machine_check_early(struct pt_regs *regs)
 497 {
 498         long handled = 0;
 499
 500         if (cur_cpu_spec && cur_cpu_spec->machine_check_early)
 501                 handled = cur_cpu_spec->machine_check_early(regs);
 502
 503         return handled;
 504 }
 505
 506 define_machine(powernv) {
 507         .name                   = "PowerNV",
 508         .probe                  = pnv_probe,
 509         .setup_arch             = pnv_setup_arch,
 510         .init_IRQ               = pnv_init_IRQ,
 511         .show_cpuinfo           = pnv_show_cpuinfo,
 512         .get_proc_freq          = pnv_get_proc_freq,
 513         .progress               = pnv_progress,
 514         .machine_shutdown       = pnv_shutdown,
 515         .power_save             = NULL,
 516         .calibrate_decr         = generic_calibrate_decr,
 517         .machine_check_early    = pnv_machine_check_early,
 518 #ifdef CONFIG_KEXEC_CORE
 519         .kexec_cpu_down         = pnv_kexec_cpu_down,
 520 #endif
 521 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 522         .memory_block_size      = pnv_memory_block_size,
 523 #endif
 524 };