arch/powerpc/platforms/powernv/setup.c

   1 /*
   2  * PowerNV setup code.
   3  *
   4  * Copyright 2011 IBM Corp.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  */
  11
  12 #undef DEBUG
  13
  14 #include <linux/cpu.h>
  15 #include <linux/errno.h>
  16 #include <linux/sched.h>
  17 #include <linux/kernel.h>
  18 #include <linux/tty.h>
  19 #include <linux/reboot.h>
  20 #include <linux/init.h>
  21 #include <linux/console.h>
  22 #include <linux/delay.h>
  23 #include <linux/irq.h>
  24 #include <linux/seq_file.h>
  25 #include <linux/of.h>
  26 #include <linux/of_fdt.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/bug.h>
  29 #include <linux/pci.h>
  30 #include <linux/cpufreq.h>
  31
  32 #include <asm/machdep.h>
  33 #include <asm/firmware.h>
  34 #include <asm/xics.h>
  35 #include <asm/xive.h>
  36 #include <asm/opal.h>
  37 #include <asm/kexec.h>
  38 #include <asm/smp.h>
  39 #include <asm/setup.h>
  40 #include <asm/security_features.h>
  41
  42 #include "powernv.h"
  43
  44
  45 static bool fw_feature_is(const char *state, const char *name,
  46                           struct device_node *fw_features)
  47 {
  48         struct device_node *np;
  49         bool rc = false;
  50
  51         np = of_get_child_by_name(fw_features, name);
  52         if (np) {
  53                 rc = of_property_read_bool(np, state);
  54                 of_node_put(np);
  55         }
  56
  57         return rc;
  58 }
  59
  60 static void init_fw_feat_flags(struct device_node *np)
  61 {
  62         if (fw_feature_is("enabled", "inst-spec-barrier-ori31,31,0", np))
  63                 security_ftr_set(SEC_FTR_SPEC_BAR_ORI31);
  64
  65         if (fw_feature_is("enabled", "fw-bcctrl-serialized", np))
  66                 security_ftr_set(SEC_FTR_BCCTRL_SERIALISED);
  67
  68         if (fw_feature_is("enabled", "inst-l1d-flush-ori30,30,0", np))
  69                 security_ftr_set(SEC_FTR_L1D_FLUSH_ORI30);
  70
  71         if (fw_feature_is("enabled", "inst-l1d-flush-trig2", np))
  72                 security_ftr_set(SEC_FTR_L1D_FLUSH_TRIG2);
  73
  74         if (fw_feature_is("enabled", "fw-l1d-thread-split", np))
  75                 security_ftr_set(SEC_FTR_L1D_THREAD_PRIV);
  76
  77         if (fw_feature_is("enabled", "fw-count-cache-disabled", np))
  78                 security_ftr_set(SEC_FTR_COUNT_CACHE_DISABLED);
  79
  80         if (fw_feature_is("enabled", "fw-count-cache-flush-bcctr2,0,0", np))
  81                 security_ftr_set(SEC_FTR_BCCTR_FLUSH_ASSIST);
  82
  83         if (fw_feature_is("enabled", "needs-count-cache-flush-on-context-switch", np))
  84                 security_ftr_set(SEC_FTR_FLUSH_COUNT_CACHE);
  85
  86         /*
  87          * The features below are enabled by default, so we instead look to see
  88          * if firmware has *disabled* them, and clear them if so.
  89          */
  90         if (fw_feature_is("disabled", "speculation-policy-favor-security", np))
  91                 security_ftr_clear(SEC_FTR_FAVOUR_SECURITY);
  92
  93         if (fw_feature_is("disabled", "needs-l1d-flush-msr-pr-0-to-1", np))
  94                 security_ftr_clear(SEC_FTR_L1D_FLUSH_PR);
  95
  96         if (fw_feature_is("disabled", "needs-l1d-flush-msr-hv-1-to-0", np))
  97                 security_ftr_clear(SEC_FTR_L1D_FLUSH_HV);
  98
  99         if (fw_feature_is("disabled", "needs-spec-barrier-for-bound-checks", np))
 100                 security_ftr_clear(SEC_FTR_BNDS_CHK_SPEC_BAR);
 101 }
 102
 103 static void pnv_setup_rfi_flush(void)
 104 {
 105         struct device_node *np, *fw_features;
 106         enum l1d_flush_type type;
 107         bool enable;
 108
 109         /* Default to fallback in case fw-features are not available */
 110         type = L1D_FLUSH_FALLBACK;
 111
 112         np = of_find_node_by_name(NULL, "ibm,opal");
 113         fw_features = of_get_child_by_name(np, "fw-features");
 114         of_node_put(np);
 115
 116         if (fw_features) {
 117                 init_fw_feat_flags(fw_features);
 118                 of_node_put(fw_features);
 119
 120                 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_TRIG2))
 121                         type = L1D_FLUSH_MTTRIG;
 122
 123                 if (security_ftr_enabled(SEC_FTR_L1D_FLUSH_ORI30))
 124                         type = L1D_FLUSH_ORI;
 125         }
 126
 127         /*
 128          * If we are non-Power9 bare metal, we don't need to flush on kernel
 129          * entry or after user access: they fix a P9 specific vulnerability.
 130          */
 131         if (!pvr_version_is(PVR_POWER9)) {
 132                 security_ftr_clear(SEC_FTR_L1D_FLUSH_ENTRY);
 133                 security_ftr_clear(SEC_FTR_L1D_FLUSH_UACCESS);
 134         }
 135
 136         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) && \
 137                  (security_ftr_enabled(SEC_FTR_L1D_FLUSH_PR)   || \
 138                   security_ftr_enabled(SEC_FTR_L1D_FLUSH_HV));
 139
 140         setup_rfi_flush(type, enable);
 141         setup_count_cache_flush();
 142
 143         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
 144                  security_ftr_enabled(SEC_FTR_L1D_FLUSH_ENTRY);
 145         setup_entry_flush(enable);
 146
 147         enable = security_ftr_enabled(SEC_FTR_FAVOUR_SECURITY) &&
 148                  security_ftr_enabled(SEC_FTR_L1D_FLUSH_UACCESS);
 149         setup_uaccess_flush(enable);
 150 }
 151
 152 static void __init pnv_setup_arch(void)
 153 {
 154         set_arch_panic_timeout(10, ARCH_PANIC_TIMEOUT);
 155
 156         pnv_setup_rfi_flush();
 157         setup_stf_barrier();
 158
 159         /* Initialize SMP */
 160         pnv_smp_init();
 161
 162         /* Setup PCI */
 163         pnv_pci_init();
 164
 165         /* Setup RTC and NVRAM callbacks */
 166         if (firmware_has_feature(FW_FEATURE_OPAL))
 167                 opal_nvram_init();
 168
 169         /* Enable NAP mode */
 170         powersave_nap = 1;
 171
 172         /* XXX PMCS */
 173 }
 174
 175 static void __init pnv_init(void)
 176 {
 177         /*
 178          * Initialize the LPC bus now so that legacy serial
 179          * ports can be found on it
 180          */
 181         opal_lpc_init();
 182
 183 #ifdef CONFIG_HVC_OPAL
 184         if (firmware_has_feature(FW_FEATURE_OPAL))
 185                 hvc_opal_init_early();
 186         else
 187 #endif
 188                 add_preferred_console("hvc", 0, NULL);
 189 }
 190
 191 static void __init pnv_init_IRQ(void)
 192 {
 193         /* Try using a XIVE if available, otherwise use a XICS */
 194         if (!xive_native_init())
 195                 xics_init();
 196
 197         WARN_ON(!ppc_md.get_irq);
 198 }
 199
 200 static void pnv_show_cpuinfo(struct seq_file *m)
 201 {
 202         struct device_node *root;
 203         const char *model = "";
 204
 205         root = of_find_node_by_path("/");
 206         if (root)
 207                 model = of_get_property(root, "model", NULL);
 208         seq_printf(m, "machine\t\t: PowerNV %s\n", model);
 209         if (firmware_has_feature(FW_FEATURE_OPAL))
 210                 seq_printf(m, "firmware\t: OPAL\n");
 211         else
 212                 seq_printf(m, "firmware\t: BML\n");
 213         of_node_put(root);
 214         if (radix_enabled())
 215                 seq_printf(m, "MMU\t\t: Radix\n");
 216         else
 217                 seq_printf(m, "MMU\t\t: Hash\n");
 218 }
 219
 220 static void pnv_prepare_going_down(void)
 221 {
 222         /*
 223          * Disable all notifiers from OPAL, we can't
 224          * service interrupts anymore anyway
 225          */
 226         opal_event_shutdown();
 227
 228         /* Soft disable interrupts */
 229         local_irq_disable();
 230
 231         /*
 232          * Return secondary CPUs to firwmare if a flash update
 233          * is pending otherwise we will get all sort of error
 234          * messages about CPU being stuck etc.. This will also
 235          * have the side effect of hard disabling interrupts so
 236          * past this point, the kernel is effectively dead.
 237          */
 238         opal_flash_term_callback();
 239 }
 240
 241 static void  __noreturn pnv_restart(char *cmd)
 242 {
 243         long rc = OPAL_BUSY;
 244
 245         pnv_prepare_going_down();
 246
 247         while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 248                 rc = opal_cec_reboot();
 249                 if (rc == OPAL_BUSY_EVENT)
 250                         opal_poll_events(NULL);
 251                 else
 252                         mdelay(10);
 253         }
 254         for (;;)
 255                 opal_poll_events(NULL);
 256 }
 257
 258 static void __noreturn pnv_power_off(void)
 259 {
 260         long rc = OPAL_BUSY;
 261
 262         pnv_prepare_going_down();
 263
 264         while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 265                 rc = opal_cec_power_down(0);
 266                 if (rc == OPAL_BUSY_EVENT)
 267                         opal_poll_events(NULL);
 268                 else
 269                         mdelay(10);
 270         }
 271         for (;;)
 272                 opal_poll_events(NULL);
 273 }
 274
 275 static void __noreturn pnv_halt(void)
 276 {
 277         pnv_power_off();
 278 }
 279
 280 static void pnv_progress(char *s, unsigned short hex)
 281 {
 282 }
 283
 284 static void pnv_shutdown(void)
 285 {
 286         /* Let the PCI code clear up IODA tables */
 287         pnv_pci_shutdown();
 288
 289         /*
 290          * Stop OPAL activity: Unregister all OPAL interrupts so they
 291          * don't fire up while we kexec and make sure all potentially
 292          * DMA'ing ops are complete (such as dump retrieval).
 293          */
 294         opal_shutdown();
 295 }
 296
 297 #ifdef CONFIG_KEXEC_CORE
 298 static void pnv_kexec_wait_secondaries_down(void)
 299 {
 300         int my_cpu, i, notified = -1;
 301
 302         my_cpu = get_cpu();
 303
 304         for_each_online_cpu(i) {
 305                 uint8_t status;
 306                 int64_t rc, timeout = 1000;
 307
 308                 if (i == my_cpu)
 309                         continue;
 310
 311                 for (;;) {
 312                         rc = opal_query_cpu_status(get_hard_smp_processor_id(i),
 313                                                    &status);
 314                         if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED)
 315                                 break;
 316                         barrier();
 317                         if (i != notified) {
 318                                 printk(KERN_INFO "kexec: waiting for cpu %d "
 319                                        "(physical %d) to enter OPAL\n",
 320                                        i, paca[i].hw_cpu_id);
 321                                 notified = i;
 322                         }
 323
 324                         /*
 325                          * On crash secondaries might be unreachable or hung,
 326                          * so timeout if we've waited too long
 327                          * */
 328                         mdelay(1);
 329                         if (timeout-- == 0) {
 330                                 printk(KERN_ERR "kexec: timed out waiting for "
 331                                        "cpu %d (physical %d) to enter OPAL\n",
 332                                        i, paca[i].hw_cpu_id);
 333                                 break;
 334                         }
 335                 }
 336         }
 337 }
 338
 339 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
 340 {
 341         u64 reinit_flags;
 342
 343         if (xive_enabled())
 344                 xive_kexec_teardown_cpu(secondary);
 345         else
 346                 xics_kexec_teardown_cpu(secondary);
 347
 348         /* On OPAL, we return all CPUs to firmware */
 349         if (!firmware_has_feature(FW_FEATURE_OPAL))
 350                 return;
 351
 352         if (secondary) {
 353                 /* Return secondary CPUs to firmware on OPAL v3 */
 354                 mb();
 355                 get_paca()->kexec_state = KEXEC_STATE_REAL_MODE;
 356                 mb();
 357
 358                 /* Return the CPU to OPAL */
 359                 opal_return_cpu();
 360         } else {
 361                 /* Primary waits for the secondaries to have reached OPAL */
 362                 pnv_kexec_wait_secondaries_down();
 363
 364                 /* Switch XIVE back to emulation mode */
 365                 if (xive_enabled())
 366                         xive_shutdown();
 367
 368                 /*
 369                  * We might be running as little-endian - now that interrupts
 370                  * are disabled, reset the HILE bit to big-endian so we don't
 371                  * take interrupts in the wrong endian later
 372                  *
 373                  * We reinit to enable both radix and hash on P9 to ensure
 374                  * the mode used by the next kernel is always supported.
 375                  */
 376                 reinit_flags = OPAL_REINIT_CPUS_HILE_BE;
 377                 if (cpu_has_feature(CPU_FTR_ARCH_300))
 378                         reinit_flags |= OPAL_REINIT_CPUS_MMU_RADIX |
 379                                 OPAL_REINIT_CPUS_MMU_HASH;
 380                 opal_reinit_cpus(reinit_flags);
 381         }
 382 }
 383 #endif /* CONFIG_KEXEC_CORE */
 384
 385 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 386 static unsigned long pnv_memory_block_size(void)
 387 {
 388         /*
 389          * We map the kernel linear region with 1GB large pages on radix. For
 390          * memory hot unplug to work our memory block size must be at least
 391          * this size.
 392          */
 393         if (radix_enabled())
 394                 return 1UL * 1024 * 1024 * 1024;
 395         else
 396                 return 256UL * 1024 * 1024;
 397 }
 398 #endif
 399
 400 static void __init pnv_setup_machdep_opal(void)
 401 {
 402         ppc_md.get_boot_time = opal_get_boot_time;
 403         ppc_md.restart = pnv_restart;
 404         pm_power_off = pnv_power_off;
 405         ppc_md.halt = pnv_halt;
 406         ppc_md.machine_check_exception = opal_machine_check;
 407         ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery;
 408         ppc_md.hmi_exception_early = opal_hmi_exception_early;
 409         ppc_md.handle_hmi_exception = opal_handle_hmi_exception;
 410 }
 411
 412 static int __init pnv_probe(void)
 413 {
 414         if (!of_machine_is_compatible("ibm,powernv"))
 415                 return 0;
 416
 417         if (firmware_has_feature(FW_FEATURE_OPAL))
 418                 pnv_setup_machdep_opal();
 419
 420         pr_debug("PowerNV detected !\n");
 421
 422         pnv_init();
 423
 424         return 1;
 425 }
 426
 427 /*
 428  * Returns the cpu frequency for 'cpu' in Hz. This is used by
 429  * /proc/cpuinfo
 430  */
 431 static unsigned long pnv_get_proc_freq(unsigned int cpu)
 432 {
 433         unsigned long ret_freq;
 434
 435         ret_freq = cpufreq_get(cpu) * 1000ul;
 436
 437         /*
 438          * If the backend cpufreq driver does not exist,
 439          * then fallback to old way of reporting the clockrate.
 440          */
 441         if (!ret_freq)
 442                 ret_freq = ppc_proc_freq;
 443         return ret_freq;
 444 }
 445
 446 define_machine(powernv) {
 447         .name                   = "PowerNV",
 448         .probe                  = pnv_probe,
 449         .setup_arch             = pnv_setup_arch,
 450         .init_IRQ               = pnv_init_IRQ,
 451         .show_cpuinfo           = pnv_show_cpuinfo,
 452         .get_proc_freq          = pnv_get_proc_freq,
 453         .progress               = pnv_progress,
 454         .machine_shutdown       = pnv_shutdown,
 455         .power_save             = NULL,
 456         .calibrate_decr         = generic_calibrate_decr,
 457 #ifdef CONFIG_KEXEC_CORE
 458         .kexec_cpu_down         = pnv_kexec_cpu_down,
 459 #endif
 460 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 461         .memory_block_size      = pnv_memory_block_size,
 462 #endif
 463 };