arch/powerpc/platforms/powernv/opal-irqchip.c

   1 /*
   2  * This file implements an irqchip for OPAL events. Whenever there is
   3  * an interrupt that is handled by OPAL we get passed a list of events
   4  * that Linux needs to do something about. These basically look like
   5  * interrupts to Linux so we implement an irqchip to handle them.
   6  *
   7  * Copyright Alistair Popple, IBM Corporation 2014.
   8  *
   9  * This program is free software; you can redistribute  it and/or modify it
  10  * under  the terms of  the GNU General  Public License as published by the
  11  * Free Software Foundation;  either version 2 of the  License, or (at your
  12  * option) any later version.
  13  */
  14 #include <linux/bitops.h>
  15 #include <linux/irq.h>
  16 #include <linux/irqchip.h>
  17 #include <linux/irqdomain.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/module.h>
  20 #include <linux/of.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/kthread.h>
  23 #include <linux/delay.h>
  24 #include <linux/slab.h>
  25 #include <linux/of_irq.h>
  26
  27 #include <asm/machdep.h>
  28 #include <asm/opal.h>
  29
  30 #include "powernv.h"
  31
  32 /* Maximum number of events supported by OPAL firmware */
  33 #define MAX_NUM_EVENTS 64
  34
  35 struct opal_event_irqchip {
  36         struct irq_chip irqchip;
  37         struct irq_domain *domain;
  38         unsigned long mask;
  39 };
  40 static struct opal_event_irqchip opal_event_irqchip;
  41 static u64 last_outstanding_events;
  42 static int opal_irq_count;
  43 static struct resource *opal_irqs;
  44
  45 void opal_handle_events(void)
  46 {
  47         __be64 events = 0;
  48         u64 e;
  49
  50         e = READ_ONCE(last_outstanding_events) & opal_event_irqchip.mask;
  51 again:
  52         while (e) {
  53                 int virq, hwirq;
  54
  55                 hwirq = fls64(e) - 1;
  56                 e &= ~BIT_ULL(hwirq);
  57
  58                 local_irq_disable();
  59                 virq = irq_find_mapping(opal_event_irqchip.domain, hwirq);
  60                 if (virq) {
  61                         irq_enter();
  62                         generic_handle_irq(virq);
  63                         irq_exit();
  64                 }
  65                 local_irq_enable();
  66
  67                 cond_resched();
  68         }
  69         last_outstanding_events = 0;
  70         if (opal_poll_events(&events) != OPAL_SUCCESS)
  71                 return;
  72         e = be64_to_cpu(events) & opal_event_irqchip.mask;
  73         if (e)
  74                 goto again;
  75 }
  76
  77 bool opal_have_pending_events(void)
  78 {
  79         if (last_outstanding_events & opal_event_irqchip.mask)
  80                 return true;
  81         return false;
  82 }
  83
  84 static void opal_event_mask(struct irq_data *d)
  85 {
  86         clear_bit(d->hwirq, &opal_event_irqchip.mask);
  87 }
  88
  89 static void opal_event_unmask(struct irq_data *d)
  90 {
  91         set_bit(d->hwirq, &opal_event_irqchip.mask);
  92         if (opal_have_pending_events())
  93                 opal_wake_poller();
  94 }
  95
  96 static int opal_event_set_type(struct irq_data *d, unsigned int flow_type)
  97 {
  98         /*
  99          * For now we only support level triggered events. The irq
 100          * handler will be called continuously until the event has
 101          * been cleared in OPAL.
 102          */
 103         if (flow_type != IRQ_TYPE_LEVEL_HIGH)
 104                 return -EINVAL;
 105
 106         return 0;
 107 }
 108
 109 static struct opal_event_irqchip opal_event_irqchip = {
 110         .irqchip = {
 111                 .name = "OPAL EVT",
 112                 .irq_mask = opal_event_mask,
 113                 .irq_unmask = opal_event_unmask,
 114                 .irq_set_type = opal_event_set_type,
 115         },
 116         .mask = 0,
 117 };
 118
 119 static int opal_event_map(struct irq_domain *d, unsigned int irq,
 120                         irq_hw_number_t hwirq)
 121 {
 122         irq_set_chip_data(irq, &opal_event_irqchip);
 123         irq_set_chip_and_handler(irq, &opal_event_irqchip.irqchip,
 124                                 handle_level_irq);
 125
 126         return 0;
 127 }
 128
 129 static irqreturn_t opal_interrupt(int irq, void *data)
 130 {
 131         __be64 events;
 132
 133         opal_handle_interrupt(virq_to_hw(irq), &events);
 134         last_outstanding_events = be64_to_cpu(events);
 135         if (opal_have_pending_events())
 136                 opal_wake_poller();
 137
 138         return IRQ_HANDLED;
 139 }
 140
 141 static int opal_event_match(struct irq_domain *h, struct device_node *node,
 142                             enum irq_domain_bus_token bus_token)
 143 {
 144         return irq_domain_get_of_node(h) == node;
 145 }
 146
 147 static int opal_event_xlate(struct irq_domain *h, struct device_node *np,
 148                            const u32 *intspec, unsigned int intsize,
 149                            irq_hw_number_t *out_hwirq, unsigned int *out_flags)
 150 {
 151         *out_hwirq = intspec[0];
 152         *out_flags = IRQ_TYPE_LEVEL_HIGH;
 153
 154         return 0;
 155 }
 156
 157 static const struct irq_domain_ops opal_event_domain_ops = {
 158         .match  = opal_event_match,
 159         .map    = opal_event_map,
 160         .xlate  = opal_event_xlate,
 161 };
 162
 163 void opal_event_shutdown(void)
 164 {
 165         unsigned int i;
 166
 167         /* First free interrupts, which will also mask them */
 168         for (i = 0; i < opal_irq_count; i++) {
 169                 if (!opal_irqs || !opal_irqs[i].start)
 170                         continue;
 171
 172                 if (in_interrupt() || irqs_disabled())
 173                         disable_irq_nosync(opal_irqs[i].start);
 174                 else
 175                         free_irq(opal_irqs[i].start, NULL);
 176
 177                 opal_irqs[i].start = 0;
 178         }
 179 }
 180
 181 int __init opal_event_init(void)
 182 {
 183         struct device_node *dn, *opal_node;
 184         bool old_style = false;
 185         int i, rc = 0;
 186
 187         opal_node = of_find_node_by_path("/ibm,opal");
 188         if (!opal_node) {
 189                 pr_warn("opal: Node not found\n");
 190                 return -ENODEV;
 191         }
 192
 193         /* If dn is NULL it means the domain won't be linked to a DT
 194          * node so therefore irq_of_parse_and_map(...) wont work. But
 195          * that shouldn't be problem because if we're running a
 196          * version of skiboot that doesn't have the dn then the
 197          * devices won't have the correct properties and will have to
 198          * fall back to the legacy method (opal_event_request(...))
 199          * anyway. */
 200         dn = of_find_compatible_node(NULL, NULL, "ibm,opal-event");
 201         opal_event_irqchip.domain = irq_domain_add_linear(dn, MAX_NUM_EVENTS,
 202                                 &opal_event_domain_ops, &opal_event_irqchip);
 203         of_node_put(dn);
 204         if (!opal_event_irqchip.domain) {
 205                 pr_warn("opal: Unable to create irq domain\n");
 206                 rc = -ENOMEM;
 207                 goto out;
 208         }
 209
 210         /* Look for new-style (standard) "interrupts" property */
 211         opal_irq_count = of_irq_count(opal_node);
 212
 213         /* Absent ? Look for the old one */
 214         if (opal_irq_count < 1) {
 215                 /* Get opal-interrupts property and names if present */
 216                 rc = of_property_count_u32_elems(opal_node, "opal-interrupts");
 217                 if (rc > 0)
 218                         opal_irq_count = rc;
 219                 old_style = true;
 220         }
 221
 222         /* No interrupts ? Bail out */
 223         if (!opal_irq_count)
 224                 goto out;
 225
 226         pr_debug("OPAL: Found %d interrupts reserved for OPAL using %s scheme\n",
 227                  opal_irq_count, old_style ? "old" : "new");
 228
 229         /* Allocate an IRQ resources array */
 230         opal_irqs = kcalloc(opal_irq_count, sizeof(struct resource), GFP_KERNEL);
 231         if (WARN_ON(!opal_irqs)) {
 232                 rc = -ENOMEM;
 233                 goto out;
 234         }
 235
 236         /* Build the resources array */
 237         if (old_style) {
 238                 /* Old style "opal-interrupts" property */
 239                 for (i = 0; i < opal_irq_count; i++) {
 240                         struct resource *r = &opal_irqs[i];
 241                         const char *name = NULL;
 242                         u32 hw_irq;
 243                         int virq;
 244
 245                         rc = of_property_read_u32_index(opal_node, "opal-interrupts",
 246                                                         i, &hw_irq);
 247                         if (WARN_ON(rc < 0)) {
 248                                 opal_irq_count = i;
 249                                 break;
 250                         }
 251                         of_property_read_string_index(opal_node, "opal-interrupts-names",
 252                                                       i, &name);
 253                         virq = irq_create_mapping(NULL, hw_irq);
 254                         if (!virq) {
 255                                 pr_warn("Failed to map OPAL irq 0x%x\n", hw_irq);
 256                                 continue;
 257                         }
 258                         r->start = r->end = virq;
 259                         r->flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW;
 260                         r->name = name;
 261                 }
 262         } else {
 263                 /* new style standard "interrupts" property */
 264                 rc = of_irq_to_resource_table(opal_node, opal_irqs, opal_irq_count);
 265                 if (WARN_ON(rc < 0)) {
 266                         opal_irq_count = 0;
 267                         kfree(opal_irqs);
 268                         goto out;
 269                 }
 270                 if (WARN_ON(rc < opal_irq_count))
 271                         opal_irq_count = rc;
 272         }
 273
 274         /* Install interrupt handlers */
 275         for (i = 0; i < opal_irq_count; i++) {
 276                 struct resource *r = &opal_irqs[i];
 277                 const char *name;
 278
 279                 /* Prefix name */
 280                 if (r->name && strlen(r->name))
 281                         name = kasprintf(GFP_KERNEL, "opal-%s", r->name);
 282                 else
 283                         name = kasprintf(GFP_KERNEL, "opal");
 284
 285                 /* Install interrupt handler */
 286                 rc = request_irq(r->start, opal_interrupt, r->flags & IRQD_TRIGGER_MASK,
 287                                  name, NULL);
 288                 if (rc) {
 289                         pr_warn("Error %d requesting OPAL irq %d\n", rc, (int)r->start);
 290                         continue;
 291                 }
 292         }
 293         rc = 0;
 294  out:
 295         of_node_put(opal_node);
 296         return rc;
 297 }
 298 machine_arch_initcall(powernv, opal_event_init);
 299
 300 /**
 301  * opal_event_request(unsigned int opal_event_nr) - Request an event
 302  * @opal_event_nr: the opal event number to request
 303  *
 304  * This routine can be used to find the linux virq number which can
 305  * then be passed to request_irq to assign a handler for a particular
 306  * opal event. This should only be used by legacy devices which don't
 307  * have proper device tree bindings. Most devices should use
 308  * irq_of_parse_and_map() instead.
 309  */
 310 int opal_event_request(unsigned int opal_event_nr)
 311 {
 312         if (WARN_ON_ONCE(!opal_event_irqchip.domain))
 313                 return 0;
 314
 315         return irq_create_mapping(opal_event_irqchip.domain, opal_event_nr);
 316 }
 317 EXPORT_SYMBOL(opal_event_request);