1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2006 PA Semi, Inc
5 * Authors: Kip Walker, PA Semi
6 * Olof Johansson, PA Semi
8 * Maintained by: Olof Johansson <olof@lixom.net>
10 * Based on arch/powerpc/platforms/maple/pci.c
14 #include <linux/kernel.h>
15 #include <linux/pci.h>
17 #include <asm/pci-bridge.h>
18 #include <asm/isa-bridge.h>
19 #include <asm/machdep.h>
21 #include <asm/ppc-pci.h>
25 #define PA_PXP_CFA(bus, devfn, off) (((bus) << 20) | ((devfn) << 12) | (off))
27 static inline int pa_pxp_offset_valid(u8 bus, u8 devfn, int offset)
29 /* Device 0 Function 0 is special: It's config space spans function 1 as
30 * well, so allow larger offset. It's really a two-function device but the
31 * second function does not probe.
33 if (bus == 0 && devfn == 0)
39 static void volatile __iomem *pa_pxp_cfg_addr(struct pci_controller *hose,
40 u8 bus, u8 devfn, int offset)
42 return hose->cfg_data + PA_PXP_CFA(bus, devfn, offset);
45 static inline int is_root_port(int busno, int devfn)
47 return ((busno == 0) && (PCI_FUNC(devfn) < 4) &&
48 ((PCI_SLOT(devfn) == 16) || (PCI_SLOT(devfn) == 17)));
51 static inline int is_5945_reg(int reg)
53 return (((reg >= 0x18) && (reg < 0x34)) ||
54 ((reg >= 0x158) && (reg < 0x178)));
57 static int workaround_5945(struct pci_bus *bus, unsigned int devfn,
58 int offset, int len, u32 *val)
60 struct pci_controller *hose;
61 void volatile __iomem *addr, *dummy;
65 if (!is_root_port(bus->number, devfn) || !is_5945_reg(offset))
68 hose = pci_bus_to_host(bus);
70 addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset & ~0x3);
73 /* Workaround bug 5945: write 0 to a dummy register before reading,
74 * and write back what we read. We must read/write the full 32-bit
75 * contents so we need to shift and mask by hand.
77 dummy = pa_pxp_cfg_addr(hose, bus->number, devfn, 0x10);
84 *val = (tmp >> (8*byte)) & 0xff;
90 *val = (tmp >> 16) & 0xffff;
100 #ifdef CONFIG_PPC_PASEMI_NEMO
101 #define PXP_ERR_CFG_REG 0x4
102 #define PXP_IGNORE_PCIE_ERRORS 0x800
105 static void sb600_set_flag(int bus)
107 static void __iomem *iob_mapbase = NULL;
109 struct device_node *dn;
112 if (iob_mapbase == NULL) {
113 dn = of_find_compatible_node(NULL, "isa", "pasemi,1682m-iob");
115 pr_crit("NEMO SB600 missing iob node\n");
119 err = of_address_to_resource(dn, 0, &res);
123 pr_crit("NEMO SB600 missing resource\n");
127 pr_info("NEMO SB600 IOB base %08llx\n",res.start);
129 iob_mapbase = ioremap(res.start + 0x100, 0x94);
132 if (iob_mapbase != NULL) {
133 if (bus == SB600_BUS) {
135 * This is the SB600's bus, tell the PCI-e root port
136 * to allow non-zero devices to enumerate.
138 out_le32(iob_mapbase + PXP_ERR_CFG_REG, in_le32(iob_mapbase + PXP_ERR_CFG_REG) | PXP_IGNORE_PCIE_ERRORS);
141 * Only scan device 0 on other busses
143 out_le32(iob_mapbase + PXP_ERR_CFG_REG, in_le32(iob_mapbase + PXP_ERR_CFG_REG) & ~PXP_IGNORE_PCIE_ERRORS);
150 static void sb600_set_flag(int bus)
155 static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn,
156 int offset, int len, u32 *val)
158 struct pci_controller *hose;
159 void volatile __iomem *addr;
161 hose = pci_bus_to_host(bus);
163 return PCIBIOS_DEVICE_NOT_FOUND;
165 if (!pa_pxp_offset_valid(bus->number, devfn, offset))
166 return PCIBIOS_BAD_REGISTER_NUMBER;
168 if (workaround_5945(bus, devfn, offset, len, val))
169 return PCIBIOS_SUCCESSFUL;
171 addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset);
173 sb600_set_flag(bus->number);
176 * Note: the caller has already checked that offset is
177 * suitably aligned and that len is 1, 2 or 4.
184 *val = in_le16(addr);
187 *val = in_le32(addr);
191 return PCIBIOS_SUCCESSFUL;
194 static int pa_pxp_write_config(struct pci_bus *bus, unsigned int devfn,
195 int offset, int len, u32 val)
197 struct pci_controller *hose;
198 void volatile __iomem *addr;
200 hose = pci_bus_to_host(bus);
202 return PCIBIOS_DEVICE_NOT_FOUND;
204 if (!pa_pxp_offset_valid(bus->number, devfn, offset))
205 return PCIBIOS_BAD_REGISTER_NUMBER;
207 addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset);
209 sb600_set_flag(bus->number);
212 * Note: the caller has already checked that offset is
213 * suitably aligned and that len is 1, 2 or 4.
226 return PCIBIOS_SUCCESSFUL;
229 static struct pci_ops pa_pxp_ops = {
230 .read = pa_pxp_read_config,
231 .write = pa_pxp_write_config,
234 static void __init setup_pa_pxp(struct pci_controller *hose)
236 hose->ops = &pa_pxp_ops;
237 hose->cfg_data = ioremap(0xe0000000, 0x10000000);
240 static int __init pas_add_bridge(struct device_node *dev)
242 struct pci_controller *hose;
244 pr_debug("Adding PCI host bridge %pOF\n", dev);
246 hose = pcibios_alloc_controller(dev);
250 hose->first_busno = 0;
251 hose->last_busno = 0xff;
252 hose->controller_ops = pasemi_pci_controller_ops;
256 pr_info("Found PA-PXP PCI host bridge.\n");
258 /* Interpret the "ranges" property */
259 pci_process_bridge_OF_ranges(hose, dev, 1);
262 * Scan for an isa bridge. This is needed to find the SB600 on the nemo
263 * and does nothing on machines without one.
265 isa_bridge_find_early(hose);
270 void __init pas_pci_init(void)
272 struct device_node *np, *root;
275 root = of_find_node_by_path("/");
277 pr_crit("pas_pci_init: can't find root of device tree\n");
281 pci_set_flags(PCI_SCAN_ALL_PCIE_DEVS);
283 np = of_find_compatible_node(root, NULL, "pasemi,rootbus");
285 res = pas_add_bridge(np);
290 void __iomem *pasemi_pci_getcfgaddr(struct pci_dev *dev, int offset)
292 struct pci_controller *hose;
294 hose = pci_bus_to_host(dev->bus);
296 return (void __iomem *)pa_pxp_cfg_addr(hose, dev->bus->number, dev->devfn, offset);
299 struct pci_controller_ops pasemi_pci_controller_ops;