1 # SPDX-License-Identifier: GPL-2.0
5 select KASAN_VMALLOC if KASAN && MODULES
11 This option selects whether a 32-bit or a 64-bit kernel
14 menu "Processor support"
16 prompt "Processor Type"
19 There are five families of 32 bit PowerPC chips supported.
20 The most common ones are the desktop and server CPUs (603,
21 604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
22 embedded 512x/52xx/82xx/83xx/86xx counterparts.
23 The other embedded parts, namely 4xx, 8xx and e500
24 (85xx) each form a family of their own that is not compatible
27 If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.
30 bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
32 select PPC_HAVE_PMU_SUPPORT
33 select HAVE_ARCH_VMAP_STACK
41 select ARCH_SUPPORTS_HUGETLBFS
44 select HAVE_ARCH_VMAP_STACK
53 select PPC_KUEP if PPC_KUAP
56 bool "AMCC 44x, 46x or 47x"
67 bool "Support for 603 SW loaded TLB"
68 depends on PPC_BOOK3S_32
71 Provide support for processors based on the 603 cores. Those
72 processors don't have a HASH MMU and provide SW TLB loading.
75 bool "Support for 604+ HASH MMU" if PPC_BOOK3S_603
76 depends on PPC_BOOK3S_32
79 Provide support for processors not based on the 603 cores.
80 Those processors have a HASH MMU.
83 prompt "Processor Type"
86 There are two families of 64 bit PowerPC chips supported.
87 The most common ones are the desktop and server CPUs
88 (POWER5, 970, POWER5+, POWER6, POWER7, POWER8, POWER9 ...)
90 The other are the "embedded" processors compliant with the
91 "Book 3E" variant of the architecture
94 bool "Server processors"
96 select PPC_HAVE_PMU_SUPPORT
97 select HAVE_ARCH_TRANSPARENT_HUGEPAGE
98 select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION
99 select ARCH_ENABLE_SPLIT_PMD_PTLOCK
100 select ARCH_ENABLE_THP_MIGRATION if TRANSPARENT_HUGEPAGE
101 select ARCH_SUPPORTS_HUGETLBFS
102 select ARCH_SUPPORTS_NUMA_BALANCING
106 select PPC_64S_HASH_MMU if !PPC_RADIX_MMU
107 select KASAN_VMALLOC if KASAN
110 bool "Embedded processors"
111 select PPC_FSL_BOOK3E
112 select PPC_FPU # Make it a choice ?
113 select PPC_SMP_MUXED_IPI
120 prompt "CPU selection"
123 This will create a kernel which is optimised for a particular CPU.
124 The resulting kernel may not run on other CPUs, so use this with care.
126 If unsure, select Generic.
129 bool "Generic (POWER4 and above)"
130 depends on PPC64 && !CPU_LITTLE_ENDIAN
131 select PPC_64S_HASH_MMU if PPC_BOOK3S_64
134 bool "Generic (POWER8 and above)"
135 depends on PPC64 && CPU_LITTLE_ENDIAN
136 select ARCH_HAS_FAST_MULTIPLIER
137 select PPC_64S_HASH_MMU
140 bool "Generic 32 bits powerpc"
141 depends on PPC32 && !PPC_8xx
144 bool "Cell Broadband Engine"
145 depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
146 select PPC_64S_HASH_MMU
150 depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
151 select PPC_64S_HASH_MMU
155 depends on PPC_BOOK3S_64 && !CPU_LITTLE_ENDIAN
156 select PPC_64S_HASH_MMU
160 depends on PPC_BOOK3S_64
161 select ARCH_HAS_FAST_MULTIPLIER
162 select PPC_64S_HASH_MMU
166 depends on PPC_BOOK3S_64
167 select ARCH_HAS_FAST_MULTIPLIER
168 select PPC_64S_HASH_MMU
172 depends on PPC_BOOK3S_64
173 select ARCH_HAS_FAST_MULTIPLIER
176 bool "Freescale e5500"
180 bool "Freescale e6500"
189 depends on PPC_BOOK3S_32
193 depends on PPC_BOOK3S_32
197 depends on PPC_BOOK3S_32
202 config TARGET_CPU_BOOL
208 depends on TARGET_CPU_BOOL
209 default "cell" if CELL_CPU
210 default "power5" if POWER5_CPU
211 default "power6" if POWER6_CPU
212 default "power7" if POWER7_CPU
213 default "power8" if POWER8_CPU
214 default "power9" if POWER9_CPU
215 default "860" if 860_CPU
216 default "e300c2" if E300C2_CPU
217 default "e300c3" if E300C3_CPU
218 default "G4" if G4_CPU
222 depends on PPC_BOOK3S_32 || PPC_BOOK3S_64
226 depends on PPC_BOOK3E_64
229 select FSL_EMB_PERFMON
230 select PPC_FSL_BOOK3E
234 bool "e500mc Support"
239 This must be enabled for running on e500mc (and derivatives
240 such as e5500/e6500), and must be disabled for running on
247 bool "Support for Floating Point Unit (FPU)" if PPC_MPC832x
251 This must be enabled to support the Floating Point Unit
252 Most 6xx have an FPU but e300c2 core (mpc832x) don't have
253 an FPU, so when building an embedded kernel for that target
254 you can disable FPU support.
258 config FSL_EMB_PERFMON
259 bool "Freescale Embedded Perfmon"
260 depends on E500 || PPC_83xx
262 This is the Performance Monitor support found on the e500 core
263 and some e300 cores (c3 and c4). Select this only if your
264 core supports the Embedded Performance Monitor APU
266 config FSL_EMB_PERF_EVENT
268 depends on FSL_EMB_PERFMON && PERF_EVENTS && !PPC_PERF_CTRS
271 config FSL_EMB_PERF_EVENT_E500
273 depends on FSL_EMB_PERF_EVENT && E500
278 depends on 40x || 44x
283 depends on E500 || 44x || PPC_BOOK3E
288 depends on BOOKE || 40x
293 depends on E500 && PPC32
296 # this is for common code between PPC32 & PPC64 FSL BOOKE
297 config PPC_FSL_BOOK3E
299 select ARCH_SUPPORTS_HUGETLBFS if PHYS_64BIT || PPC64
300 imply FSL_EMB_PERFMON
301 select PPC_SMP_MUXED_IPI
304 default y if FSL_BOOKE
308 depends on 44x || E500 || PPC_86xx
309 default y if PHYS_64BIT
312 bool 'Large physical address support' if E500 || PPC_86xx
313 depends on (44x || E500 || PPC_86xx) && !PPC_83xx && !PPC_82xx
314 select PHYS_ADDR_T_64BIT
316 This option enables kernel support for larger than 32-bit physical
317 addresses. This feature may not be available on all cores.
319 If you have more than 3.5GB of RAM or so, you also need to enable
320 SWIOTLB under Kernel Options for this to work. The actual number
321 is platform-dependent.
323 If in doubt, say N here.
326 bool "AltiVec Support"
327 depends on PPC_BOOK3S_32 || PPC_BOOK3S_64 || (PPC_E500MC && PPC64)
330 This option enables kernel support for the Altivec extensions to the
331 PowerPC processor. The kernel currently supports saving and restoring
332 altivec registers, and turning on the 'altivec enable' bit so user
333 processes can execute altivec instructions.
335 This option is only usefully if you have a processor that supports
336 altivec (G4, otherwise known as 74xx series), but does not have
337 any affect on a non-altivec cpu (it does, however add code to the
340 If in doubt, say Y here.
344 depends on PPC_BOOK3S_64 && ALTIVEC && PPC_FPU
347 This option enables kernel support for the Vector Scaler extensions
348 to the PowerPC processor. The kernel currently supports saving and
349 restoring VSX registers, and turning on the 'VSX enable' bit so user
350 processes can execute VSX instructions.
352 This option is only useful if you have a processor that supports
353 VSX (P7 and above), but does not have any affect on a non-VSX
354 CPUs (it does, however add code to the kernel).
356 If in doubt, say Y here.
360 depends on E500 && !PPC_E500MC
364 depends on SPE_POSSIBLE
367 This option enables kernel support for the Signal Processing
368 Extensions (SPE) to the PowerPC processor. The kernel currently
369 supports saving and restoring SPE registers, and turning on the
370 'spe enable' bit so user processes can execute SPE instructions.
372 This option is only useful if you have a processor that supports
373 SPE (e500, otherwise known as 85xx series), but does not have any
374 effect on a non-spe cpu (it does, however add code to the kernel).
376 If in doubt, say Y here.
378 config PPC_64S_HASH_MMU
379 bool "Hash MMU Support"
380 depends on PPC_BOOK3S_64
383 Enable support for the Power ISA Hash style MMU. This is implemented
384 by all IBM Power and other 64-bit Book3S CPUs before ISA v3.0. The
385 OpenPOWER ISA does not mandate the hash MMU and some CPUs do not
386 implement it (e.g., Microwatt).
388 Note that POWER9 PowerVM platforms only support the hash
389 MMU. From POWER10 radix is also supported by PowerVM.
391 If you're unsure, say Y.
394 bool "Radix MMU Support"
395 depends on PPC_BOOK3S_64
396 select ARCH_HAS_GIGANTIC_PAGE
399 Enable support for the Power ISA 3.0 Radix style MMU. Currently this
400 is only implemented by IBM Power9 CPUs, if you don't have one of them
401 you can probably disable this.
403 config PPC_RADIX_MMU_DEFAULT
404 bool "Default to using the Radix MMU when possible" if PPC_64S_HASH_MMU
405 depends on PPC_BOOK3S_64
406 depends on PPC_RADIX_MMU
409 When the hardware supports the Radix MMU, default to using it unless
410 "disable_radix[=yes]" is specified on the kernel command line.
412 If this option is disabled, the Hash MMU will be used by default,
413 unless "disable_radix=no" is specified on the kernel command line.
415 If you're unsure, say Y.
418 bool "Kernel Userspace Execution Prevention" if !40x
421 Enable support for Kernel Userspace Execution Prevention (KUEP)
423 If you're unsure, say Y.
426 bool "Kernel Userspace Access Protection"
429 Enable support for Kernel Userspace Access Protection (KUAP)
431 If you're unsure, say Y.
433 config PPC_KUAP_DEBUG
434 bool "Extra debugging for Kernel Userspace Access Protection"
437 Add extra debugging for Kernel Userspace Access Protection (KUAP)
438 If you're unsure, say N.
442 depends on PPC_BOOK3S_64
443 depends on PPC_MEM_KEYS || PPC_KUAP || PPC_KUEP
446 config PPC_MMU_NOHASH
448 depends on !PPC_BOOK3S
450 config PPC_BOOK3E_MMU
452 depends on FSL_BOOKE || PPC_BOOK3E
454 config PPC_HAVE_PMU_SUPPORT
458 bool "Create PMU SPRs sysfs file"
461 This option enables sysfs file creation for PMU SPRs like MMCR* and PMC*.
465 depends on PERF_EVENTS && PPC_HAVE_PMU_SUPPORT
467 This enables the powerpc-specific perf_event back-end.
470 # Allow platforms to force SMP=y by selecting this
475 depends on PPC_BOOK3S || PPC_BOOK3E || FSL_BOOKE || PPC_47x
476 select GENERIC_IRQ_MIGRATION
477 bool "Symmetric multi-processing support" if !FORCE_SMP
479 This enables support for systems with more than one CPU. If you have
480 a system with only one CPU, say N. If you have a system with more
481 than one CPU, say Y. Note that the kernel does not currently
482 support SMP machines with 603/603e/603ev or PPC750 ("G3") processors
483 since they have inadequate hardware support for multiprocessor
486 If you say N here, the kernel will run on single and multiprocessor
487 machines, but will use only one CPU of a multiprocessor machine. If
488 you say Y here, the kernel will run on single-processor machines.
489 On a single-processor machine, the kernel will run faster if you say
492 If you don't know what to do here, say N.
495 int "Maximum number of CPUs (2-8192)" if SMP
498 default "32" if PPC64
501 config NOT_COHERENT_CACHE
503 depends on 4xx || PPC_8xx || PPC_MPC512x || \
504 GAMECUBE_COMMON || AMIGAONE
505 select ARCH_HAS_DMA_PREP_COHERENT
506 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
507 select ARCH_HAS_SYNC_DMA_FOR_CPU
508 select DMA_DIRECT_REMAP
512 config CHECK_CACHE_COHERENCY
522 depends on PPC32 || COMPAT
524 This symbol controls whether we build the 32-bit VDSO. We obviously
525 want to do that if we're building a 32-bit kernel. If we're building
526 a 64-bit kernel then we only want a 32-bit VDSO if we're also enabling
530 prompt "Endianness selection"
531 default CPU_BIG_ENDIAN
533 This option selects whether a big endian or little endian kernel will
536 config CPU_BIG_ENDIAN
537 bool "Build big endian kernel"
539 Build a big endian kernel.
541 If unsure, select this option.
543 config CPU_LITTLE_ENDIAN
544 bool "Build little endian kernel"
545 depends on PPC_BOOK3S_64
546 select PPC64_BOOT_WRAPPER
548 Build a little endian kernel.
550 Note that if cross compiling a little endian kernel,
551 CROSS_COMPILE must point to a toolchain capable of targeting
552 little endian powerpc.
556 config PPC64_ELF_ABI_V1
557 def_bool PPC64 && CPU_BIG_ENDIAN
559 config PPC64_ELF_ABI_V2
560 def_bool PPC64 && CPU_LITTLE_ENDIAN
562 config PPC64_BOOT_WRAPPER
564 depends on CPU_LITTLE_ENDIAN