arch/powerpc/platforms/8xx/ep88xc.c

   1 /*
   2  * Platform setup for the Embedded Planet EP88xC board
   3  *
   4  * Author: Scott Wood <scottwood@freescale.com>
   5  * Copyright 2007 Freescale Semiconductor, Inc.
   6  *
   7  * This file is licensed under the terms of the GNU General Public License
   8  * version 2. This program is licensed "as is" without any warranty of any
   9  * kind, whether express or implied.
  10  */
  11
  12 #include <linux/init.h>
  13 #include <linux/of_address.h>
  14 #include <linux/of_fdt.h>
  15 #include <linux/of_platform.h>
  16
  17 #include <asm/machdep.h>
  18 #include <asm/io.h>
  19 #include <asm/udbg.h>
  20 #include <asm/cpm1.h>
  21
  22 #include "mpc8xx.h"
  23 #include "pic.h"
  24
  25 struct cpm_pin {
  26         int port, pin, flags;
  27 };
  28
  29 static struct cpm_pin ep88xc_pins[] = {
  30         /* SMC1 */
  31         {1, 24, CPM_PIN_INPUT}, /* RX */
  32         {1, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
  33
  34         /* SCC2 */
  35         {0, 12, CPM_PIN_INPUT}, /* TX */
  36         {0, 13, CPM_PIN_INPUT}, /* RX */
  37         {2, 8, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CD */
  38         {2, 9, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CTS */
  39         {2, 14, CPM_PIN_INPUT}, /* RTS */
  40
  41         /* MII1 */
  42         {0, 0, CPM_PIN_INPUT},
  43         {0, 1, CPM_PIN_INPUT},
  44         {0, 2, CPM_PIN_INPUT},
  45         {0, 3, CPM_PIN_INPUT},
  46         {0, 4, CPM_PIN_OUTPUT},
  47         {0, 10, CPM_PIN_OUTPUT},
  48         {0, 11, CPM_PIN_OUTPUT},
  49         {1, 19, CPM_PIN_INPUT},
  50         {1, 31, CPM_PIN_INPUT},
  51         {2, 12, CPM_PIN_INPUT},
  52         {2, 13, CPM_PIN_INPUT},
  53         {3, 8, CPM_PIN_INPUT},
  54         {4, 30, CPM_PIN_OUTPUT},
  55         {4, 31, CPM_PIN_OUTPUT},
  56
  57         /* MII2 */
  58         {4, 14, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  59         {4, 15, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  60         {4, 16, CPM_PIN_OUTPUT},
  61         {4, 17, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  62         {4, 18, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  63         {4, 19, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  64         {4, 20, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
  65         {4, 21, CPM_PIN_OUTPUT},
  66         {4, 22, CPM_PIN_OUTPUT},
  67         {4, 23, CPM_PIN_OUTPUT},
  68         {4, 24, CPM_PIN_OUTPUT},
  69         {4, 25, CPM_PIN_OUTPUT},
  70         {4, 26, CPM_PIN_OUTPUT},
  71         {4, 27, CPM_PIN_OUTPUT},
  72         {4, 28, CPM_PIN_OUTPUT},
  73         {4, 29, CPM_PIN_OUTPUT},
  74
  75         /* USB */
  76         {0, 6, CPM_PIN_INPUT},  /* CLK2 */
  77         {0, 14, CPM_PIN_INPUT}, /* USBOE */
  78         {0, 15, CPM_PIN_INPUT}, /* USBRXD */
  79         {2, 6, CPM_PIN_OUTPUT}, /* USBTXN */
  80         {2, 7, CPM_PIN_OUTPUT}, /* USBTXP */
  81         {2, 10, CPM_PIN_INPUT}, /* USBRXN */
  82         {2, 11, CPM_PIN_INPUT}, /* USBRXP */
  83
  84         /* Misc */
  85         {1, 26, CPM_PIN_INPUT}, /* BRGO2 */
  86         {1, 27, CPM_PIN_INPUT}, /* BRGO1 */
  87 };
  88
  89 static void __init init_ioports(void)
  90 {
  91         int i;
  92
  93         for (i = 0; i < ARRAY_SIZE(ep88xc_pins); i++) {
  94                 struct cpm_pin *pin = &ep88xc_pins[i];
  95                 cpm1_set_pin(pin->port, pin->pin, pin->flags);
  96         }
  97
  98         cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX);
  99         cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK2, CPM_CLK_TX); /* USB */
 100         cpm1_clk_setup(CPM_CLK_SCC1, CPM_CLK2, CPM_CLK_RX);
 101         cpm1_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
 102         cpm1_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
 103 }
 104
 105 static u8 __iomem *ep88xc_bcsr;
 106
 107 #define BCSR7_SCC2_ENABLE 0x10
 108
 109 #define BCSR8_PHY1_ENABLE 0x80
 110 #define BCSR8_PHY1_POWER  0x40
 111 #define BCSR8_PHY2_ENABLE 0x20
 112 #define BCSR8_PHY2_POWER  0x10
 113
 114 #define BCSR9_USB_ENABLE  0x80
 115 #define BCSR9_USB_POWER   0x40
 116 #define BCSR9_USB_HOST    0x20
 117 #define BCSR9_USB_FULL_SPEED_TARGET 0x10
 118
 119 static void __init ep88xc_setup_arch(void)
 120 {
 121         struct device_node *np;
 122
 123         cpm_reset();
 124         init_ioports();
 125
 126         np = of_find_compatible_node(NULL, NULL, "fsl,ep88xc-bcsr");
 127         if (!np) {
 128                 printk(KERN_CRIT "Could not find fsl,ep88xc-bcsr node\n");
 129                 return;
 130         }
 131
 132         ep88xc_bcsr = of_iomap(np, 0);
 133         of_node_put(np);
 134
 135         if (!ep88xc_bcsr) {
 136                 printk(KERN_CRIT "Could not remap BCSR\n");
 137                 return;
 138         }
 139
 140         setbits8(&ep88xc_bcsr[7], BCSR7_SCC2_ENABLE);
 141         setbits8(&ep88xc_bcsr[8], BCSR8_PHY1_ENABLE | BCSR8_PHY1_POWER |
 142                                   BCSR8_PHY2_ENABLE | BCSR8_PHY2_POWER);
 143 }
 144
 145 static const struct of_device_id of_bus_ids[] __initconst = {
 146         { .name = "soc", },
 147         { .name = "cpm", },
 148         { .name = "localbus", },
 149         {},
 150 };
 151
 152 static int __init declare_of_platform_devices(void)
 153 {
 154         /* Publish the QE devices */
 155         of_platform_bus_probe(NULL, of_bus_ids, NULL);
 156
 157         return 0;
 158 }
 159 machine_device_initcall(ep88xc, declare_of_platform_devices);
 160
 161 define_machine(ep88xc) {
 162         .name = "Embedded Planet EP88xC",
 163         .compatible = "fsl,ep88xc",
 164         .setup_arch = ep88xc_setup_arch,
 165         .init_IRQ = mpc8xx_pic_init,
 166         .get_irq        = mpc8xx_get_irq,
 167         .restart = mpc8xx_restart,
 168         .calibrate_decr = mpc8xx_calibrate_decr,
 169         .progress = udbg_progress,
 170 };