2 * GE SBC310 board support
4 * Author: Martyn Welch <martyn.welch@ge.com>
6 * Copyright 2008 GE Intelligent Platforms Embedded Systems, Inc.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * Based on: mpc86xx_hpcn.c (MPC86xx HPCN board specific routines)
14 * Copyright 2006 Freescale Semiconductor Inc.
16 * NEC fixup adapted from arch/mips/pci/fixup-lm2e.c
19 #include <linux/stddef.h>
20 #include <linux/kernel.h>
21 #include <linux/pci.h>
22 #include <linux/kdev_t.h>
23 #include <linux/delay.h>
24 #include <linux/seq_file.h>
25 #include <linux/of_platform.h>
28 #include <asm/machdep.h>
29 #include <asm/pci-bridge.h>
31 #include <mm/mmu_decl.h>
35 #include <asm/nvram.h>
37 #include <sysdev/fsl_pci.h>
38 #include <sysdev/fsl_soc.h>
39 #include <sysdev/ge/ge_pic.h>
46 #define DBG (fmt...) do { printk(KERN_ERR "SBC310: " fmt); } while (0)
48 #define DBG (fmt...) do { } while (0)
51 void __iomem *sbc310_regs;
53 static void __init gef_sbc310_init_irq(void)
55 struct device_node *cascade_node = NULL;
60 * There is a simple interrupt handler in the main FPGA, this needs
61 * to be cascaded into the MPIC
63 cascade_node = of_find_compatible_node(NULL, NULL, "gef,fpga-pic");
65 printk(KERN_WARNING "SBC310: No FPGA PIC\n");
69 gef_pic_init(cascade_node);
70 of_node_put(cascade_node);
73 static void __init gef_sbc310_setup_arch(void)
75 struct device_node *regs;
76 printk(KERN_INFO "GE Intelligent Platforms SBC310 6U VPX SBC\n");
82 fsl_pci_assign_primary();
84 /* Remap basic board registers */
85 regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs");
87 sbc310_regs = of_iomap(regs, 0);
88 if (sbc310_regs == NULL)
89 printk(KERN_WARNING "Unable to map board registers\n");
93 #if defined(CONFIG_MMIO_NVRAM)
98 /* Return the PCB revision */
99 static unsigned int gef_sbc310_get_board_id(void)
103 reg = ioread32(sbc310_regs);
107 /* Return the PCB revision */
108 static unsigned int gef_sbc310_get_pcb_rev(void)
112 reg = ioread32(sbc310_regs);
113 return (reg >> 8) & 0xff;
116 /* Return the board (software) revision */
117 static unsigned int gef_sbc310_get_board_rev(void)
121 reg = ioread32(sbc310_regs);
122 return (reg >> 16) & 0xff;
125 /* Return the FPGA revision */
126 static unsigned int gef_sbc310_get_fpga_rev(void)
130 reg = ioread32(sbc310_regs);
131 return (reg >> 24) & 0xf;
134 static void gef_sbc310_show_cpuinfo(struct seq_file *m)
136 uint svid = mfspr(SPRN_SVR);
138 seq_printf(m, "Vendor\t\t: GE Intelligent Platforms\n");
140 seq_printf(m, "Board ID\t: 0x%2.2x\n", gef_sbc310_get_board_id());
141 seq_printf(m, "Revision\t: %u%c\n", gef_sbc310_get_pcb_rev(),
142 ('A' + gef_sbc310_get_board_rev() - 1));
143 seq_printf(m, "FPGA Revision\t: %u\n", gef_sbc310_get_fpga_rev());
145 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
149 static void gef_sbc310_nec_fixup(struct pci_dev *pdev)
153 /* Do not do the fixup on other platforms! */
154 if (!machine_is(gef_sbc310))
157 printk(KERN_INFO "Running NEC uPD720101 Fixup\n");
159 /* Ensure only ports 1 & 2 are enabled */
160 pci_read_config_dword(pdev, 0xe0, &val);
161 pci_write_config_dword(pdev, 0xe0, (val & ~7) | 0x2);
163 /* System clock is 48-MHz Oscillator and EHCI Enabled. */
164 pci_write_config_dword(pdev, 0xe4, 1 << 5);
166 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB,
167 gef_sbc310_nec_fixup);
170 * Called very early, device-tree isn't unflattened
172 * This function is called to determine whether the BSP is compatible with the
173 * supplied device-tree, which is assumed to be the correct one for the actual
174 * board. It is expected thati, in the future, a kernel may support multiple
177 static int __init gef_sbc310_probe(void)
179 if (of_machine_is_compatible("gef,sbc310"))
185 machine_arch_initcall(gef_sbc310, mpc86xx_common_publish_devices);
187 define_machine(gef_sbc310) {
189 .probe = gef_sbc310_probe,
190 .setup_arch = gef_sbc310_setup_arch,
191 .init_IRQ = gef_sbc310_init_irq,
192 .show_cpuinfo = gef_sbc310_show_cpuinfo,
193 .get_irq = mpic_get_irq,
194 .time_init = mpc86xx_time_init,
195 .calibrate_decr = generic_calibrate_decr,
196 .progress = udbg_progress,
198 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,