1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Freescale P2020 board Setup
5 * Copyright 2007,2009,2012-2013 Freescale Semiconductor Inc.
6 * Copyright 2022-2023 Pali Rohár <pali@kernel.org>
9 #include <linux/stddef.h>
10 #include <linux/kernel.h>
13 #include <asm/machdep.h>
16 #include <asm/swiotlb.h>
17 #include <asm/ppc-pci.h>
19 #include <sysdev/fsl_pci.h>
24 static void __init p2020_pic_init(void)
27 int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU;
29 mpic = mpic_alloc(NULL, 0, flags, 0, 256, " OpenPIC ");
39 * Setup the architecture
41 static void __init p2020_setup_arch(void)
44 fsl_pci_assign_primary();
47 mpc85xx_qe_par_io_init();
51 * Called very early, device-tree isn't unflattened
53 static int __init p2020_probe(void)
55 struct device_node *p2020_cpu;
58 * There is no common compatible string for all P2020 boards.
59 * The only common thing is "PowerPC,P2020@0" cpu node.
60 * So check for P2020 board via this cpu node.
62 p2020_cpu = of_find_node_by_path("/cpus/PowerPC,P2020@0");
63 of_node_put(p2020_cpu);
68 machine_arch_initcall(p2020, mpc85xx_common_publish_devices);
70 define_machine(p2020) {
71 .name = "Freescale P2020",
73 .setup_arch = p2020_setup_arch,
74 .init_IRQ = p2020_pic_init,
76 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
77 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
79 .get_irq = mpic_get_irq,
80 .progress = udbg_progress,