arm64: dts: qcom: sm8550: add TRNG node
[linux-modified.git] / arch / powerpc / platforms / 85xx / p1023_rdb.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright 2010-2011, 2013 Freescale Semiconductor, Inc.
4  *
5  * Author: Roy Zang <tie-fei.zang@freescale.com>
6  *
7  * Description:
8  * P1023 RDB Board Setup
9  */
10
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/errno.h>
14 #include <linux/pci.h>
15 #include <linux/delay.h>
16 #include <linux/module.h>
17 #include <linux/fsl_devices.h>
18 #include <linux/of.h>
19 #include <linux/of_address.h>
20
21 #include <asm/time.h>
22 #include <asm/machdep.h>
23 #include <asm/pci-bridge.h>
24 #include <mm/mmu_decl.h>
25 #include <asm/udbg.h>
26 #include <asm/mpic.h>
27 #include "smp.h"
28
29 #include <sysdev/fsl_soc.h>
30 #include <sysdev/fsl_pci.h>
31
32 #include "mpc85xx.h"
33
34 /* ************************************************************************
35  *
36  * Setup the architecture
37  *
38  */
39 static void __init p1023_rdb_setup_arch(void)
40 {
41         struct device_node *np;
42
43         if (ppc_md.progress)
44                 ppc_md.progress("p1023_rdb_setup_arch()", 0);
45
46         /* Map BCSR area */
47         np = of_find_node_by_name(NULL, "bcsr");
48         if (np != NULL) {
49                 static u8 __iomem *bcsr_regs;
50
51                 bcsr_regs = of_iomap(np, 0);
52                 of_node_put(np);
53
54                 if (!bcsr_regs) {
55                         printk(KERN_ERR
56                                "BCSR: Failed to map bcsr register space\n");
57                         return;
58                 } else {
59 #define BCSR15_I2C_BUS0_SEG_CLR         0x07
60 #define BCSR15_I2C_BUS0_SEG2            0x02
61 /*
62  * Note: Accessing exclusively i2c devices.
63  *
64  * The i2c controller selects initially ID EEPROM in the u-boot;
65  * but if menu configuration selects RTC support in the kernel,
66  * the i2c controller switches to select RTC chip in the kernel.
67  */
68 #ifdef CONFIG_RTC_CLASS
69                         /* Enable RTC chip on the segment #2 of i2c */
70                         clrbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG_CLR);
71                         setbits8(&bcsr_regs[15], BCSR15_I2C_BUS0_SEG2);
72 #endif
73
74                         iounmap(bcsr_regs);
75                 }
76         }
77
78         mpc85xx_smp_init();
79
80         fsl_pci_assign_primary();
81 }
82
83 machine_arch_initcall(p1023_rdb, mpc85xx_common_publish_devices);
84
85 static void __init p1023_rdb_pic_init(void)
86 {
87         struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
88                 MPIC_SINGLE_DEST_CPU,
89                 0, 256, " OpenPIC  ");
90
91         BUG_ON(mpic == NULL);
92
93         mpic_init(mpic);
94 }
95
96 define_machine(p1023_rdb) {
97         .name                   = "P1023 RDB",
98         .compatible             = "fsl,P1023RDB",
99         .setup_arch             = p1023_rdb_setup_arch,
100         .init_IRQ               = p1023_rdb_pic_init,
101         .get_irq                = mpic_get_irq,
102         .progress               = udbg_progress,
103 #ifdef CONFIG_PCI
104         .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
105         .pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
106 #endif
107 };