1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * MPC85xx RDB Board Setup
5 * Copyright 2009,2012-2013 Freescale Semiconductor Inc.
8 #include <linux/stddef.h>
9 #include <linux/kernel.h>
10 #include <linux/pci.h>
11 #include <linux/kdev_t.h>
12 #include <linux/delay.h>
13 #include <linux/seq_file.h>
14 #include <linux/interrupt.h>
15 #include <linux/of_platform.h>
16 #include <linux/fsl/guts.h>
19 #include <asm/machdep.h>
20 #include <asm/pci-bridge.h>
21 #include <mm/mmu_decl.h>
25 #include <soc/fsl/qe/qe.h>
26 #include <soc/fsl/qe/qe_ic.h>
28 #include <sysdev/fsl_soc.h>
29 #include <sysdev/fsl_pci.h>
37 #define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
39 #define DBG(fmt, args...)
43 void __init mpc85xx_rdb_pic_init(void)
47 #ifdef CONFIG_QUICC_ENGINE
48 struct device_node *np;
51 if (of_machine_is_compatible("fsl,MPC85XXRDB-CAMP")) {
52 mpic = mpic_alloc(NULL, 0, MPIC_NO_RESET |
57 mpic = mpic_alloc(NULL, 0,
66 #ifdef CONFIG_QUICC_ENGINE
67 np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
69 qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
70 qe_ic_cascade_high_mpic);
74 pr_err("%s: Could not find qe-ic node\n", __func__);
80 * Setup the architecture
82 static void __init mpc85xx_rdb_setup_arch(void)
85 ppc_md.progress("mpc85xx_rdb_setup_arch()", 0);
89 fsl_pci_assign_primary();
91 #ifdef CONFIG_QUICC_ENGINE
93 mpc85xx_qe_par_io_init();
94 #if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE)
95 if (machine_is(p1025_rdb)) {
96 struct device_node *np;
98 struct ccsr_guts __iomem *guts;
100 np = of_find_node_by_name(NULL, "global-utilities");
102 guts = of_iomap(np, 0);
105 pr_err("mpc85xx-rdb: could not map global utilities register\n");
108 /* P1025 has pins muxed for QE and other functions. To
109 * enable QE UEC mode, we need to set bit QE0 for UCC1
110 * in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9
111 * and QE12 for QE MII management singals in PMUXCR
114 setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |
115 MPC85xx_PMUXCR_QE(3) |
116 MPC85xx_PMUXCR_QE(9) |
117 MPC85xx_PMUXCR_QE(12));
125 #endif /* CONFIG_QUICC_ENGINE */
127 printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n");
130 machine_arch_initcall(p2020_rdb, mpc85xx_common_publish_devices);
131 machine_arch_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices);
132 machine_arch_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices);
133 machine_arch_initcall(p1020_rdb, mpc85xx_common_publish_devices);
134 machine_arch_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices);
135 machine_arch_initcall(p1020_rdb_pd, mpc85xx_common_publish_devices);
136 machine_arch_initcall(p1020_utm_pc, mpc85xx_common_publish_devices);
137 machine_arch_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
138 machine_arch_initcall(p1025_rdb, mpc85xx_common_publish_devices);
139 machine_arch_initcall(p1024_rdb, mpc85xx_common_publish_devices);
142 * Called very early, device-tree isn't unflattened
144 static int __init p2020_rdb_probe(void)
146 if (of_machine_is_compatible("fsl,P2020RDB"))
151 static int __init p1020_rdb_probe(void)
153 if (of_machine_is_compatible("fsl,P1020RDB"))
158 static int __init p1020_rdb_pc_probe(void)
160 return of_machine_is_compatible("fsl,P1020RDB-PC");
163 static int __init p1020_rdb_pd_probe(void)
165 return of_machine_is_compatible("fsl,P1020RDB-PD");
168 static int __init p1021_rdb_pc_probe(void)
170 if (of_machine_is_compatible("fsl,P1021RDB-PC"))
175 static int __init p2020_rdb_pc_probe(void)
177 if (of_machine_is_compatible("fsl,P2020RDB-PC"))
182 static int __init p1025_rdb_probe(void)
184 return of_machine_is_compatible("fsl,P1025RDB");
187 static int __init p1020_mbg_pc_probe(void)
189 return of_machine_is_compatible("fsl,P1020MBG-PC");
192 static int __init p1020_utm_pc_probe(void)
194 return of_machine_is_compatible("fsl,P1020UTM-PC");
197 static int __init p1024_rdb_probe(void)
199 return of_machine_is_compatible("fsl,P1024RDB");
202 define_machine(p2020_rdb) {
204 .probe = p2020_rdb_probe,
205 .setup_arch = mpc85xx_rdb_setup_arch,
206 .init_IRQ = mpc85xx_rdb_pic_init,
208 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
209 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
211 .get_irq = mpic_get_irq,
212 .calibrate_decr = generic_calibrate_decr,
213 .progress = udbg_progress,
216 define_machine(p1020_rdb) {
218 .probe = p1020_rdb_probe,
219 .setup_arch = mpc85xx_rdb_setup_arch,
220 .init_IRQ = mpc85xx_rdb_pic_init,
222 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
223 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
225 .get_irq = mpic_get_irq,
226 .calibrate_decr = generic_calibrate_decr,
227 .progress = udbg_progress,
230 define_machine(p1021_rdb_pc) {
231 .name = "P1021 RDB-PC",
232 .probe = p1021_rdb_pc_probe,
233 .setup_arch = mpc85xx_rdb_setup_arch,
234 .init_IRQ = mpc85xx_rdb_pic_init,
236 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
237 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
239 .get_irq = mpic_get_irq,
240 .calibrate_decr = generic_calibrate_decr,
241 .progress = udbg_progress,
244 define_machine(p2020_rdb_pc) {
245 .name = "P2020RDB-PC",
246 .probe = p2020_rdb_pc_probe,
247 .setup_arch = mpc85xx_rdb_setup_arch,
248 .init_IRQ = mpc85xx_rdb_pic_init,
250 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
251 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
253 .get_irq = mpic_get_irq,
254 .calibrate_decr = generic_calibrate_decr,
255 .progress = udbg_progress,
258 define_machine(p1025_rdb) {
260 .probe = p1025_rdb_probe,
261 .setup_arch = mpc85xx_rdb_setup_arch,
262 .init_IRQ = mpc85xx_rdb_pic_init,
264 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
265 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
267 .get_irq = mpic_get_irq,
268 .calibrate_decr = generic_calibrate_decr,
269 .progress = udbg_progress,
272 define_machine(p1020_mbg_pc) {
273 .name = "P1020 MBG-PC",
274 .probe = p1020_mbg_pc_probe,
275 .setup_arch = mpc85xx_rdb_setup_arch,
276 .init_IRQ = mpc85xx_rdb_pic_init,
278 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
279 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
281 .get_irq = mpic_get_irq,
282 .calibrate_decr = generic_calibrate_decr,
283 .progress = udbg_progress,
286 define_machine(p1020_utm_pc) {
287 .name = "P1020 UTM-PC",
288 .probe = p1020_utm_pc_probe,
289 .setup_arch = mpc85xx_rdb_setup_arch,
290 .init_IRQ = mpc85xx_rdb_pic_init,
292 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
293 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
295 .get_irq = mpic_get_irq,
296 .calibrate_decr = generic_calibrate_decr,
297 .progress = udbg_progress,
300 define_machine(p1020_rdb_pc) {
301 .name = "P1020RDB-PC",
302 .probe = p1020_rdb_pc_probe,
303 .setup_arch = mpc85xx_rdb_setup_arch,
304 .init_IRQ = mpc85xx_rdb_pic_init,
306 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
307 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
309 .get_irq = mpic_get_irq,
310 .calibrate_decr = generic_calibrate_decr,
311 .progress = udbg_progress,
314 define_machine(p1020_rdb_pd) {
315 .name = "P1020RDB-PD",
316 .probe = p1020_rdb_pd_probe,
317 .setup_arch = mpc85xx_rdb_setup_arch,
318 .init_IRQ = mpc85xx_rdb_pic_init,
320 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
321 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
323 .get_irq = mpic_get_irq,
324 .calibrate_decr = generic_calibrate_decr,
325 .progress = udbg_progress,
328 define_machine(p1024_rdb) {
330 .probe = p1024_rdb_probe,
331 .setup_arch = mpc85xx_rdb_setup_arch,
332 .init_IRQ = mpc85xx_rdb_pic_init,
334 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
335 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
337 .get_irq = mpic_get_irq,
338 .calibrate_decr = generic_calibrate_decr,
339 .progress = udbg_progress,