2 * MPC85xx RDB Board Setup
4 * Copyright 2009,2012-2013 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
12 #include <linux/stddef.h>
13 #include <linux/kernel.h>
14 #include <linux/pci.h>
15 #include <linux/kdev_t.h>
16 #include <linux/delay.h>
17 #include <linux/seq_file.h>
18 #include <linux/interrupt.h>
19 #include <linux/of_platform.h>
20 #include <linux/fsl/guts.h>
23 #include <asm/machdep.h>
24 #include <asm/pci-bridge.h>
25 #include <mm/mmu_decl.h>
29 #include <soc/fsl/qe/qe.h>
30 #include <soc/fsl/qe/qe_ic.h>
32 #include <sysdev/fsl_soc.h>
33 #include <sysdev/fsl_pci.h>
41 #define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
43 #define DBG(fmt, args...)
47 void __init mpc85xx_rdb_pic_init(void)
51 #ifdef CONFIG_QUICC_ENGINE
52 struct device_node *np;
55 if (of_machine_is_compatible("fsl,MPC85XXRDB-CAMP")) {
56 mpic = mpic_alloc(NULL, 0, MPIC_NO_RESET |
61 mpic = mpic_alloc(NULL, 0,
70 #ifdef CONFIG_QUICC_ENGINE
71 np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
73 qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
74 qe_ic_cascade_high_mpic);
78 pr_err("%s: Could not find qe-ic node\n", __func__);
84 * Setup the architecture
86 static void __init mpc85xx_rdb_setup_arch(void)
89 ppc_md.progress("mpc85xx_rdb_setup_arch()", 0);
93 fsl_pci_assign_primary();
95 #ifdef CONFIG_QUICC_ENGINE
97 mpc85xx_qe_par_io_init();
98 #if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE)
99 if (machine_is(p1025_rdb)) {
100 struct device_node *np;
102 struct ccsr_guts __iomem *guts;
104 np = of_find_node_by_name(NULL, "global-utilities");
106 guts = of_iomap(np, 0);
109 pr_err("mpc85xx-rdb: could not map global utilities register\n");
112 /* P1025 has pins muxed for QE and other functions. To
113 * enable QE UEC mode, we need to set bit QE0 for UCC1
114 * in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9
115 * and QE12 for QE MII management singals in PMUXCR
118 setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |
119 MPC85xx_PMUXCR_QE(3) |
120 MPC85xx_PMUXCR_QE(9) |
121 MPC85xx_PMUXCR_QE(12));
129 #endif /* CONFIG_QUICC_ENGINE */
131 printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n");
134 machine_arch_initcall(p2020_rdb, mpc85xx_common_publish_devices);
135 machine_arch_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices);
136 machine_arch_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices);
137 machine_arch_initcall(p1020_rdb, mpc85xx_common_publish_devices);
138 machine_arch_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices);
139 machine_arch_initcall(p1020_rdb_pd, mpc85xx_common_publish_devices);
140 machine_arch_initcall(p1020_utm_pc, mpc85xx_common_publish_devices);
141 machine_arch_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
142 machine_arch_initcall(p1025_rdb, mpc85xx_common_publish_devices);
143 machine_arch_initcall(p1024_rdb, mpc85xx_common_publish_devices);
146 * Called very early, device-tree isn't unflattened
148 static int __init p2020_rdb_probe(void)
150 if (of_machine_is_compatible("fsl,P2020RDB"))
155 static int __init p1020_rdb_probe(void)
157 if (of_machine_is_compatible("fsl,P1020RDB"))
162 static int __init p1020_rdb_pc_probe(void)
164 return of_machine_is_compatible("fsl,P1020RDB-PC");
167 static int __init p1020_rdb_pd_probe(void)
169 return of_machine_is_compatible("fsl,P1020RDB-PD");
172 static int __init p1021_rdb_pc_probe(void)
174 if (of_machine_is_compatible("fsl,P1021RDB-PC"))
179 static int __init p2020_rdb_pc_probe(void)
181 if (of_machine_is_compatible("fsl,P2020RDB-PC"))
186 static int __init p1025_rdb_probe(void)
188 return of_machine_is_compatible("fsl,P1025RDB");
191 static int __init p1020_mbg_pc_probe(void)
193 return of_machine_is_compatible("fsl,P1020MBG-PC");
196 static int __init p1020_utm_pc_probe(void)
198 return of_machine_is_compatible("fsl,P1020UTM-PC");
201 static int __init p1024_rdb_probe(void)
203 return of_machine_is_compatible("fsl,P1024RDB");
206 define_machine(p2020_rdb) {
208 .probe = p2020_rdb_probe,
209 .setup_arch = mpc85xx_rdb_setup_arch,
210 .init_IRQ = mpc85xx_rdb_pic_init,
212 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
213 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
215 .get_irq = mpic_get_irq,
216 .calibrate_decr = generic_calibrate_decr,
217 .progress = udbg_progress,
220 define_machine(p1020_rdb) {
222 .probe = p1020_rdb_probe,
223 .setup_arch = mpc85xx_rdb_setup_arch,
224 .init_IRQ = mpc85xx_rdb_pic_init,
226 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
227 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
229 .get_irq = mpic_get_irq,
230 .calibrate_decr = generic_calibrate_decr,
231 .progress = udbg_progress,
234 define_machine(p1021_rdb_pc) {
235 .name = "P1021 RDB-PC",
236 .probe = p1021_rdb_pc_probe,
237 .setup_arch = mpc85xx_rdb_setup_arch,
238 .init_IRQ = mpc85xx_rdb_pic_init,
240 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
241 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
243 .get_irq = mpic_get_irq,
244 .calibrate_decr = generic_calibrate_decr,
245 .progress = udbg_progress,
248 define_machine(p2020_rdb_pc) {
249 .name = "P2020RDB-PC",
250 .probe = p2020_rdb_pc_probe,
251 .setup_arch = mpc85xx_rdb_setup_arch,
252 .init_IRQ = mpc85xx_rdb_pic_init,
254 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
255 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
257 .get_irq = mpic_get_irq,
258 .calibrate_decr = generic_calibrate_decr,
259 .progress = udbg_progress,
262 define_machine(p1025_rdb) {
264 .probe = p1025_rdb_probe,
265 .setup_arch = mpc85xx_rdb_setup_arch,
266 .init_IRQ = mpc85xx_rdb_pic_init,
268 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
269 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
271 .get_irq = mpic_get_irq,
272 .calibrate_decr = generic_calibrate_decr,
273 .progress = udbg_progress,
276 define_machine(p1020_mbg_pc) {
277 .name = "P1020 MBG-PC",
278 .probe = p1020_mbg_pc_probe,
279 .setup_arch = mpc85xx_rdb_setup_arch,
280 .init_IRQ = mpc85xx_rdb_pic_init,
282 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
283 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
285 .get_irq = mpic_get_irq,
286 .calibrate_decr = generic_calibrate_decr,
287 .progress = udbg_progress,
290 define_machine(p1020_utm_pc) {
291 .name = "P1020 UTM-PC",
292 .probe = p1020_utm_pc_probe,
293 .setup_arch = mpc85xx_rdb_setup_arch,
294 .init_IRQ = mpc85xx_rdb_pic_init,
296 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
297 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
299 .get_irq = mpic_get_irq,
300 .calibrate_decr = generic_calibrate_decr,
301 .progress = udbg_progress,
304 define_machine(p1020_rdb_pc) {
305 .name = "P1020RDB-PC",
306 .probe = p1020_rdb_pc_probe,
307 .setup_arch = mpc85xx_rdb_setup_arch,
308 .init_IRQ = mpc85xx_rdb_pic_init,
310 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
311 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
313 .get_irq = mpic_get_irq,
314 .calibrate_decr = generic_calibrate_decr,
315 .progress = udbg_progress,
318 define_machine(p1020_rdb_pd) {
319 .name = "P1020RDB-PD",
320 .probe = p1020_rdb_pd_probe,
321 .setup_arch = mpc85xx_rdb_setup_arch,
322 .init_IRQ = mpc85xx_rdb_pic_init,
324 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
325 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
327 .get_irq = mpic_get_irq,
328 .calibrate_decr = generic_calibrate_decr,
329 .progress = udbg_progress,
332 define_machine(p1024_rdb) {
334 .probe = p1024_rdb_probe,
335 .setup_arch = mpc85xx_rdb_setup_arch,
336 .init_IRQ = mpc85xx_rdb_pic_init,
338 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
339 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
341 .get_irq = mpic_get_irq,
342 .calibrate_decr = generic_calibrate_decr,
343 .progress = udbg_progress,