1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * MPC85xx RDB Board Setup
5 * Copyright 2009,2012-2013 Freescale Semiconductor Inc.
8 #include <linux/stddef.h>
9 #include <linux/kernel.h>
10 #include <linux/pci.h>
11 #include <linux/kdev_t.h>
12 #include <linux/delay.h>
13 #include <linux/seq_file.h>
14 #include <linux/interrupt.h>
15 #include <linux/of_platform.h>
16 #include <linux/fsl/guts.h>
19 #include <asm/machdep.h>
20 #include <asm/pci-bridge.h>
21 #include <mm/mmu_decl.h>
25 #include <soc/fsl/qe/qe.h>
27 #include <sysdev/fsl_soc.h>
28 #include <sysdev/fsl_pci.h>
36 #define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
38 #define DBG(fmt, args...)
42 void __init mpc85xx_rdb_pic_init(void)
46 if (of_machine_is_compatible("fsl,MPC85XXRDB-CAMP")) {
47 mpic = mpic_alloc(NULL, 0, MPIC_NO_RESET |
52 mpic = mpic_alloc(NULL, 0,
63 * Setup the architecture
65 static void __init mpc85xx_rdb_setup_arch(void)
68 ppc_md.progress("mpc85xx_rdb_setup_arch()", 0);
72 fsl_pci_assign_primary();
74 #ifdef CONFIG_QUICC_ENGINE
75 mpc85xx_qe_par_io_init();
76 #if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE)
77 if (machine_is(p1025_rdb)) {
78 struct device_node *np;
80 struct ccsr_guts __iomem *guts;
82 np = of_find_node_by_name(NULL, "global-utilities");
84 guts = of_iomap(np, 0);
87 pr_err("mpc85xx-rdb: could not map global utilities register\n");
90 /* P1025 has pins muxed for QE and other functions. To
91 * enable QE UEC mode, we need to set bit QE0 for UCC1
92 * in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9
93 * and QE12 for QE MII management singals in PMUXCR
96 setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |
97 MPC85xx_PMUXCR_QE(3) |
98 MPC85xx_PMUXCR_QE(9) |
99 MPC85xx_PMUXCR_QE(12));
107 #endif /* CONFIG_QUICC_ENGINE */
109 printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n");
112 machine_arch_initcall(p2020_rdb, mpc85xx_common_publish_devices);
113 machine_arch_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices);
114 machine_arch_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices);
115 machine_arch_initcall(p1020_rdb, mpc85xx_common_publish_devices);
116 machine_arch_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices);
117 machine_arch_initcall(p1020_rdb_pd, mpc85xx_common_publish_devices);
118 machine_arch_initcall(p1020_utm_pc, mpc85xx_common_publish_devices);
119 machine_arch_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
120 machine_arch_initcall(p1025_rdb, mpc85xx_common_publish_devices);
121 machine_arch_initcall(p1024_rdb, mpc85xx_common_publish_devices);
124 * Called very early, device-tree isn't unflattened
126 static int __init p2020_rdb_probe(void)
128 if (of_machine_is_compatible("fsl,P2020RDB"))
133 static int __init p1020_rdb_probe(void)
135 if (of_machine_is_compatible("fsl,P1020RDB"))
140 static int __init p1020_rdb_pc_probe(void)
142 return of_machine_is_compatible("fsl,P1020RDB-PC");
145 static int __init p1020_rdb_pd_probe(void)
147 return of_machine_is_compatible("fsl,P1020RDB-PD");
150 static int __init p1021_rdb_pc_probe(void)
152 if (of_machine_is_compatible("fsl,P1021RDB-PC"))
157 static int __init p2020_rdb_pc_probe(void)
159 if (of_machine_is_compatible("fsl,P2020RDB-PC"))
164 static int __init p1025_rdb_probe(void)
166 return of_machine_is_compatible("fsl,P1025RDB");
169 static int __init p1020_mbg_pc_probe(void)
171 return of_machine_is_compatible("fsl,P1020MBG-PC");
174 static int __init p1020_utm_pc_probe(void)
176 return of_machine_is_compatible("fsl,P1020UTM-PC");
179 static int __init p1024_rdb_probe(void)
181 return of_machine_is_compatible("fsl,P1024RDB");
184 define_machine(p2020_rdb) {
186 .probe = p2020_rdb_probe,
187 .setup_arch = mpc85xx_rdb_setup_arch,
188 .init_IRQ = mpc85xx_rdb_pic_init,
190 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
191 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
193 .get_irq = mpic_get_irq,
194 .calibrate_decr = generic_calibrate_decr,
195 .progress = udbg_progress,
198 define_machine(p1020_rdb) {
200 .probe = p1020_rdb_probe,
201 .setup_arch = mpc85xx_rdb_setup_arch,
202 .init_IRQ = mpc85xx_rdb_pic_init,
204 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
205 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
207 .get_irq = mpic_get_irq,
208 .calibrate_decr = generic_calibrate_decr,
209 .progress = udbg_progress,
212 define_machine(p1021_rdb_pc) {
213 .name = "P1021 RDB-PC",
214 .probe = p1021_rdb_pc_probe,
215 .setup_arch = mpc85xx_rdb_setup_arch,
216 .init_IRQ = mpc85xx_rdb_pic_init,
218 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
219 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
221 .get_irq = mpic_get_irq,
222 .calibrate_decr = generic_calibrate_decr,
223 .progress = udbg_progress,
226 define_machine(p2020_rdb_pc) {
227 .name = "P2020RDB-PC",
228 .probe = p2020_rdb_pc_probe,
229 .setup_arch = mpc85xx_rdb_setup_arch,
230 .init_IRQ = mpc85xx_rdb_pic_init,
232 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
233 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
235 .get_irq = mpic_get_irq,
236 .calibrate_decr = generic_calibrate_decr,
237 .progress = udbg_progress,
240 define_machine(p1025_rdb) {
242 .probe = p1025_rdb_probe,
243 .setup_arch = mpc85xx_rdb_setup_arch,
244 .init_IRQ = mpc85xx_rdb_pic_init,
246 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
247 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
249 .get_irq = mpic_get_irq,
250 .calibrate_decr = generic_calibrate_decr,
251 .progress = udbg_progress,
254 define_machine(p1020_mbg_pc) {
255 .name = "P1020 MBG-PC",
256 .probe = p1020_mbg_pc_probe,
257 .setup_arch = mpc85xx_rdb_setup_arch,
258 .init_IRQ = mpc85xx_rdb_pic_init,
260 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
261 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
263 .get_irq = mpic_get_irq,
264 .calibrate_decr = generic_calibrate_decr,
265 .progress = udbg_progress,
268 define_machine(p1020_utm_pc) {
269 .name = "P1020 UTM-PC",
270 .probe = p1020_utm_pc_probe,
271 .setup_arch = mpc85xx_rdb_setup_arch,
272 .init_IRQ = mpc85xx_rdb_pic_init,
274 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
275 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
277 .get_irq = mpic_get_irq,
278 .calibrate_decr = generic_calibrate_decr,
279 .progress = udbg_progress,
282 define_machine(p1020_rdb_pc) {
283 .name = "P1020RDB-PC",
284 .probe = p1020_rdb_pc_probe,
285 .setup_arch = mpc85xx_rdb_setup_arch,
286 .init_IRQ = mpc85xx_rdb_pic_init,
288 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
289 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
291 .get_irq = mpic_get_irq,
292 .calibrate_decr = generic_calibrate_decr,
293 .progress = udbg_progress,
296 define_machine(p1020_rdb_pd) {
297 .name = "P1020RDB-PD",
298 .probe = p1020_rdb_pd_probe,
299 .setup_arch = mpc85xx_rdb_setup_arch,
300 .init_IRQ = mpc85xx_rdb_pic_init,
302 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
303 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
305 .get_irq = mpic_get_irq,
306 .calibrate_decr = generic_calibrate_decr,
307 .progress = udbg_progress,
310 define_machine(p1024_rdb) {
312 .probe = p1024_rdb_probe,
313 .setup_arch = mpc85xx_rdb_setup_arch,
314 .init_IRQ = mpc85xx_rdb_pic_init,
316 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
317 .pcibios_fixup_phb = fsl_pcibios_fixup_phb,
319 .get_irq = mpic_get_irq,
320 .calibrate_decr = generic_calibrate_decr,
321 .progress = udbg_progress,