arm64: dts: qcom: sm8550: add TRNG node
[linux-modified.git] / arch / powerpc / platforms / 85xx / c293pcie.c
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * C293PCIE Board Setup
4  *
5  * Copyright 2013 Freescale Semiconductor Inc.
6  */
7
8 #include <linux/stddef.h>
9 #include <linux/kernel.h>
10 #include <linux/of.h>
11
12 #include <asm/machdep.h>
13 #include <asm/udbg.h>
14 #include <asm/mpic.h>
15
16 #include <sysdev/fsl_soc.h>
17 #include <sysdev/fsl_pci.h>
18
19 #include "mpc85xx.h"
20
21 static void __init c293_pcie_pic_init(void)
22 {
23         struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
24           MPIC_SINGLE_DEST_CPU, 0, 256, " OpenPIC  ");
25
26         BUG_ON(mpic == NULL);
27
28         mpic_init(mpic);
29 }
30
31
32 /*
33  * Setup the architecture
34  */
35 static void __init c293_pcie_setup_arch(void)
36 {
37         if (ppc_md.progress)
38                 ppc_md.progress("c293_pcie_setup_arch()", 0);
39
40         fsl_pci_assign_primary();
41
42         printk(KERN_INFO "C293 PCIE board from Freescale Semiconductor\n");
43 }
44
45 machine_arch_initcall(c293_pcie, mpc85xx_common_publish_devices);
46
47 define_machine(c293_pcie) {
48         .name                   = "C293 PCIE",
49         .compatible             = "fsl,C293PCIE",
50         .setup_arch             = c293_pcie_setup_arch,
51         .init_IRQ               = c293_pcie_pic_init,
52         .get_irq                = mpic_get_irq,
53         .progress               = udbg_progress,
54 };