1 // SPDX-License-Identifier: GPL-2.0-only
3 * MPC83xx suspend support
5 * Author: Scott Wood <scottwood@freescale.com>
7 * Copyright (c) 2006-2007 Freescale Semiconductor, Inc.
11 #include <linux/types.h>
12 #include <linux/ioport.h>
13 #include <linux/interrupt.h>
14 #include <linux/wait.h>
15 #include <linux/sched/signal.h>
16 #include <linux/kthread.h>
17 #include <linux/freezer.h>
18 #include <linux/suspend.h>
19 #include <linux/fsl_devices.h>
20 #include <linux/of_address.h>
21 #include <linux/of_irq.h>
22 #include <linux/of_platform.h>
23 #include <linux/export.h>
28 #include <asm/mpc6xx.h>
29 #include <asm/switch_to.h>
31 #include <sysdev/fsl_soc.h>
33 #define PMCCR1_NEXT_STATE 0x0C /* Next state for power management */
34 #define PMCCR1_NEXT_STATE_SHIFT 2
35 #define PMCCR1_CURR_STATE 0x03 /* Current state for power management*/
36 #define IMMR_SYSCR_OFFSET 0x100
37 #define IMMR_RCW_OFFSET 0x900
38 #define RCW_PCI_HOST 0x80000000
40 void mpc83xx_enter_deep_sleep(phys_addr_t immrbase);
44 #define PMCCR_DLPEN 2 /* DDR SDRAM low power enable */
45 #define PMCCR_SLPEN 1 /* System low power enable */
49 /* All but PMCI are deep-sleep only */
50 #define PMCER_GPIO 0x100
51 #define PMCER_PCI 0x080
52 #define PMCER_USB 0x040
53 #define PMCER_ETSEC1 0x020
54 #define PMCER_ETSEC2 0x010
55 #define PMCER_TIMER 0x008
56 #define PMCER_INT1 0x004
57 #define PMCER_INT2 0x002
58 #define PMCER_PMCI 0x001
59 #define PMCER_ALL 0x1FF
63 #define PMCCR1_USE_STATE 0x80000000
64 #define PMCCR1_PME_EN 0x00000080
65 #define PMCCR1_ASSERT_PME 0x00000040
66 #define PMCCR1_POWER_OFF 0x00000020
77 struct mpc83xx_clock {
83 struct mpc83xx_syscr {
93 struct mpc83xx_saved {
103 static struct platform_device *pmc_dev;
104 static int has_deep_sleep, deep_sleeping;
106 static struct mpc83xx_pmc __iomem *pmc_regs;
107 static struct mpc83xx_clock __iomem *clock_regs;
108 static struct mpc83xx_syscr __iomem *syscr_regs;
109 static struct mpc83xx_saved saved_regs;
110 static int is_pci_agent, wake_from_pci;
111 static phys_addr_t immrbase;
112 static int pci_pm_state;
113 static DECLARE_WAIT_QUEUE_HEAD(agent_wq);
115 int fsl_deep_sleep(void)
117 return deep_sleeping;
119 EXPORT_SYMBOL(fsl_deep_sleep);
121 static int mpc83xx_change_state(void)
124 u32 reg_cfg1 = in_be32(&pmc_regs->config1);
127 pci_pm_state = (reg_cfg1 & PMCCR1_NEXT_STATE) >>
128 PMCCR1_NEXT_STATE_SHIFT;
129 curr_state = reg_cfg1 & PMCCR1_CURR_STATE;
131 if (curr_state != pci_pm_state) {
132 reg_cfg1 &= ~PMCCR1_CURR_STATE;
133 reg_cfg1 |= pci_pm_state;
134 out_be32(&pmc_regs->config1, reg_cfg1);
144 static irqreturn_t pmc_irq_handler(int irq, void *dev_id)
146 u32 event = in_be32(&pmc_regs->event);
149 if (mpc83xx_change_state())
153 out_be32(&pmc_regs->event, event);
160 static void mpc83xx_suspend_restore_regs(void)
162 out_be32(&syscr_regs->sicrl, saved_regs.sicrl);
163 out_be32(&syscr_regs->sicrh, saved_regs.sicrh);
164 out_be32(&clock_regs->sccr, saved_regs.sccr);
167 static void mpc83xx_suspend_save_regs(void)
169 saved_regs.sicrl = in_be32(&syscr_regs->sicrl);
170 saved_regs.sicrh = in_be32(&syscr_regs->sicrh);
171 saved_regs.sccr = in_be32(&clock_regs->sccr);
174 static int mpc83xx_suspend_enter(suspend_state_t state)
178 /* Don't go to sleep if there's a race where pci_pm_state changes
179 * between the agent thread checking it and the PM code disabling
183 if (pci_pm_state != (deep_sleeping ? 3 : 2))
186 out_be32(&pmc_regs->config1,
187 in_be32(&pmc_regs->config1) | PMCCR1_PME_EN);
190 /* Put the system into low-power mode and the RAM
191 * into self-refresh mode once the core goes to
195 out_be32(&pmc_regs->config, PMCCR_SLPEN | PMCCR_DLPEN);
197 /* If it has deep sleep (i.e. it's an 831x or compatible),
198 * disable power to the core upon entering sleep mode. This will
199 * require going through the boot firmware upon a wakeup event.
203 mpc83xx_suspend_save_regs();
205 out_be32(&pmc_regs->mask, PMCER_ALL);
207 out_be32(&pmc_regs->config1,
208 in_be32(&pmc_regs->config1) | PMCCR1_POWER_OFF);
212 mpc83xx_enter_deep_sleep(immrbase);
214 out_be32(&pmc_regs->config1,
215 in_be32(&pmc_regs->config1) & ~PMCCR1_POWER_OFF);
217 out_be32(&pmc_regs->mask, PMCER_PMCI);
219 mpc83xx_suspend_restore_regs();
221 out_be32(&pmc_regs->mask, PMCER_PMCI);
223 mpc6xx_enter_standby();
229 out_be32(&pmc_regs->config1,
230 in_be32(&pmc_regs->config1) & ~PMCCR1_PME_EN);
235 static void mpc83xx_suspend_end(void)
240 static int mpc83xx_suspend_valid(suspend_state_t state)
242 return state == PM_SUSPEND_STANDBY || state == PM_SUSPEND_MEM;
245 static int mpc83xx_suspend_begin(suspend_state_t state)
248 case PM_SUSPEND_STANDBY:
263 static int agent_thread_fn(void *data)
266 wait_event_interruptible(agent_wq, pci_pm_state >= 2);
269 if (signal_pending(current) || pci_pm_state < 2)
272 /* With a preemptible kernel (or SMP), this could race with
273 * a userspace-driven suspend request. It's probably best
274 * to avoid mixing the two with such a configuration (or
275 * else fix it by adding a mutex to state_store that we can
281 pm_suspend(pci_pm_state == 3 ? PM_SUSPEND_MEM :
290 static void mpc83xx_set_agent(void)
292 out_be32(&pmc_regs->config1, PMCCR1_USE_STATE);
293 out_be32(&pmc_regs->mask, PMCER_PMCI);
295 kthread_run(agent_thread_fn, NULL, "PCI power mgt");
298 static int mpc83xx_is_pci_agent(void)
300 struct mpc83xx_rcw __iomem *rcw_regs;
303 rcw_regs = ioremap(get_immrbase() + IMMR_RCW_OFFSET,
304 sizeof(struct mpc83xx_rcw));
309 ret = !(in_be32(&rcw_regs->rcwhr) & RCW_PCI_HOST);
315 static const struct platform_suspend_ops mpc83xx_suspend_ops = {
316 .valid = mpc83xx_suspend_valid,
317 .begin = mpc83xx_suspend_begin,
318 .enter = mpc83xx_suspend_enter,
319 .end = mpc83xx_suspend_end,
322 static const struct of_device_id pmc_match[];
323 static int pmc_probe(struct platform_device *ofdev)
325 struct device_node *np = ofdev->dev.of_node;
327 const struct pmc_type *type;
330 type = of_device_get_match_data(&ofdev->dev);
334 if (!of_device_is_available(np))
337 has_deep_sleep = type->has_deep_sleep;
338 immrbase = get_immrbase();
341 is_pci_agent = mpc83xx_is_pci_agent();
342 if (is_pci_agent < 0)
345 ret = of_address_to_resource(np, 0, &res);
349 pmc_irq = irq_of_parse_and_map(np, 0);
351 ret = request_irq(pmc_irq, pmc_irq_handler, IRQF_SHARED,
358 pmc_regs = ioremap(res.start, sizeof(*pmc_regs));
365 ret = of_address_to_resource(np, 1, &res);
371 clock_regs = ioremap(res.start, sizeof(*clock_regs));
378 if (has_deep_sleep) {
379 syscr_regs = ioremap(immrbase + IMMR_SYSCR_OFFSET,
380 sizeof(*syscr_regs));
390 suspend_set_ops(&mpc83xx_suspend_ops);
399 free_irq(pmc_irq, ofdev);
404 static int pmc_remove(struct platform_device *ofdev)
409 static struct pmc_type pmc_types[] = {
418 static const struct of_device_id pmc_match[] = {
420 .compatible = "fsl,mpc8313-pmc",
421 .data = &pmc_types[0],
424 .compatible = "fsl,mpc8349-pmc",
425 .data = &pmc_types[1],
430 static struct platform_driver pmc_driver = {
432 .name = "mpc83xx-pmc",
433 .of_match_table = pmc_match,
439 builtin_platform_driver(pmc_driver);