1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * bpf_jit.h: BPF JIT compiler for PPC
5 * Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation
6 * 2016 Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
13 #include <asm/types.h>
14 #include <asm/ppc-opcode.h>
15 #include <asm/code-patching.h>
17 #ifdef PPC64_ELF_ABI_v1
18 #define FUNCTION_DESCR_SIZE 24
20 #define FUNCTION_DESCR_SIZE 0
23 #define PLANT_INSTR(d, idx, instr) \
24 do { if (d) { (d)[idx] = instr; } idx++; } while (0)
25 #define EMIT(instr) PLANT_INSTR(image, ctx->idx, instr)
27 /* Long jump; (unconditional 'branch') */
28 #define PPC_JMP(dest) \
30 long offset = (long)(dest) - (ctx->idx * 4); \
31 if (!is_offset_in_branch_range(offset)) { \
32 pr_err_ratelimited("Branch offset 0x%lx (@%u) out of range\n", offset, ctx->idx); \
35 EMIT(PPC_INST_BRANCH | (offset & 0x03fffffc)); \
37 /* "cond" here covers BO:BI fields. */
38 #define PPC_BCC_SHORT(cond, dest) \
40 long offset = (long)(dest) - (ctx->idx * 4); \
41 if (!is_offset_in_cond_branch_range(offset)) { \
42 pr_err_ratelimited("Conditional branch offset 0x%lx (@%u) out of range\n", offset, ctx->idx); \
45 EMIT(PPC_INST_BRANCH_COND | (((cond) & 0x3ff) << 16) | (offset & 0xfffc)); \
48 /* Sign-extended 32-bit immediate load */
49 #define PPC_LI32(d, i) do { \
50 if ((int)(uintptr_t)(i) >= -32768 && \
51 (int)(uintptr_t)(i) < 32768) \
52 EMIT(PPC_RAW_LI(d, i)); \
54 EMIT(PPC_RAW_LIS(d, IMM_H(i))); \
56 EMIT(PPC_RAW_ORI(d, d, IMM_L(i))); \
59 #define PPC_LI64(d, i) do { \
60 if ((long)(i) >= -2147483648 && \
61 (long)(i) < 2147483648) \
64 if (!((uintptr_t)(i) & 0xffff800000000000ULL)) \
65 EMIT(PPC_RAW_LI(d, ((uintptr_t)(i) >> 32) & \
68 EMIT(PPC_RAW_LIS(d, ((uintptr_t)(i) >> 48))); \
69 if ((uintptr_t)(i) & 0x0000ffff00000000ULL) \
70 EMIT(PPC_RAW_ORI(d, d, \
71 ((uintptr_t)(i) >> 32) & 0xffff)); \
73 EMIT(PPC_RAW_SLDI(d, d, 32)); \
74 if ((uintptr_t)(i) & 0x00000000ffff0000ULL) \
75 EMIT(PPC_RAW_ORIS(d, d, \
76 ((uintptr_t)(i) >> 16) & 0xffff)); \
77 if ((uintptr_t)(i) & 0x000000000000ffffULL) \
78 EMIT(PPC_RAW_ORI(d, d, (uintptr_t)(i) & \
83 #define PPC_FUNC_ADDR(d,i) do { PPC_LI64(d, i); } while(0)
85 #define PPC_FUNC_ADDR(d,i) do { PPC_LI32(d, i); } while(0)
89 * The fly in the ointment of code size changing from pass to pass is
90 * avoided by padding the short branch case with a NOP. If code size differs
91 * with different branch reaches we will have the issue of code moving from
92 * one pass to the next and will need a few passes to converge on a stable
95 #define PPC_BCC(cond, dest) do { \
96 if (is_offset_in_cond_branch_range((long)(dest) - (ctx->idx * 4))) { \
97 PPC_BCC_SHORT(cond, dest); \
98 EMIT(PPC_RAW_NOP()); \
100 /* Flip the 'T or F' bit to invert comparison */ \
101 PPC_BCC_SHORT(cond ^ COND_CMP_TRUE, (ctx->idx+2)*4); \
105 /* To create a branch condition, select a bit of cr0... */
109 /* ...and modify BO[3] */
110 #define COND_CMP_TRUE 0x100
111 #define COND_CMP_FALSE 0x000
112 /* Together, they make all required comparisons: */
113 #define COND_GT (CR0_GT | COND_CMP_TRUE)
114 #define COND_GE (CR0_LT | COND_CMP_FALSE)
115 #define COND_EQ (CR0_EQ | COND_CMP_TRUE)
116 #define COND_NE (CR0_EQ | COND_CMP_FALSE)
117 #define COND_LT (CR0_LT | COND_CMP_TRUE)
118 #define COND_LE (CR0_GT | COND_CMP_FALSE)