1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2019, IBM Corporation.
6 #define pr_fmt(fmt) "xive-kvm: " fmt
8 #include <linux/kernel.h>
9 #include <linux/kvm_host.h>
10 #include <linux/err.h>
11 #include <linux/gfp.h>
12 #include <linux/spinlock.h>
13 #include <linux/delay.h>
14 #include <linux/file.h>
15 #include <asm/uaccess.h>
16 #include <asm/kvm_book3s.h>
17 #include <asm/kvm_ppc.h>
18 #include <asm/hvcall.h>
20 #include <asm/xive-regs.h>
21 #include <asm/debug.h>
22 #include <asm/debugfs.h>
25 #include <linux/debugfs.h>
26 #include <linux/seq_file.h>
28 #include "book3s_xive.h"
30 static u8 xive_vm_esb_load(struct xive_irq_data *xd, u32 offset)
35 * The KVM XIVE native device does not use the XIVE_ESB_SET_PQ_10
36 * load operation, so there is no need to enforce load-after-store
40 if (xd->flags & XIVE_IRQ_FLAG_SHIFT_BUG)
41 offset |= offset << 4;
43 val = in_be64(xd->eoi_mmio + offset);
47 static void kvmppc_xive_native_cleanup_queue(struct kvm_vcpu *vcpu, int prio)
49 struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;
50 struct xive_q *q = &xc->queues[prio];
52 xive_native_disable_queue(xc->vp_id, q, prio);
54 put_page(virt_to_page(q->qpage));
59 static int kvmppc_xive_native_configure_queue(u32 vp_id, struct xive_q *q,
60 u8 prio, __be32 *qpage,
61 u32 order, bool can_escalate)
64 __be32 *qpage_prev = q->qpage;
66 rc = xive_native_configure_queue(vp_id, q, prio, qpage, order,
72 put_page(virt_to_page(qpage_prev));
77 void kvmppc_xive_native_cleanup_vcpu(struct kvm_vcpu *vcpu)
79 struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;
82 if (!kvmppc_xive_enabled(vcpu))
88 pr_devel("native_cleanup_vcpu(cpu=%d)\n", xc->server_num);
90 /* Ensure no interrupt is still routed to that VP */
92 kvmppc_xive_disable_vcpu_interrupts(vcpu);
94 /* Free escalations */
95 for (i = 0; i < KVMPPC_XIVE_Q_COUNT; i++) {
96 /* Free the escalation irq */
97 if (xc->esc_virq[i]) {
98 if (xc->xive->single_escalation)
99 xive_cleanup_single_escalation(vcpu, xc,
101 free_irq(xc->esc_virq[i], vcpu);
102 irq_dispose_mapping(xc->esc_virq[i]);
103 kfree(xc->esc_virq_names[i]);
109 xive_native_disable_vp(xc->vp_id);
111 /* Clear the cam word so guest entry won't try to push context */
112 vcpu->arch.xive_cam_word = 0;
114 /* Free the queues */
115 for (i = 0; i < KVMPPC_XIVE_Q_COUNT; i++) {
116 kvmppc_xive_native_cleanup_queue(vcpu, i);
122 /* Cleanup the vcpu */
123 vcpu->arch.irq_type = KVMPPC_IRQ_DEFAULT;
124 vcpu->arch.xive_vcpu = NULL;
127 int kvmppc_xive_native_connect_vcpu(struct kvm_device *dev,
128 struct kvm_vcpu *vcpu, u32 server_num)
130 struct kvmppc_xive *xive = dev->private;
131 struct kvmppc_xive_vcpu *xc = NULL;
135 pr_devel("native_connect_vcpu(server=%d)\n", server_num);
137 if (dev->ops != &kvm_xive_native_ops) {
138 pr_devel("Wrong ops !\n");
141 if (xive->kvm != vcpu->kvm)
143 if (vcpu->arch.irq_type != KVMPPC_IRQ_DEFAULT)
146 mutex_lock(&xive->lock);
148 rc = kvmppc_xive_compute_vp_id(xive, server_num, &vp_id);
152 xc = kzalloc(sizeof(*xc), GFP_KERNEL);
158 vcpu->arch.xive_vcpu = xc;
161 xc->server_num = server_num;
165 vcpu->arch.irq_type = KVMPPC_IRQ_XIVE;
167 rc = xive_native_get_vp_info(xc->vp_id, &xc->vp_cam, &xc->vp_chip_id);
169 pr_err("Failed to get VP info from OPAL: %d\n", rc);
174 * Enable the VP first as the single escalation mode will
175 * affect escalation interrupts numbering
177 rc = xive_native_enable_vp(xc->vp_id, xive->single_escalation);
179 pr_err("Failed to enable VP in OPAL: %d\n", rc);
183 /* Configure VCPU fields for use by assembly push/pull */
184 vcpu->arch.xive_saved_state.w01 = cpu_to_be64(0xff000000);
185 vcpu->arch.xive_cam_word = cpu_to_be32(xc->vp_cam | TM_QW1W2_VO);
187 /* TODO: reset all queues to a clean state ? */
189 mutex_unlock(&xive->lock);
191 kvmppc_xive_native_cleanup_vcpu(vcpu);
197 * Device passthrough support
199 static int kvmppc_xive_native_reset_mapped(struct kvm *kvm, unsigned long irq)
201 struct kvmppc_xive *xive = kvm->arch.xive;
202 pgoff_t esb_pgoff = KVM_XIVE_ESB_PAGE_OFFSET + irq * 2;
204 if (irq >= KVMPPC_XIVE_NR_IRQS)
208 * Clear the ESB pages of the IRQ number being mapped (or
209 * unmapped) into the guest and let the the VM fault handler
210 * repopulate with the appropriate ESB pages (device or IC)
212 pr_debug("clearing esb pages for girq 0x%lx\n", irq);
213 mutex_lock(&xive->mapping_lock);
215 unmap_mapping_range(xive->mapping,
216 esb_pgoff << PAGE_SHIFT,
217 2ull << PAGE_SHIFT, 1);
218 mutex_unlock(&xive->mapping_lock);
222 static struct kvmppc_xive_ops kvmppc_xive_native_ops = {
223 .reset_mapped = kvmppc_xive_native_reset_mapped,
226 static vm_fault_t xive_native_esb_fault(struct vm_fault *vmf)
228 struct vm_area_struct *vma = vmf->vma;
229 struct kvm_device *dev = vma->vm_file->private_data;
230 struct kvmppc_xive *xive = dev->private;
231 struct kvmppc_xive_src_block *sb;
232 struct kvmppc_xive_irq_state *state;
233 struct xive_irq_data *xd;
241 * Linux/KVM uses a two pages ESB setting, one for trigger and
244 page_offset = vmf->pgoff - vma->vm_pgoff;
245 irq = page_offset / 2;
247 sb = kvmppc_xive_find_source(xive, irq, &src);
249 pr_devel("%s: source %lx not found !\n", __func__, irq);
250 return VM_FAULT_SIGBUS;
253 state = &sb->irq_state[src];
255 /* Some sanity checking */
257 pr_devel("%s: source %lx invalid !\n", __func__, irq);
258 return VM_FAULT_SIGBUS;
261 kvmppc_xive_select_irq(state, &hw_num, &xd);
263 arch_spin_lock(&sb->lock);
266 * first/even page is for trigger
267 * second/odd page is for EOI and management.
269 page = page_offset % 2 ? xd->eoi_page : xd->trig_page;
270 arch_spin_unlock(&sb->lock);
272 if (WARN_ON(!page)) {
273 pr_err("%s: accessing invalid ESB page for source %lx !\n",
275 return VM_FAULT_SIGBUS;
278 vmf_insert_pfn(vma, vmf->address, page >> PAGE_SHIFT);
279 return VM_FAULT_NOPAGE;
282 static const struct vm_operations_struct xive_native_esb_vmops = {
283 .fault = xive_native_esb_fault,
286 static vm_fault_t xive_native_tima_fault(struct vm_fault *vmf)
288 struct vm_area_struct *vma = vmf->vma;
290 switch (vmf->pgoff - vma->vm_pgoff) {
291 case 0: /* HW - forbid access */
292 case 1: /* HV - forbid access */
293 return VM_FAULT_SIGBUS;
295 vmf_insert_pfn(vma, vmf->address, xive_tima_os >> PAGE_SHIFT);
296 return VM_FAULT_NOPAGE;
297 case 3: /* USER - TODO */
299 return VM_FAULT_SIGBUS;
303 static const struct vm_operations_struct xive_native_tima_vmops = {
304 .fault = xive_native_tima_fault,
307 static int kvmppc_xive_native_mmap(struct kvm_device *dev,
308 struct vm_area_struct *vma)
310 struct kvmppc_xive *xive = dev->private;
312 /* We only allow mappings at fixed offset for now */
313 if (vma->vm_pgoff == KVM_XIVE_TIMA_PAGE_OFFSET) {
314 if (vma_pages(vma) > 4)
316 vma->vm_ops = &xive_native_tima_vmops;
317 } else if (vma->vm_pgoff == KVM_XIVE_ESB_PAGE_OFFSET) {
318 if (vma_pages(vma) > KVMPPC_XIVE_NR_IRQS * 2)
320 vma->vm_ops = &xive_native_esb_vmops;
325 vma->vm_flags |= VM_IO | VM_PFNMAP;
326 vma->vm_page_prot = pgprot_noncached_wc(vma->vm_page_prot);
329 * Grab the KVM device file address_space to be able to clear
330 * the ESB pages mapping when a device is passed-through into
333 xive->mapping = vma->vm_file->f_mapping;
337 static int kvmppc_xive_native_set_source(struct kvmppc_xive *xive, long irq,
340 struct kvmppc_xive_src_block *sb;
341 struct kvmppc_xive_irq_state *state;
342 u64 __user *ubufp = (u64 __user *) addr;
347 pr_devel("%s irq=0x%lx\n", __func__, irq);
349 if (irq < KVMPPC_XIVE_FIRST_IRQ || irq >= KVMPPC_XIVE_NR_IRQS)
352 sb = kvmppc_xive_find_source(xive, irq, &idx);
354 pr_debug("No source, creating source block...\n");
355 sb = kvmppc_xive_create_src_block(xive, irq);
357 pr_err("Failed to create block...\n");
361 state = &sb->irq_state[idx];
363 if (get_user(val, ubufp)) {
364 pr_err("fault getting user info !\n");
368 arch_spin_lock(&sb->lock);
371 * If the source doesn't already have an IPI, allocate
372 * one and get the corresponding data
374 if (!state->ipi_number) {
375 state->ipi_number = xive_native_alloc_irq();
376 if (state->ipi_number == 0) {
377 pr_err("Failed to allocate IRQ !\n");
381 xive_native_populate_irq_data(state->ipi_number,
383 pr_debug("%s allocated hw_irq=0x%x for irq=0x%lx\n", __func__,
384 state->ipi_number, irq);
387 /* Restore LSI state */
388 if (val & KVM_XIVE_LEVEL_SENSITIVE) {
390 if (val & KVM_XIVE_LEVEL_ASSERTED)
391 state->asserted = true;
392 pr_devel(" LSI ! Asserted=%d\n", state->asserted);
395 /* Mask IRQ to start with */
396 state->act_server = 0;
397 state->act_priority = MASKED;
398 xive_vm_esb_load(&state->ipi_data, XIVE_ESB_SET_PQ_01);
399 xive_native_configure_irq(state->ipi_number, 0, MASKED, 0);
401 /* Increment the number of valid sources and mark this one valid */
409 arch_spin_unlock(&sb->lock);
414 static int kvmppc_xive_native_update_source_config(struct kvmppc_xive *xive,
415 struct kvmppc_xive_src_block *sb,
416 struct kvmppc_xive_irq_state *state,
417 u32 server, u8 priority, bool masked,
420 struct kvm *kvm = xive->kvm;
424 arch_spin_lock(&sb->lock);
426 if (state->act_server == server && state->act_priority == priority &&
430 pr_devel("new_act_prio=%d new_act_server=%d mask=%d act_server=%d act_prio=%d\n",
431 priority, server, masked, state->act_server,
432 state->act_priority);
434 kvmppc_xive_select_irq(state, &hw_num, NULL);
436 if (priority != MASKED && !masked) {
437 rc = kvmppc_xive_select_target(kvm, &server, priority);
441 state->act_priority = priority;
442 state->act_server = server;
445 rc = xive_native_configure_irq(hw_num,
446 kvmppc_xive_vp(xive, server),
449 state->act_priority = MASKED;
450 state->act_server = 0;
453 rc = xive_native_configure_irq(hw_num, 0, MASKED, 0);
457 arch_spin_unlock(&sb->lock);
461 static int kvmppc_xive_native_set_source_config(struct kvmppc_xive *xive,
464 struct kvmppc_xive_src_block *sb;
465 struct kvmppc_xive_irq_state *state;
466 u64 __user *ubufp = (u64 __user *) addr;
474 sb = kvmppc_xive_find_source(xive, irq, &src);
478 state = &sb->irq_state[src];
483 if (get_user(kvm_cfg, ubufp))
486 pr_devel("%s irq=0x%lx cfg=%016llx\n", __func__, irq, kvm_cfg);
488 priority = (kvm_cfg & KVM_XIVE_SOURCE_PRIORITY_MASK) >>
489 KVM_XIVE_SOURCE_PRIORITY_SHIFT;
490 server = (kvm_cfg & KVM_XIVE_SOURCE_SERVER_MASK) >>
491 KVM_XIVE_SOURCE_SERVER_SHIFT;
492 masked = (kvm_cfg & KVM_XIVE_SOURCE_MASKED_MASK) >>
493 KVM_XIVE_SOURCE_MASKED_SHIFT;
494 eisn = (kvm_cfg & KVM_XIVE_SOURCE_EISN_MASK) >>
495 KVM_XIVE_SOURCE_EISN_SHIFT;
497 if (priority != xive_prio_from_guest(priority)) {
498 pr_err("invalid priority for queue %d for VCPU %d\n",
503 return kvmppc_xive_native_update_source_config(xive, sb, state, server,
504 priority, masked, eisn);
507 static int kvmppc_xive_native_sync_source(struct kvmppc_xive *xive,
510 struct kvmppc_xive_src_block *sb;
511 struct kvmppc_xive_irq_state *state;
512 struct xive_irq_data *xd;
517 pr_devel("%s irq=0x%lx", __func__, irq);
519 sb = kvmppc_xive_find_source(xive, irq, &src);
523 state = &sb->irq_state[src];
527 arch_spin_lock(&sb->lock);
530 kvmppc_xive_select_irq(state, &hw_num, &xd);
531 xive_native_sync_source(hw_num);
535 arch_spin_unlock(&sb->lock);
539 static int xive_native_validate_queue_size(u32 qshift)
542 * We only support 64K pages for the moment. This is also
543 * advertised in the DT property "ibm,xive-eq-sizes"
546 case 0: /* EQ reset */
557 static int kvmppc_xive_native_set_queue_config(struct kvmppc_xive *xive,
558 long eq_idx, u64 addr)
560 struct kvm *kvm = xive->kvm;
561 struct kvm_vcpu *vcpu;
562 struct kvmppc_xive_vcpu *xc;
563 void __user *ubufp = (void __user *) addr;
566 struct kvm_ppc_xive_eq kvm_eq;
572 unsigned long page_size;
576 * Demangle priority/server tuple from the EQ identifier
578 priority = (eq_idx & KVM_XIVE_EQ_PRIORITY_MASK) >>
579 KVM_XIVE_EQ_PRIORITY_SHIFT;
580 server = (eq_idx & KVM_XIVE_EQ_SERVER_MASK) >>
581 KVM_XIVE_EQ_SERVER_SHIFT;
583 if (copy_from_user(&kvm_eq, ubufp, sizeof(kvm_eq)))
586 vcpu = kvmppc_xive_find_server(kvm, server);
588 pr_err("Can't find server %d\n", server);
591 xc = vcpu->arch.xive_vcpu;
593 if (priority != xive_prio_from_guest(priority)) {
594 pr_err("Trying to restore invalid queue %d for VCPU %d\n",
598 q = &xc->queues[priority];
600 pr_devel("%s VCPU %d priority %d fl:%x shift:%d addr:%llx g:%d idx:%d\n",
601 __func__, server, priority, kvm_eq.flags,
602 kvm_eq.qshift, kvm_eq.qaddr, kvm_eq.qtoggle, kvm_eq.qindex);
604 /* reset queue and disable queueing */
605 if (!kvm_eq.qshift) {
609 rc = kvmppc_xive_native_configure_queue(xc->vp_id, q, priority,
612 pr_err("Failed to reset queue %d for VCPU %d: %d\n",
613 priority, xc->server_num, rc);
621 * sPAPR specifies a "Unconditional Notify (n) flag" for the
622 * H_INT_SET_QUEUE_CONFIG hcall which forces notification
623 * without using the coalescing mechanisms provided by the
624 * XIVE END ESBs. This is required on KVM as notification
625 * using the END ESBs is not supported.
627 if (kvm_eq.flags != KVM_XIVE_EQ_ALWAYS_NOTIFY) {
628 pr_err("invalid flags %d\n", kvm_eq.flags);
632 rc = xive_native_validate_queue_size(kvm_eq.qshift);
634 pr_err("invalid queue size %d\n", kvm_eq.qshift);
638 if (kvm_eq.qaddr & ((1ull << kvm_eq.qshift) - 1)) {
639 pr_err("queue page is not aligned %llx/%llx\n", kvm_eq.qaddr,
640 1ull << kvm_eq.qshift);
644 srcu_idx = srcu_read_lock(&kvm->srcu);
645 gfn = gpa_to_gfn(kvm_eq.qaddr);
647 page_size = kvm_host_page_size(vcpu, gfn);
648 if (1ull << kvm_eq.qshift > page_size) {
649 srcu_read_unlock(&kvm->srcu, srcu_idx);
650 pr_warn("Incompatible host page size %lx!\n", page_size);
654 page = gfn_to_page(kvm, gfn);
655 if (is_error_page(page)) {
656 srcu_read_unlock(&kvm->srcu, srcu_idx);
657 pr_err("Couldn't get queue page %llx!\n", kvm_eq.qaddr);
661 qaddr = page_to_virt(page) + (kvm_eq.qaddr & ~PAGE_MASK);
662 srcu_read_unlock(&kvm->srcu, srcu_idx);
665 * Backup the queue page guest address to the mark EQ page
666 * dirty for migration.
668 q->guest_qaddr = kvm_eq.qaddr;
669 q->guest_qshift = kvm_eq.qshift;
672 * Unconditional Notification is forced by default at the
673 * OPAL level because the use of END ESBs is not supported by
676 rc = kvmppc_xive_native_configure_queue(xc->vp_id, q, priority,
677 (__be32 *) qaddr, kvm_eq.qshift, true);
679 pr_err("Failed to configure queue %d for VCPU %d: %d\n",
680 priority, xc->server_num, rc);
686 * Only restore the queue state when needed. When doing the
687 * H_INT_SET_SOURCE_CONFIG hcall, it should not.
689 if (kvm_eq.qtoggle != 1 || kvm_eq.qindex != 0) {
690 rc = xive_native_set_queue_state(xc->vp_id, priority,
697 rc = kvmppc_xive_attach_escalation(vcpu, priority,
698 xive->single_escalation);
701 kvmppc_xive_native_cleanup_queue(vcpu, priority);
705 static int kvmppc_xive_native_get_queue_config(struct kvmppc_xive *xive,
706 long eq_idx, u64 addr)
708 struct kvm *kvm = xive->kvm;
709 struct kvm_vcpu *vcpu;
710 struct kvmppc_xive_vcpu *xc;
712 void __user *ubufp = (u64 __user *) addr;
715 struct kvm_ppc_xive_eq kvm_eq;
724 * Demangle priority/server tuple from the EQ identifier
726 priority = (eq_idx & KVM_XIVE_EQ_PRIORITY_MASK) >>
727 KVM_XIVE_EQ_PRIORITY_SHIFT;
728 server = (eq_idx & KVM_XIVE_EQ_SERVER_MASK) >>
729 KVM_XIVE_EQ_SERVER_SHIFT;
731 vcpu = kvmppc_xive_find_server(kvm, server);
733 pr_err("Can't find server %d\n", server);
736 xc = vcpu->arch.xive_vcpu;
738 if (priority != xive_prio_from_guest(priority)) {
739 pr_err("invalid priority for queue %d for VCPU %d\n",
743 q = &xc->queues[priority];
745 memset(&kvm_eq, 0, sizeof(kvm_eq));
750 rc = xive_native_get_queue_info(xc->vp_id, priority, &qaddr, &qshift,
751 &qeoi_page, &escalate_irq, &qflags);
756 if (qflags & OPAL_XIVE_EQ_ALWAYS_NOTIFY)
757 kvm_eq.flags |= KVM_XIVE_EQ_ALWAYS_NOTIFY;
759 kvm_eq.qshift = q->guest_qshift;
760 kvm_eq.qaddr = q->guest_qaddr;
762 rc = xive_native_get_queue_state(xc->vp_id, priority, &kvm_eq.qtoggle,
767 pr_devel("%s VCPU %d priority %d fl:%x shift:%d addr:%llx g:%d idx:%d\n",
768 __func__, server, priority, kvm_eq.flags,
769 kvm_eq.qshift, kvm_eq.qaddr, kvm_eq.qtoggle, kvm_eq.qindex);
771 if (copy_to_user(ubufp, &kvm_eq, sizeof(kvm_eq)))
777 static void kvmppc_xive_reset_sources(struct kvmppc_xive_src_block *sb)
781 for (i = 0; i < KVMPPC_XICS_IRQ_PER_ICS; i++) {
782 struct kvmppc_xive_irq_state *state = &sb->irq_state[i];
787 if (state->act_priority == MASKED)
791 state->act_server = 0;
792 state->act_priority = MASKED;
793 xive_vm_esb_load(&state->ipi_data, XIVE_ESB_SET_PQ_01);
794 xive_native_configure_irq(state->ipi_number, 0, MASKED, 0);
795 if (state->pt_number) {
796 xive_vm_esb_load(state->pt_data, XIVE_ESB_SET_PQ_01);
797 xive_native_configure_irq(state->pt_number,
803 static int kvmppc_xive_reset(struct kvmppc_xive *xive)
805 struct kvm *kvm = xive->kvm;
806 struct kvm_vcpu *vcpu;
809 pr_devel("%s\n", __func__);
811 mutex_lock(&xive->lock);
813 kvm_for_each_vcpu(i, vcpu, kvm) {
814 struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;
820 kvmppc_xive_disable_vcpu_interrupts(vcpu);
822 for (prio = 0; prio < KVMPPC_XIVE_Q_COUNT; prio++) {
824 /* Single escalation, no queue 7 */
825 if (prio == 7 && xive->single_escalation)
828 if (xc->esc_virq[prio]) {
829 free_irq(xc->esc_virq[prio], vcpu);
830 irq_dispose_mapping(xc->esc_virq[prio]);
831 kfree(xc->esc_virq_names[prio]);
832 xc->esc_virq[prio] = 0;
835 kvmppc_xive_native_cleanup_queue(vcpu, prio);
839 for (i = 0; i <= xive->max_sbid; i++) {
840 struct kvmppc_xive_src_block *sb = xive->src_blocks[i];
843 arch_spin_lock(&sb->lock);
844 kvmppc_xive_reset_sources(sb);
845 arch_spin_unlock(&sb->lock);
849 mutex_unlock(&xive->lock);
854 static void kvmppc_xive_native_sync_sources(struct kvmppc_xive_src_block *sb)
858 for (j = 0; j < KVMPPC_XICS_IRQ_PER_ICS; j++) {
859 struct kvmppc_xive_irq_state *state = &sb->irq_state[j];
860 struct xive_irq_data *xd;
867 * The struct kvmppc_xive_irq_state reflects the state
868 * of the EAS configuration and not the state of the
869 * source. The source is masked setting the PQ bits to
870 * '-Q', which is what is being done before calling
871 * the KVM_DEV_XIVE_EQ_SYNC control.
873 * If a source EAS is configured, OPAL syncs the XIVE
874 * IC of the source and the XIVE IC of the previous
877 * So it should be fine ignoring MASKED sources as
878 * they have been synced already.
880 if (state->act_priority == MASKED)
883 kvmppc_xive_select_irq(state, &hw_num, &xd);
884 xive_native_sync_source(hw_num);
885 xive_native_sync_queue(hw_num);
889 static int kvmppc_xive_native_vcpu_eq_sync(struct kvm_vcpu *vcpu)
891 struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;
898 for (prio = 0; prio < KVMPPC_XIVE_Q_COUNT; prio++) {
899 struct xive_q *q = &xc->queues[prio];
904 /* Mark EQ page dirty for migration */
905 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
906 mark_page_dirty(vcpu->kvm, gpa_to_gfn(q->guest_qaddr));
907 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
912 static int kvmppc_xive_native_eq_sync(struct kvmppc_xive *xive)
914 struct kvm *kvm = xive->kvm;
915 struct kvm_vcpu *vcpu;
918 pr_devel("%s\n", __func__);
920 mutex_lock(&xive->lock);
921 for (i = 0; i <= xive->max_sbid; i++) {
922 struct kvmppc_xive_src_block *sb = xive->src_blocks[i];
925 arch_spin_lock(&sb->lock);
926 kvmppc_xive_native_sync_sources(sb);
927 arch_spin_unlock(&sb->lock);
931 kvm_for_each_vcpu(i, vcpu, kvm) {
932 kvmppc_xive_native_vcpu_eq_sync(vcpu);
934 mutex_unlock(&xive->lock);
939 static int kvmppc_xive_native_set_attr(struct kvm_device *dev,
940 struct kvm_device_attr *attr)
942 struct kvmppc_xive *xive = dev->private;
944 switch (attr->group) {
945 case KVM_DEV_XIVE_GRP_CTRL:
946 switch (attr->attr) {
947 case KVM_DEV_XIVE_RESET:
948 return kvmppc_xive_reset(xive);
949 case KVM_DEV_XIVE_EQ_SYNC:
950 return kvmppc_xive_native_eq_sync(xive);
951 case KVM_DEV_XIVE_NR_SERVERS:
952 return kvmppc_xive_set_nr_servers(xive, attr->addr);
955 case KVM_DEV_XIVE_GRP_SOURCE:
956 return kvmppc_xive_native_set_source(xive, attr->attr,
958 case KVM_DEV_XIVE_GRP_SOURCE_CONFIG:
959 return kvmppc_xive_native_set_source_config(xive, attr->attr,
961 case KVM_DEV_XIVE_GRP_EQ_CONFIG:
962 return kvmppc_xive_native_set_queue_config(xive, attr->attr,
964 case KVM_DEV_XIVE_GRP_SOURCE_SYNC:
965 return kvmppc_xive_native_sync_source(xive, attr->attr,
971 static int kvmppc_xive_native_get_attr(struct kvm_device *dev,
972 struct kvm_device_attr *attr)
974 struct kvmppc_xive *xive = dev->private;
976 switch (attr->group) {
977 case KVM_DEV_XIVE_GRP_EQ_CONFIG:
978 return kvmppc_xive_native_get_queue_config(xive, attr->attr,
984 static int kvmppc_xive_native_has_attr(struct kvm_device *dev,
985 struct kvm_device_attr *attr)
987 switch (attr->group) {
988 case KVM_DEV_XIVE_GRP_CTRL:
989 switch (attr->attr) {
990 case KVM_DEV_XIVE_RESET:
991 case KVM_DEV_XIVE_EQ_SYNC:
992 case KVM_DEV_XIVE_NR_SERVERS:
996 case KVM_DEV_XIVE_GRP_SOURCE:
997 case KVM_DEV_XIVE_GRP_SOURCE_CONFIG:
998 case KVM_DEV_XIVE_GRP_SOURCE_SYNC:
999 if (attr->attr >= KVMPPC_XIVE_FIRST_IRQ &&
1000 attr->attr < KVMPPC_XIVE_NR_IRQS)
1003 case KVM_DEV_XIVE_GRP_EQ_CONFIG:
1010 * Called when device fd is closed. kvm->lock is held.
1012 static void kvmppc_xive_native_release(struct kvm_device *dev)
1014 struct kvmppc_xive *xive = dev->private;
1015 struct kvm *kvm = xive->kvm;
1016 struct kvm_vcpu *vcpu;
1019 pr_devel("Releasing xive native device\n");
1022 * Clear the KVM device file address_space which is used to
1023 * unmap the ESB pages when a device is passed-through.
1025 mutex_lock(&xive->mapping_lock);
1026 xive->mapping = NULL;
1027 mutex_unlock(&xive->mapping_lock);
1030 * Since this is the device release function, we know that
1031 * userspace does not have any open fd or mmap referring to
1032 * the device. Therefore there can not be any of the
1033 * device attribute set/get, mmap, or page fault functions
1034 * being executed concurrently, and similarly, the
1035 * connect_vcpu and set/clr_mapped functions also cannot
1036 * be being executed.
1039 debugfs_remove(xive->dentry);
1042 * We should clean up the vCPU interrupt presenters first.
1044 kvm_for_each_vcpu(i, vcpu, kvm) {
1046 * Take vcpu->mutex to ensure that no one_reg get/set ioctl
1047 * (i.e. kvmppc_xive_native_[gs]et_vp) can be being done.
1048 * Holding the vcpu->mutex also means that the vcpu cannot
1049 * be executing the KVM_RUN ioctl, and therefore it cannot
1050 * be executing the XIVE push or pull code or accessing
1051 * the XIVE MMIO regions.
1053 mutex_lock(&vcpu->mutex);
1054 kvmppc_xive_native_cleanup_vcpu(vcpu);
1055 mutex_unlock(&vcpu->mutex);
1059 * Now that we have cleared vcpu->arch.xive_vcpu, vcpu->arch.irq_type
1060 * and vcpu->arch.xive_esc_[vr]addr on each vcpu, we are safe
1061 * against xive code getting called during vcpu execution or
1062 * set/get one_reg operations.
1064 kvm->arch.xive = NULL;
1066 for (i = 0; i <= xive->max_sbid; i++) {
1067 if (xive->src_blocks[i])
1068 kvmppc_xive_free_sources(xive->src_blocks[i]);
1069 kfree(xive->src_blocks[i]);
1070 xive->src_blocks[i] = NULL;
1073 if (xive->vp_base != XIVE_INVALID_VP)
1074 xive_native_free_vp_block(xive->vp_base);
1077 * A reference of the kvmppc_xive pointer is now kept under
1078 * the xive_devices struct of the machine for reuse. It is
1079 * freed when the VM is destroyed for now until we fix all the
1087 * Create a XIVE device. kvm->lock is held.
1089 static int kvmppc_xive_native_create(struct kvm_device *dev, u32 type)
1091 struct kvmppc_xive *xive;
1092 struct kvm *kvm = dev->kvm;
1094 pr_devel("Creating xive native device\n");
1099 xive = kvmppc_xive_get_device(kvm, type);
1103 dev->private = xive;
1106 mutex_init(&xive->mapping_lock);
1107 mutex_init(&xive->lock);
1109 /* VP allocation is delayed to the first call to connect_vcpu */
1110 xive->vp_base = XIVE_INVALID_VP;
1111 /* KVM_MAX_VCPUS limits the number of VMs to roughly 64 per sockets
1112 * on a POWER9 system.
1114 xive->nr_servers = KVM_MAX_VCPUS;
1116 xive->single_escalation = xive_native_has_single_escalation();
1117 xive->ops = &kvmppc_xive_native_ops;
1119 kvm->arch.xive = xive;
1124 * Interrupt Pending Buffer (IPB) offset
1126 #define TM_IPB_SHIFT 40
1127 #define TM_IPB_MASK (((u64) 0xFF) << TM_IPB_SHIFT)
1129 int kvmppc_xive_native_get_vp(struct kvm_vcpu *vcpu, union kvmppc_one_reg *val)
1131 struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;
1135 if (!kvmppc_xive_enabled(vcpu))
1141 /* Thread context registers. We only care about IPB and CPPR */
1142 val->xive_timaval[0] = vcpu->arch.xive_saved_state.w01;
1144 /* Get the VP state from OPAL */
1145 rc = xive_native_get_vp_state(xc->vp_id, &opal_state);
1150 * Capture the backup of IPB register in the NVT structure and
1151 * merge it in our KVM VP state.
1153 val->xive_timaval[0] |= cpu_to_be64(opal_state & TM_IPB_MASK);
1155 pr_devel("%s NSR=%02x CPPR=%02x IBP=%02x PIPR=%02x w01=%016llx w2=%08x opal=%016llx\n",
1157 vcpu->arch.xive_saved_state.nsr,
1158 vcpu->arch.xive_saved_state.cppr,
1159 vcpu->arch.xive_saved_state.ipb,
1160 vcpu->arch.xive_saved_state.pipr,
1161 vcpu->arch.xive_saved_state.w01,
1162 (u32) vcpu->arch.xive_cam_word, opal_state);
1167 int kvmppc_xive_native_set_vp(struct kvm_vcpu *vcpu, union kvmppc_one_reg *val)
1169 struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;
1170 struct kvmppc_xive *xive = vcpu->kvm->arch.xive;
1172 pr_devel("%s w01=%016llx vp=%016llx\n", __func__,
1173 val->xive_timaval[0], val->xive_timaval[1]);
1175 if (!kvmppc_xive_enabled(vcpu))
1181 /* We can't update the state of a "pushed" VCPU */
1182 if (WARN_ON(vcpu->arch.xive_pushed))
1186 * Restore the thread context registers. IPB and CPPR should
1187 * be the only ones that matter.
1189 vcpu->arch.xive_saved_state.w01 = val->xive_timaval[0];
1192 * There is no need to restore the XIVE internal state (IPB
1193 * stored in the NVT) as the IPB register was merged in KVM VP
1194 * state when captured.
1199 bool kvmppc_xive_native_supported(void)
1201 return xive_native_has_queue_state_support();
1204 static int xive_native_debug_show(struct seq_file *m, void *private)
1206 struct kvmppc_xive *xive = m->private;
1207 struct kvm *kvm = xive->kvm;
1208 struct kvm_vcpu *vcpu;
1214 seq_puts(m, "=========\nVCPU state\n=========\n");
1216 kvm_for_each_vcpu(i, vcpu, kvm) {
1217 struct kvmppc_xive_vcpu *xc = vcpu->arch.xive_vcpu;
1222 seq_printf(m, "cpu server %#x VP=%#x NSR=%02x CPPR=%02x IBP=%02x PIPR=%02x w01=%016llx w2=%08x\n",
1223 xc->server_num, xc->vp_id,
1224 vcpu->arch.xive_saved_state.nsr,
1225 vcpu->arch.xive_saved_state.cppr,
1226 vcpu->arch.xive_saved_state.ipb,
1227 vcpu->arch.xive_saved_state.pipr,
1228 vcpu->arch.xive_saved_state.w01,
1229 (u32) vcpu->arch.xive_cam_word);
1231 kvmppc_xive_debug_show_queues(m, vcpu);
1237 DEFINE_SHOW_ATTRIBUTE(xive_native_debug);
1239 static void xive_native_debugfs_init(struct kvmppc_xive *xive)
1243 name = kasprintf(GFP_KERNEL, "kvm-xive-%p", xive);
1245 pr_err("%s: no memory for name\n", __func__);
1249 xive->dentry = debugfs_create_file(name, 0444, powerpc_debugfs_root,
1250 xive, &xive_native_debug_fops);
1252 pr_debug("%s: created %s\n", __func__, name);
1256 static void kvmppc_xive_native_init(struct kvm_device *dev)
1258 struct kvmppc_xive *xive = (struct kvmppc_xive *)dev->private;
1260 /* Register some debug interfaces */
1261 xive_native_debugfs_init(xive);
1264 struct kvm_device_ops kvm_xive_native_ops = {
1265 .name = "kvm-xive-native",
1266 .create = kvmppc_xive_native_create,
1267 .init = kvmppc_xive_native_init,
1268 .release = kvmppc_xive_native_release,
1269 .set_attr = kvmppc_xive_native_set_attr,
1270 .get_attr = kvmppc_xive_native_get_attr,
1271 .has_attr = kvmppc_xive_native_has_attr,
1272 .mmap = kvmppc_xive_native_mmap,
1275 void kvmppc_xive_native_init_module(void)
1280 void kvmppc_xive_native_exit_module(void)