1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright 2017 Benjamin Herrenschmidt, IBM Corporation
6 #ifndef _KVM_PPC_BOOK3S_XIVE_H
7 #define _KVM_PPC_BOOK3S_XIVE_H
10 #include "book3s_xics.h"
13 * The XIVE Interrupt source numbers are within the range 0 to
14 * KVMPPC_XICS_NR_IRQS.
16 #define KVMPPC_XIVE_FIRST_IRQ 0
17 #define KVMPPC_XIVE_NR_IRQS KVMPPC_XICS_NR_IRQS
20 * State for one guest irq source.
22 * For each guest source we allocate a HW interrupt in the XIVE
23 * which we use for all SW triggers. It will be unused for
24 * pass-through but it's easier to keep around as the same
25 * guest interrupt can alternatively be emulated or pass-through
26 * if a physical device is hot unplugged and replaced with an
29 * This state structure is very similar to the XICS one with
30 * additional XIVE specific tracking.
32 struct kvmppc_xive_irq_state {
33 bool valid; /* Interrupt entry is valid */
35 u32 number; /* Guest IRQ number */
36 u32 ipi_number; /* XIVE IPI HW number */
37 struct xive_irq_data ipi_data; /* XIVE IPI associated data */
38 u32 pt_number; /* XIVE Pass-through number if any */
39 struct xive_irq_data *pt_data; /* XIVE Pass-through associated data */
41 /* Targetting as set by guest */
42 u8 guest_priority; /* Guest set priority */
43 u8 saved_priority; /* Saved priority when masking */
45 /* Actual targetting */
46 u32 act_server; /* Actual server */
47 u8 act_priority; /* Actual priority */
49 /* Various state bits */
50 bool in_eoi; /* Synchronize with H_EOI */
51 bool old_p; /* P bit state when masking */
52 bool old_q; /* Q bit state when masking */
53 bool lsi; /* level-sensitive interrupt */
54 bool asserted; /* Only for emulated LSI: current state */
56 /* Saved for migration state */
63 u32 eisn; /* Guest Effective IRQ number */
66 /* Select the "right" interrupt (IPI vs. passthrough) */
67 static inline void kvmppc_xive_select_irq(struct kvmppc_xive_irq_state *state,
69 struct xive_irq_data **out_xd)
71 if (state->pt_number) {
73 *out_hw_irq = state->pt_number;
75 *out_xd = state->pt_data;
78 *out_hw_irq = state->ipi_number;
80 *out_xd = &state->ipi_data;
85 * This corresponds to an "ICS" in XICS terminology, we use it
86 * as a mean to break up source information into multiple structures.
88 struct kvmppc_xive_src_block {
91 struct kvmppc_xive_irq_state irq_state[KVMPPC_XICS_IRQ_PER_ICS];
96 struct kvmppc_xive_ops {
97 int (*reset_mapped)(struct kvm *kvm, unsigned long guest_irq);
102 struct kvm_device *dev;
103 struct dentry *dentry;
105 /* VP block associated with the VM */
108 /* Blocks of sources */
109 struct kvmppc_xive_src_block *src_blocks[KVMPPC_XICS_MAX_ICS_ID + 1];
113 * For state save, we lazily scan the queues on the first interrupt
114 * being migrated. We don't have a clean way to reset that flags
115 * so we keep track of the number of valid sources and how many of
116 * them were migrated so we can reset when all of them have been
123 * Some irqs are delayed on restore until the source is created,
124 * keep track here of how many of them
128 /* Which queues (priorities) are in use by the guest */
136 u8 single_escalation;
138 struct kvmppc_xive_ops *ops;
139 struct address_space *mapping;
140 struct mutex mapping_lock;
144 #define KVMPPC_XIVE_Q_COUNT 8
146 struct kvmppc_xive_vcpu {
147 struct kvmppc_xive *xive;
148 struct kvm_vcpu *vcpu;
151 /* Server number. This is the HW CPU ID from a guest perspective */
155 * HW VP corresponding to this VCPU. This is the base of the VP
156 * block plus the server number.
162 /* IPI used for sending ... IPIs */
164 struct xive_irq_data vp_ipi_data;
166 /* Local emulation state */
167 uint8_t cppr; /* guest CPPR */
168 uint8_t hw_cppr;/* Hardware CPPR */
172 /* Each VP has 8 queues though we only provision some */
173 struct xive_q queues[KVMPPC_XIVE_Q_COUNT];
174 u32 esc_virq[KVMPPC_XIVE_Q_COUNT];
175 char *esc_virq_names[KVMPPC_XIVE_Q_COUNT];
177 /* Stash a delayed irq on restore from migration (see set_icp) */
193 static inline struct kvm_vcpu *kvmppc_xive_find_server(struct kvm *kvm, u32 nr)
195 struct kvm_vcpu *vcpu = NULL;
198 kvm_for_each_vcpu(i, vcpu, kvm) {
199 if (vcpu->arch.xive_vcpu && nr == vcpu->arch.xive_vcpu->server_num)
205 static inline struct kvmppc_xive_src_block *kvmppc_xive_find_source(struct kvmppc_xive *xive,
206 u32 irq, u16 *source)
208 u32 bid = irq >> KVMPPC_XICS_ICS_SHIFT;
209 u16 src = irq & KVMPPC_XICS_SRC_MASK;
213 if (bid > KVMPPC_XICS_MAX_ICS_ID)
215 return xive->src_blocks[bid];
218 static inline u32 kvmppc_xive_vp(struct kvmppc_xive *xive, u32 server)
220 return xive->vp_base + kvmppc_pack_vcpu_id(xive->kvm, server);
223 static inline bool kvmppc_xive_vp_in_use(struct kvm *kvm, u32 vp_id)
225 struct kvm_vcpu *vcpu = NULL;
228 kvm_for_each_vcpu(i, vcpu, kvm) {
229 if (vcpu->arch.xive_vcpu && vp_id == vcpu->arch.xive_vcpu->vp_id)
236 * Mapping between guest priorities and host priorities
239 * Guest request for 0...6 are honored. Guest request for anything
240 * higher results in a priority of 6 being applied.
242 * Similar mapping is done for CPPR values
244 static inline u8 xive_prio_from_guest(u8 prio)
246 if (prio == 0xff || prio < 6)
251 static inline u8 xive_prio_to_guest(u8 prio)
256 static inline u32 __xive_read_eq(__be32 *qpage, u32 msk, u32 *idx, u32 *toggle)
262 cur = be32_to_cpup(qpage + *idx);
263 if ((cur >> 31) == *toggle)
265 *idx = (*idx + 1) & msk;
268 return cur & 0x7fffffff;
271 extern unsigned long xive_rm_h_xirr(struct kvm_vcpu *vcpu);
272 extern unsigned long xive_rm_h_ipoll(struct kvm_vcpu *vcpu, unsigned long server);
273 extern int xive_rm_h_ipi(struct kvm_vcpu *vcpu, unsigned long server,
275 extern int xive_rm_h_cppr(struct kvm_vcpu *vcpu, unsigned long cppr);
276 extern int xive_rm_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr);
278 extern unsigned long (*__xive_vm_h_xirr)(struct kvm_vcpu *vcpu);
279 extern unsigned long (*__xive_vm_h_ipoll)(struct kvm_vcpu *vcpu, unsigned long server);
280 extern int (*__xive_vm_h_ipi)(struct kvm_vcpu *vcpu, unsigned long server,
282 extern int (*__xive_vm_h_cppr)(struct kvm_vcpu *vcpu, unsigned long cppr);
283 extern int (*__xive_vm_h_eoi)(struct kvm_vcpu *vcpu, unsigned long xirr);
286 * Common Xive routines for XICS-over-XIVE and XIVE native
288 void kvmppc_xive_disable_vcpu_interrupts(struct kvm_vcpu *vcpu);
289 int kvmppc_xive_debug_show_queues(struct seq_file *m, struct kvm_vcpu *vcpu);
290 struct kvmppc_xive_src_block *kvmppc_xive_create_src_block(
291 struct kvmppc_xive *xive, int irq);
292 void kvmppc_xive_free_sources(struct kvmppc_xive_src_block *sb);
293 int kvmppc_xive_select_target(struct kvm *kvm, u32 *server, u8 prio);
294 int kvmppc_xive_attach_escalation(struct kvm_vcpu *vcpu, u8 prio,
295 bool single_escalation);
296 struct kvmppc_xive *kvmppc_xive_get_device(struct kvm *kvm, u32 type);
297 void xive_cleanup_single_escalation(struct kvm_vcpu *vcpu,
298 struct kvmppc_xive_vcpu *xc, int irq);
300 #endif /* CONFIG_KVM_XICS */
301 #endif /* _KVM_PPC_BOOK3S_XICS_H */