arch/powerpc/kernel/vdso/sigtramp64.S

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2 /*
   3  * Signal trampoline for 64 bits processes in a ppc64 kernel for
   4  * use in the vDSO
   5  *
   6  * Copyright (C) 2004 Benjamin Herrenschmuidt (benh@kernel.crashing.org), IBM Corp.
   7  * Copyright (C) 2004 Alan Modra (amodra@au.ibm.com)), IBM Corp.
   8  */
   9 #include <asm/cache.h>          /* IFETCH_ALIGN_BYTES */
  10 #include <asm/processor.h>
  11 #include <asm/ppc_asm.h>
  12 #include <asm/unistd.h>
  13 #include <asm/vdso.h>
  14 #include <asm/ptrace.h>         /* XXX for __SIGNAL_FRAMESIZE */
  15
  16         .text
  17
  18 /*
  19  * __kernel_start_sigtramp_rt64 and __kernel_sigtramp_rt64 together
  20  * are one function split in two parts. The kernel jumps to the former
  21  * and the signal handler indirectly (by blr) returns to the latter.
  22  * __kernel_sigtramp_rt64 needs to point to the return address so
  23  * glibc can correctly identify the trampoline stack frame.
  24  */
  25         .balign 8
  26         .balign IFETCH_ALIGN_BYTES
  27 V_FUNCTION_BEGIN(__kernel_start_sigtramp_rt64)
  28 .Lsigrt_start:
  29         bctrl   /* call the handler */
  30 V_FUNCTION_END(__kernel_start_sigtramp_rt64)
  31 V_FUNCTION_BEGIN(__kernel_sigtramp_rt64)
  32         addi    r1, r1, __SIGNAL_FRAMESIZE
  33         li      r0,__NR_rt_sigreturn
  34         sc
  35 .Lsigrt_end:
  36 V_FUNCTION_END(__kernel_sigtramp_rt64)
  37 /* The .balign 8 above and the following zeros mimic the old stack
  38    trampoline layout.  The last magic value is the ucontext pointer,
  39    chosen in such a way that older libgcc unwind code returns a zero
  40    for a sigcontext pointer.  */
  41         .long 0,0,0
  42         .quad 0,-21*8
  43
  44 /* Register r1 can be found at offset 8 of a pt_regs structure.
  45    A pointer to the pt_regs is stored in memory at the old sp plus PTREGS.  */
  46 #define cfa_save \
  47   .byte 0x0f;                   /* DW_CFA_def_cfa_expression */         \
  48   .uleb128 9f - 1f;             /*   length */                          \
  49 1:                                                                      \
  50   .byte 0x71; .sleb128 PTREGS;  /*     DW_OP_breg1 */                   \
  51   .byte 0x06;                   /*     DW_OP_deref */                   \
  52   .byte 0x23; .uleb128 RSIZE;   /*     DW_OP_plus_uconst */             \
  53   .byte 0x06;                   /*     DW_OP_deref */                   \
  54 9:
  55
  56 /* Register REGNO can be found at offset OFS of a pt_regs structure.
  57    A pointer to the pt_regs is stored in memory at the old sp plus PTREGS.  */
  58 #define rsave(regno, ofs) \
  59   .byte 0x10;                   /* DW_CFA_expression */                 \
  60   .uleb128 regno;               /*   regno */                           \
  61   .uleb128 9f - 1f;             /*   length */                          \
  62 1:                                                                      \
  63   .byte 0x71; .sleb128 PTREGS;  /*     DW_OP_breg1 */                   \
  64   .byte 0x06;                   /*     DW_OP_deref */                   \
  65   .ifne ofs;                                                            \
  66     .byte 0x23; .uleb128 ofs;   /*     DW_OP_plus_uconst */             \
  67   .endif;                                                               \
  68 9:
  69
  70 /* If msr bit 1<<25 is set, then VMX register REGNO is at offset REGNO*16
  71    of the VMX reg struct.  A pointer to the VMX reg struct is at VREGS in
  72    the pt_regs struct.  This macro is for REGNO == 0, and contains
  73    'subroutines' that the other macros jump to.  */
  74 #define vsave_msr0(regno) \
  75   .byte 0x10;                   /* DW_CFA_expression */                 \
  76   .uleb128 regno + 77;          /*   regno */                           \
  77   .uleb128 9f - 1f;             /*   length */                          \
  78 1:                                                                      \
  79   .byte 0x30 + regno;           /*     DW_OP_lit0 */                    \
  80 2:                                                                      \
  81   .byte 0x40;                   /*     DW_OP_lit16 */                   \
  82   .byte 0x1e;                   /*     DW_OP_mul */                     \
  83 3:                                                                      \
  84   .byte 0x71; .sleb128 PTREGS;  /*     DW_OP_breg1 */                   \
  85   .byte 0x06;                   /*     DW_OP_deref */                   \
  86   .byte 0x12;                   /*     DW_OP_dup */                     \
  87   .byte 0x23;                   /*     DW_OP_plus_uconst */             \
  88     .uleb128 33*RSIZE;          /*       msr offset */                  \
  89   .byte 0x06;                   /*     DW_OP_deref */                   \
  90   .byte 0x0c; .long 1 << 25;    /*     DW_OP_const4u */                 \
  91   .byte 0x1a;                   /*     DW_OP_and */                     \
  92   .byte 0x12;                   /*     DW_OP_dup, ret 0 if bra taken */ \
  93   .byte 0x30;                   /*     DW_OP_lit0 */                    \
  94   .byte 0x29;                   /*     DW_OP_eq */                      \
  95   .byte 0x28; .short 0x7fff;    /*     DW_OP_bra to end */              \
  96   .byte 0x13;                   /*     DW_OP_drop, pop the 0 */         \
  97   .byte 0x23; .uleb128 VREGS;   /*     DW_OP_plus_uconst */             \
  98   .byte 0x06;                   /*     DW_OP_deref */                   \
  99   .byte 0x22;                   /*     DW_OP_plus */                    \
 100   .byte 0x2f; .short 0x7fff;    /*     DW_OP_skip to end */             \
 101 9:
 102
 103 /* If msr bit 1<<25 is set, then VMX register REGNO is at offset REGNO*16
 104    of the VMX reg struct.  REGNO is 1 thru 31.  */
 105 #define vsave_msr1(regno) \
 106   .byte 0x10;                   /* DW_CFA_expression */                 \
 107   .uleb128 regno + 77;          /*   regno */                           \
 108   .uleb128 9f - 1f;             /*   length */                          \
 109 1:                                                                      \
 110   .byte 0x30 + regno;           /*     DW_OP_lit n */                   \
 111   .byte 0x2f; .short 2b - 9f;   /*     DW_OP_skip */                    \
 112 9:
 113
 114 /* If msr bit 1<<25 is set, then VMX register REGNO is at offset OFS of
 115    the VMX save block.  */
 116 #define vsave_msr2(regno, ofs) \
 117   .byte 0x10;                   /* DW_CFA_expression */                 \
 118   .uleb128 regno + 77;          /*   regno */                           \
 119   .uleb128 9f - 1f;             /*   length */                          \
 120 1:                                                                      \
 121   .byte 0x0a; .short ofs;       /*     DW_OP_const2u */                 \
 122   .byte 0x2f; .short 3b - 9f;   /*     DW_OP_skip */                    \
 123 9:
 124
 125 /* VMX register REGNO is at offset OFS of the VMX save area.  */
 126 #define vsave(regno, ofs) \
 127   .byte 0x10;                   /* DW_CFA_expression */                 \
 128   .uleb128 regno + 77;          /*   regno */                           \
 129   .uleb128 9f - 1f;             /*   length */                          \
 130 1:                                                                      \
 131   .byte 0x71; .sleb128 PTREGS;  /*     DW_OP_breg1 */                   \
 132   .byte 0x06;                   /*     DW_OP_deref */                   \
 133   .byte 0x23; .uleb128 VREGS;   /*     DW_OP_plus_uconst */             \
 134   .byte 0x06;                   /*     DW_OP_deref */                   \
 135   .byte 0x23; .uleb128 ofs;     /*     DW_OP_plus_uconst */             \
 136 9:
 137
 138 /* This is where the pt_regs pointer can be found on the stack.  */
 139 #define PTREGS  128+168+56
 140
 141 /* Size of regs.  */
 142 #define RSIZE   8
 143
 144 /* Size of CR reg in DWARF unwind info. */
 145 #define CRSIZE  4
 146
 147 /* Offset of CR reg within a full word. */
 148 #ifdef __LITTLE_ENDIAN__
 149 #define CROFF 0
 150 #else
 151 #define CROFF (RSIZE - CRSIZE)
 152 #endif
 153
 154 /* This is the offset of the VMX reg pointer.  */
 155 #define VREGS   48*RSIZE+33*8
 156
 157 /* Describe where general purpose regs are saved.  */
 158 #define EH_FRAME_GEN \
 159   cfa_save;                                                             \
 160   rsave ( 0,  0*RSIZE);                                                 \
 161   rsave ( 2,  2*RSIZE);                                                 \
 162   rsave ( 3,  3*RSIZE);                                                 \
 163   rsave ( 4,  4*RSIZE);                                                 \
 164   rsave ( 5,  5*RSIZE);                                                 \
 165   rsave ( 6,  6*RSIZE);                                                 \
 166   rsave ( 7,  7*RSIZE);                                                 \
 167   rsave ( 8,  8*RSIZE);                                                 \
 168   rsave ( 9,  9*RSIZE);                                                 \
 169   rsave (10, 10*RSIZE);                                                 \
 170   rsave (11, 11*RSIZE);                                                 \
 171   rsave (12, 12*RSIZE);                                                 \
 172   rsave (13, 13*RSIZE);                                                 \
 173   rsave (14, 14*RSIZE);                                                 \
 174   rsave (15, 15*RSIZE);                                                 \
 175   rsave (16, 16*RSIZE);                                                 \
 176   rsave (17, 17*RSIZE);                                                 \
 177   rsave (18, 18*RSIZE);                                                 \
 178   rsave (19, 19*RSIZE);                                                 \
 179   rsave (20, 20*RSIZE);                                                 \
 180   rsave (21, 21*RSIZE);                                                 \
 181   rsave (22, 22*RSIZE);                                                 \
 182   rsave (23, 23*RSIZE);                                                 \
 183   rsave (24, 24*RSIZE);                                                 \
 184   rsave (25, 25*RSIZE);                                                 \
 185   rsave (26, 26*RSIZE);                                                 \
 186   rsave (27, 27*RSIZE);                                                 \
 187   rsave (28, 28*RSIZE);                                                 \
 188   rsave (29, 29*RSIZE);                                                 \
 189   rsave (30, 30*RSIZE);                                                 \
 190   rsave (31, 31*RSIZE);                                                 \
 191   rsave (67, 32*RSIZE);         /* ap, used as temp for nip */          \
 192   rsave (65, 36*RSIZE);         /* lr */                                \
 193   rsave (68, 38*RSIZE + CROFF); /* cr fields */                         \
 194   rsave (69, 38*RSIZE + CROFF);                                         \
 195   rsave (70, 38*RSIZE + CROFF);                                         \
 196   rsave (71, 38*RSIZE + CROFF);                                         \
 197   rsave (72, 38*RSIZE + CROFF);                                         \
 198   rsave (73, 38*RSIZE + CROFF);                                         \
 199   rsave (74, 38*RSIZE + CROFF);                                         \
 200   rsave (75, 38*RSIZE + CROFF)
 201
 202 /* Describe where the FP regs are saved.  */
 203 #define EH_FRAME_FP \
 204   rsave (32, 48*RSIZE +  0*8);                                          \
 205   rsave (33, 48*RSIZE +  1*8);                                          \
 206   rsave (34, 48*RSIZE +  2*8);                                          \
 207   rsave (35, 48*RSIZE +  3*8);                                          \
 208   rsave (36, 48*RSIZE +  4*8);                                          \
 209   rsave (37, 48*RSIZE +  5*8);                                          \
 210   rsave (38, 48*RSIZE +  6*8);                                          \
 211   rsave (39, 48*RSIZE +  7*8);                                          \
 212   rsave (40, 48*RSIZE +  8*8);                                          \
 213   rsave (41, 48*RSIZE +  9*8);                                          \
 214   rsave (42, 48*RSIZE + 10*8);                                          \
 215   rsave (43, 48*RSIZE + 11*8);                                          \
 216   rsave (44, 48*RSIZE + 12*8);                                          \
 217   rsave (45, 48*RSIZE + 13*8);                                          \
 218   rsave (46, 48*RSIZE + 14*8);                                          \
 219   rsave (47, 48*RSIZE + 15*8);                                          \
 220   rsave (48, 48*RSIZE + 16*8);                                          \
 221   rsave (49, 48*RSIZE + 17*8);                                          \
 222   rsave (50, 48*RSIZE + 18*8);                                          \
 223   rsave (51, 48*RSIZE + 19*8);                                          \
 224   rsave (52, 48*RSIZE + 20*8);                                          \
 225   rsave (53, 48*RSIZE + 21*8);                                          \
 226   rsave (54, 48*RSIZE + 22*8);                                          \
 227   rsave (55, 48*RSIZE + 23*8);                                          \
 228   rsave (56, 48*RSIZE + 24*8);                                          \
 229   rsave (57, 48*RSIZE + 25*8);                                          \
 230   rsave (58, 48*RSIZE + 26*8);                                          \
 231   rsave (59, 48*RSIZE + 27*8);                                          \
 232   rsave (60, 48*RSIZE + 28*8);                                          \
 233   rsave (61, 48*RSIZE + 29*8);                                          \
 234   rsave (62, 48*RSIZE + 30*8);                                          \
 235   rsave (63, 48*RSIZE + 31*8)
 236
 237 /* Describe where the VMX regs are saved.  */
 238 #ifdef CONFIG_ALTIVEC
 239 #define EH_FRAME_VMX \
 240   vsave_msr0 ( 0);                                                      \
 241   vsave_msr1 ( 1);                                                      \
 242   vsave_msr1 ( 2);                                                      \
 243   vsave_msr1 ( 3);                                                      \
 244   vsave_msr1 ( 4);                                                      \
 245   vsave_msr1 ( 5);                                                      \
 246   vsave_msr1 ( 6);                                                      \
 247   vsave_msr1 ( 7);                                                      \
 248   vsave_msr1 ( 8);                                                      \
 249   vsave_msr1 ( 9);                                                      \
 250   vsave_msr1 (10);                                                      \
 251   vsave_msr1 (11);                                                      \
 252   vsave_msr1 (12);                                                      \
 253   vsave_msr1 (13);                                                      \
 254   vsave_msr1 (14);                                                      \
 255   vsave_msr1 (15);                                                      \
 256   vsave_msr1 (16);                                                      \
 257   vsave_msr1 (17);                                                      \
 258   vsave_msr1 (18);                                                      \
 259   vsave_msr1 (19);                                                      \
 260   vsave_msr1 (20);                                                      \
 261   vsave_msr1 (21);                                                      \
 262   vsave_msr1 (22);                                                      \
 263   vsave_msr1 (23);                                                      \
 264   vsave_msr1 (24);                                                      \
 265   vsave_msr1 (25);                                                      \
 266   vsave_msr1 (26);                                                      \
 267   vsave_msr1 (27);                                                      \
 268   vsave_msr1 (28);                                                      \
 269   vsave_msr1 (29);                                                      \
 270   vsave_msr1 (30);                                                      \
 271   vsave_msr1 (31);                                                      \
 272   vsave_msr2 (33, 32*16+12);                                            \
 273   vsave      (32, 33*16)
 274 #else
 275 #define EH_FRAME_VMX
 276 #endif
 277
 278         .section .eh_frame,"a",@progbits
 279 .Lcie:
 280         .long .Lcie_end - .Lcie_start
 281 .Lcie_start:
 282         .long 0                 /* CIE ID */
 283         .byte 1                 /* Version number */
 284         .string "zRS"           /* NUL-terminated augmentation string */
 285         .uleb128 4              /* Code alignment factor */
 286         .sleb128 -8             /* Data alignment factor */
 287         .byte 67                /* Return address register column, ap */
 288         .uleb128 1              /* Augmentation value length */
 289         .byte 0x14              /* DW_EH_PE_pcrel | DW_EH_PE_udata8. */
 290         .byte 0x0c,1,0          /* DW_CFA_def_cfa: r1 ofs 0 */
 291         .balign 8
 292 .Lcie_end:
 293
 294         .long .Lfde0_end - .Lfde0_start
 295 .Lfde0_start:
 296         .long .Lfde0_start - .Lcie      /* CIE pointer. */
 297         .quad .Lsigrt_start - .         /* PC start, length */
 298         .quad .Lsigrt_end - .Lsigrt_start
 299         .uleb128 0                      /* Augmentation */
 300         EH_FRAME_GEN
 301         EH_FRAME_FP
 302         EH_FRAME_VMX
 303 # Do we really need to describe the frame at this point?  ie. will
 304 # we ever have some call chain that returns somewhere past the addi?
 305 # I don't think so, since gcc doesn't support async signals.
 306 #       .byte 0x41              /* DW_CFA_advance_loc 1*4 */
 307 #undef PTREGS
 308 #define PTREGS 168+56
 309 #       EH_FRAME_GEN
 310 #       EH_FRAME_FP
 311 #       EH_FRAME_VMX
 312         .balign 8
 313 .Lfde0_end: